52 #define ADV7533_MAIN_SYNC_REG 0x17U
53 #define ADV7533_MAIN_POWER_DOWN_REG 0x41U
54 #define ADV7533_MAIN_HPG_REG 0x42U
63 #define ADV7533_CEC_DSI_INTERNAL_TIMING_REG 0x27U
64 #define ADV7533_CEC_DSI_TOTAL_WIDTH_H_REG 0x28U
65 #define ADV7533_CEC_DSI_TOTAL_WIDTH_L_REG 0x29U
66 #define ADV7533_CEC_DSI_HSYNC_H_REG 0x2AU
67 #define ADV7533_CEC_DSI_HSYNC_L_REG 0x2BU
68 #define ADV7533_CEC_DSI_HFP_H_REG 0x2CU
69 #define ADV7533_CEC_DSI_HFP_L_REG 0x2DU
70 #define ADV7533_CEC_DSI_HBP_H_REG 0x2EU
71 #define ADV7533_CEC_DSI_HBP_L_REG 0x2FU
73 #define ADV7533_CEC_DSI_TOTAL_HEIGHT_H_REG 0x30U
74 #define ADV7533_CEC_DSI_TOTAL_HEIGHT_L_REG 0x31U
75 #define ADV7533_CEC_DSI_VSYNC_H_REG 0x32U
76 #define ADV7533_CEC_DSI_VSYNC_L_REG 0x33U
77 #define ADV7533_CEC_DSI_VFP_H_REG 0x34U
78 #define ADV7533_CEC_DSI_VFP_L_REG 0x35U
79 #define ADV7533_CEC_DSI_VBP_H_REG 0x36U
80 #define ADV7533_CEC_DSI_VBP_L_REG 0x37U
84 #define ADV7533_CHIPID_ADDR0 0x00U
85 #define ADV7533_CHIPID_ADDR1 0x01U