Specific remapping management function

Specific remapping management function. More...

Collaboration diagram for Specific remapping management function:

Functions
void	TIM_RemapConfig (TIM_TypeDef *TIMx, uint16_t TIM_Remap)
	Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. More...

Detailed Description

Specific remapping management function.

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              ##### Specific remapping management function #####
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Function Documentation

void TIM_RemapConfig	(	TIM_TypeDef *	TIMx,
		uint16_t	TIM_Remap
	)

Configures the TIM2, TIM5 and TIM11 Remapping input capabilities.

Configures the TIM16 Remapping input Capabilities.

Parameters

TIMx

where x can be 2, 5 or 11 to select the TIM peripheral.

TIM_Remap

specifies the TIM input remapping source. This parameter can be one of the following values: TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trogger output. TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) TIM5_LSI: TIM5 CH4 input is connected to LSI clock. TIM5_LSE: TIM5 CH4 input is connected to LSE clock. TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock (HSE divided by a programmable prescaler)

Return values

None

Parameters

TIMx

where x can be 1, 8 or 16 to select the TIM peripheral.

TIM_Remap

specifies the TIM input reampping source. This parameter can be one of the following values: TIM16_GPIO: TIM16 Channel 1 is connected to GPIO. TIM16_RTC_CLK: TIM16 Channel 1 is connected to RTC input clock. TIM16_HSE_DIV32: TIM16 Channel 1 is connected to HSE/32 clock. TIM16_MCO: TIM16 Channel 1 is connected to MCO clock. TIM1_ADC1_AWDG1: TIM1 ETR is connected to ADC1 AWDG1. TIM1_ADC1_AWDG2: TIM1 ETR is connected to ADC1 AWDG2. TIM1_ADC1_AWDG3: TIM1 ETR is connected to ADC1 AWDG3. TIM1_ADC4_AWDG1: TIM1 ETR is connected to ADC4 AWDG1. TIM1_ADC4_AWDG2: TIM1 ETR is connected to ADC4 AWDG2. TIM1_ADC4_AWDG3: TIM1 ETR is connected to ADC4 AWDG3. TIM8_ADC2_AWDG1: TIM8 ETR is connected to ADC2 AWDG1. TIM8_ADC2_AWDG2: TIM8 ETR is connected to ADC2 AWDG2. TIM8_ADC2_AWDG3: TIM8 ETR is connected to ADC2 AWDG3. TIM8_ADC4_AWDG1: TIM8 ETR is connected to ADC4 AWDG1. TIM8_ADC4_AWDG2: TIM8 ETR is connected to ADC4 AWDG2. TIM8_ADC4_AWDG3: TIM8 ETR is connected to ADC4 AWDG3.

Return values

None

Definition at line 3173 of file stm32f4xx_tim.c.