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Defines | |
| #define | __fiq |
| #define | __irq |
| #define | ADC0_INT 18 |
| #define | ADC1_INT 21 |
| #define | ARM_CORE0_INT 2 |
| #define | ARM_CORE1_INT 3 |
| #define | BOD_INT 20 |
| #define | EINT0_INT 14 |
| #define | EINT1_INT 15 |
| #define | EINT2_INT 16 |
| #define | EINT3_INT 17 |
| #define | F_Bit 0x40 |
| #define | FIQ32Mode 0x11 |
| #define | I2C0_INT 9 |
| #define | I2C1_INT 19 |
| #define | I_Bit 0x80 |
| #define | IRQ32Mode 0x12 |
| #define | IRQ_SLOT_EN 0x20 /* bit 5 in Vector control register */ |
| #define | NESTED_INTERRUPT 0 |
| #define | PLL_INT 12 |
| #define | PWM0_INT 8 |
| #define | RTC_INT 13 |
| #define | SPI0_INT 10 |
| #define | SPI1_INT 11 |
| #define | SWI_INT 1 |
| #define | SYS32Mode 0x1F |
| #define | TIMER0_INT 4 |
| #define | TIMER1_INT 5 |
| #define | UART0_INT 6 |
| #define | UART1_INT 7 |
| #define | USB_INT 22 |
| #define | VECT_ADDR_INDEX 0x100 |
| #define | VECT_CNTL_INDEX 0x200 |
| #define | VIC_SIZE 16 |
| #define | WDT_INT 0 |
| #define __fiq |
Definition at line 19 of file Common_WinARM/inc/irq.h.
| #define __irq |
Definition at line 18 of file Common_WinARM/inc/irq.h.
| #define ADC0_INT 18 |
Definition at line 54 of file Common_WinARM/inc/irq.h.
| #define ADC1_INT 21 |
Definition at line 57 of file Common_WinARM/inc/irq.h.
| #define ARM_CORE0_INT 2 |
Definition at line 38 of file Common_WinARM/inc/irq.h.
| #define ARM_CORE1_INT 3 |
Definition at line 39 of file Common_WinARM/inc/irq.h.
| #define BOD_INT 20 |
Definition at line 56 of file Common_WinARM/inc/irq.h.
| #define EINT0_INT 14 |
Definition at line 50 of file Common_WinARM/inc/irq.h.
| #define EINT1_INT 15 |
Definition at line 51 of file Common_WinARM/inc/irq.h.
| #define EINT2_INT 16 |
Definition at line 52 of file Common_WinARM/inc/irq.h.
| #define EINT3_INT 17 |
Definition at line 53 of file Common_WinARM/inc/irq.h.
| #define F_Bit 0x40 |
Definition at line 30 of file Common_WinARM/inc/irq.h.
| #define FIQ32Mode 0x11 |
Definition at line 34 of file Common_WinARM/inc/irq.h.
| #define I2C0_INT 9 |
Definition at line 45 of file Common_WinARM/inc/irq.h.
| #define I2C1_INT 19 |
Definition at line 55 of file Common_WinARM/inc/irq.h.
| #define I_Bit 0x80 |
Definition at line 29 of file Common_WinARM/inc/irq.h.
| #define IRQ32Mode 0x12 |
Definition at line 33 of file Common_WinARM/inc/irq.h.
| #define IRQ_SLOT_EN 0x20 /* bit 5 in Vector control register */ |
Definition at line 60 of file Common_WinARM/inc/irq.h.
| #define NESTED_INTERRUPT 0 |
Definition at line 27 of file Common_WinARM/inc/irq.h.
| #define PLL_INT 12 |
Definition at line 48 of file Common_WinARM/inc/irq.h.
| #define PWM0_INT 8 |
Definition at line 44 of file Common_WinARM/inc/irq.h.
| #define RTC_INT 13 |
Definition at line 49 of file Common_WinARM/inc/irq.h.
| #define SPI0_INT 10 |
Definition at line 46 of file Common_WinARM/inc/irq.h.
| #define SPI1_INT 11 |
Definition at line 47 of file Common_WinARM/inc/irq.h.
| #define SWI_INT 1 |
Definition at line 37 of file Common_WinARM/inc/irq.h.
| #define SYS32Mode 0x1F |
Definition at line 32 of file Common_WinARM/inc/irq.h.
| #define TIMER0_INT 4 |
Definition at line 40 of file Common_WinARM/inc/irq.h.
| #define TIMER1_INT 5 |
Definition at line 41 of file Common_WinARM/inc/irq.h.
| #define UART0_INT 6 |
Definition at line 42 of file Common_WinARM/inc/irq.h.
| #define UART1_INT 7 |
Definition at line 43 of file Common_WinARM/inc/irq.h.
| #define USB_INT 22 |
Definition at line 58 of file Common_WinARM/inc/irq.h.
| #define VECT_ADDR_INDEX 0x100 |
Definition at line 63 of file Common_WinARM/inc/irq.h.
| #define VECT_CNTL_INDEX 0x200 |
Definition at line 64 of file Common_WinARM/inc/irq.h.
| #define VIC_SIZE 16 |
Definition at line 61 of file Common_WinARM/inc/irq.h.
| #define WDT_INT 0 |
Definition at line 36 of file Common_WinARM/inc/irq.h.