FMC_Bank5_6_TypeDef Struct Reference

Flexible Memory Controller Bank5_6. More...

#include <stm32f469xx.h>

Public Attributes
__IO uint32_t	SDCMR
__IO uint32_t	SDCR [2]
__IO uint32_t	SDRTR
__IO uint32_t	SDSR
__IO uint32_t	SDTR [2]

Detailed Description

Flexible Memory Controller Bank5_6.

Flexible Memory Controller Bank5 and 6.

Definition at line 625 of file stm32f469xx.h.

Member Data Documentation

SDCMR

__IO uint32_t FMC_Bank5_6_TypeDef::SDCMR

SDRAM Command Mode register, Address offset: 0x150

Definition at line 629 of file stm32f469xx.h.

SDCR

__IO uint32_t FMC_Bank5_6_TypeDef::SDCR

SDRAM Control registers , Address offset: 0x140-0x144

Definition at line 627 of file stm32f469xx.h.

SDRTR

__IO uint32_t FMC_Bank5_6_TypeDef::SDRTR

SDRAM Refresh Timer register, Address offset: 0x154

Definition at line 630 of file stm32f469xx.h.

SDSR

__IO uint32_t FMC_Bank5_6_TypeDef::SDSR

SDRAM Status register, Address offset: 0x158

Definition at line 631 of file stm32f469xx.h.

SDTR

__IO uint32_t FMC_Bank5_6_TypeDef::SDTR

SDRAM Timing registers , Address offset: 0x148-0x14C

Definition at line 628 of file stm32f469xx.h.

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The documentation for this struct was generated from the following files:

• stm32f469xx.h
• stm32f769xx.h
• stm32h735xx.h
• stm32h747xx.h