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#define | __HAL_PWR_AVD_EXTI_CLEAR_FLAG() SET_BIT(EXTI->PR1, PWR_EXTI_LINE_AVD) |
| Clear the AVD EXTI flag. More...
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#define | __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD) |
| Disable event on AVD EXTI Line 16. More...
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#define | __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD) |
| Disable the AVD Extended Interrupt Falling Trigger. More...
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#define | __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD) |
| Disable the AVD EXTI Line 16. More...
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#define | __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD) |
| Disable the AVD Extended Interrupt Rising Trigger. More...
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#define | __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() |
| Disable the AVD Extended Interrupt Rising & Falling Trigger. More...
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#define | __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD) |
| Enable event on AVD EXTI Line 16. More...
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#define | __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD) |
| Enable the AVD Extended Interrupt Falling Trigger. More...
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#define | __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD) |
| Enable the AVD EXTI Line 16. More...
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#define | __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD) |
| Enable the AVD Extended Interrupt Rising Trigger. More...
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#define | __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() |
| Enable the AVD Extended Interrupt Rising and Falling Trigger. More...
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#define | __HAL_PWR_AVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_AVD) |
| Generates a Software interrupt on AVD EXTI line. More...
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#define | __HAL_PWR_AVD_EXTI_GET_FLAG() ((READ_BIT(EXTI->PR1, PWR_EXTI_LINE_AVD) == PWR_EXTI_LINE_AVD) ? 1UL : 0UL) |
| Check whether the specified AVD EXTI interrupt flag is set or not. More...
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#define | IS_D3_STATE(STATE) |
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#define | IS_PWR_AVD_LEVEL(LEVEL) |
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#define | IS_PWR_AVD_MODE(MODE) |
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#define | IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) |
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#define | IS_PWR_D1_CPU(CPU) ((CPU) == CM7_CPUID) |
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#define | IS_PWR_DOMAIN(DOMAIN) |
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#define | IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) |
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#define | IS_PWR_SUPPLY(PWR_SOURCE) |
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#define | IS_PWR_WAKEUP_FLAG(FLAG) |
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#define | IS_PWR_WAKEUP_PIN(PIN) |
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#define | IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) |
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#define | IS_PWR_WAKEUP_PIN_PULL(PULL) |
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#define | PWR_AVD_MODE_EVENT_FALLING (0x00020002U) |
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#define | PWR_AVD_MODE_EVENT_RISING (0x00020001U) |
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#define | PWR_AVD_MODE_EVENT_RISING_FALLING (0x00020003U) |
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#define | PWR_AVD_MODE_IT_FALLING (0x00010002U) |
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#define | PWR_AVD_MODE_IT_RISING (0x00010001U) |
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#define | PWR_AVD_MODE_IT_RISING_FALLING (0x00010003U) |
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#define | PWR_AVD_MODE_NORMAL (0x00000000U) |
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#define | PWR_AVDLEVEL_0 PWR_CR1_ALS_LEV0 |
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#define | PWR_AVDLEVEL_1 PWR_CR1_ALS_LEV1 |
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#define | PWR_AVDLEVEL_2 PWR_CR1_ALS_LEV2 |
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#define | PWR_AVDLEVEL_3 PWR_CR1_ALS_LEV3 |
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#define | PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR3_VBRS |
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#define | PWR_BATTERY_CHARGING_RESISTOR_5 (0x00000000U) |
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#define | PWR_CPU_FLAGS (0x00000000U) |
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#define | PWR_D1_DOMAIN (0x00000000U) |
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#define | PWR_D3_DOMAIN (0x00000002U) |
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#define | PWR_D3_DOMAIN_RUN (0x00000800U) |
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#define | PWR_D3_DOMAIN_STOP (0x00000000U) |
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#define | PWR_EXTERNAL_SOURCE_SUPPLY PWR_CR3_BYPASS |
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#define | PWR_EXTI_LINE_AVD EXTI_IMR1_IM16 |
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#define | PWR_LDO_SUPPLY PWR_CR3_LDOEN |
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#define | PWR_PIN_NO_PULL (0x00000000U) |
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#define | PWR_PIN_POLARITY_HIGH (0x00000000U) |
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#define | PWR_PIN_POLARITY_LOW (0x00000001U) |
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#define | PWR_PIN_PULL_DOWN (0x00000002U) |
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#define | PWR_PIN_PULL_UP (0x00000001U) |
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#define | PWR_REGULATOR_SVOS_SCALE3 (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1) |
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#define | PWR_REGULATOR_SVOS_SCALE4 (PWR_CR1_SVOS_1) |
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#define | PWR_REGULATOR_SVOS_SCALE5 (PWR_CR1_SVOS_0) |
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#define | PWR_SUPPLY_CONFIG_MASK (PWR_CR3_SCUEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS) |
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#define | PWR_TEMP_ABOVE_HIGH_THRESHOLD PWR_CR2_TEMPH |
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#define | PWR_TEMP_BELOW_LOW_THRESHOLD PWR_CR2_TEMPL |
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#define | PWR_TEMP_BETWEEN_HIGH_LOW_THRESHOLD (0x00000000U) |
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#define | PWR_VBAT_ABOVE_HIGH_THRESHOLD PWR_CR2_VBATH |
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#define | PWR_VBAT_BELOW_LOW_THRESHOLD PWR_CR2_VBATL |
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#define | PWR_VBAT_BETWEEN_HIGH_LOW_THRESHOLD (0x00000000U) |
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#define | PWR_WAKEUP_FLAG1 PWR_WKUPFR_WKUPF1 |
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#define | PWR_WAKEUP_FLAG2 PWR_WKUPFR_WKUPF2 |
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#define | PWR_WAKEUP_FLAG4 PWR_WKUPFR_WKUPF4 |
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#define | PWR_WAKEUP_FLAG6 PWR_WKUPFR_WKUPF6 |
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#define | PWR_WAKEUP_FLAG_ALL |
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#define | PWR_WAKEUP_PIN1 PWR_WKUPEPR_WKUPEN1 |
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#define | PWR_WAKEUP_PIN1_HIGH PWR_WKUPEPR_WKUPEN1 |
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#define | PWR_WAKEUP_PIN1_LOW (PWR_WKUPEPR_WKUPP1 | PWR_WKUPEPR_WKUPEN1) |
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#define | PWR_WAKEUP_PIN2 PWR_WKUPEPR_WKUPEN2 |
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#define | PWR_WAKEUP_PIN2_HIGH PWR_WKUPEPR_WKUPEN2 |
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#define | PWR_WAKEUP_PIN2_LOW (PWR_WKUPEPR_WKUPP2 | PWR_WKUPEPR_WKUPEN2) |
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#define | PWR_WAKEUP_PIN4 PWR_WKUPEPR_WKUPEN4 |
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#define | PWR_WAKEUP_PIN4_HIGH PWR_WKUPEPR_WKUPEN4 |
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#define | PWR_WAKEUP_PIN4_LOW (PWR_WKUPEPR_WKUPP4 | PWR_WKUPEPR_WKUPEN4) |
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#define | PWR_WAKEUP_PIN6 PWR_WKUPEPR_WKUPEN6 |
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#define | PWR_WAKEUP_PIN6_HIGH PWR_WKUPEPR_WKUPEN6 |
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#define | PWR_WAKEUP_PIN6_LOW (PWR_WKUPEPR_WKUPP6 | PWR_WKUPEPR_WKUPEN6) |
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Header file of PWR HAL Extension module.
- Author
- MCD Application Team
- Attention
© COPYRIGHT(c) 2017 STMicroelectronics. All rights reserved.
This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause
Definition in file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h.