Macros
Collaboration diagram for PWREx Regulator Voltage Scale:

Macros

#define PWR_REGULATOR_SVOS_SCALE3   (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1)
 
#define PWR_REGULATOR_SVOS_SCALE3   (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1)
 
#define PWR_REGULATOR_SVOS_SCALE4   (PWR_CR1_SVOS_1)
 
#define PWR_REGULATOR_SVOS_SCALE4   (PWR_CR1_SVOS_1)
 
#define PWR_REGULATOR_SVOS_SCALE5   (PWR_CR1_SVOS_0)
 
#define PWR_REGULATOR_SVOS_SCALE5   (PWR_CR1_SVOS_0)
 
#define PWR_REGULATOR_VOLTAGE_SCALE1
 
#define PWR_REGULATOR_VOLTAGE_SCALE1
 
#define PWR_REGULATOR_VOLTAGE_SCALE1
 
#define PWR_REGULATOR_VOLTAGE_SCALE2
 
#define PWR_REGULATOR_VOLTAGE_SCALE2
 
#define PWR_REGULATOR_VOLTAGE_SCALE2
 
#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
 
#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
 
#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
 

Detailed Description

Macro Definition Documentation

◆ PWR_REGULATOR_SVOS_SCALE3 [1/2]

#define PWR_REGULATOR_SVOS_SCALE3   (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1)

◆ PWR_REGULATOR_SVOS_SCALE3 [2/2]

#define PWR_REGULATOR_SVOS_SCALE3   (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1)

◆ PWR_REGULATOR_SVOS_SCALE4 [1/2]

#define PWR_REGULATOR_SVOS_SCALE4   (PWR_CR1_SVOS_1)

◆ PWR_REGULATOR_SVOS_SCALE4 [2/2]

#define PWR_REGULATOR_SVOS_SCALE4   (PWR_CR1_SVOS_1)

◆ PWR_REGULATOR_SVOS_SCALE5 [1/2]

#define PWR_REGULATOR_SVOS_SCALE5   (PWR_CR1_SVOS_0)

◆ PWR_REGULATOR_SVOS_SCALE5 [2/2]

#define PWR_REGULATOR_SVOS_SCALE5   (PWR_CR1_SVOS_0)

◆ PWR_REGULATOR_VOLTAGE_SCALE1 [1/3]

#define PWR_REGULATOR_VOLTAGE_SCALE1
Value:
PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
180 MHz by activating the over-drive mode. */

Definition at line 74 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h.

◆ PWR_REGULATOR_VOLTAGE_SCALE1 [2/3]

#define PWR_REGULATOR_VOLTAGE_SCALE1
Value:
PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
180 MHz by activating the over-drive mode. */

Definition at line 74 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h.

◆ PWR_REGULATOR_VOLTAGE_SCALE1 [3/3]

#define PWR_REGULATOR_VOLTAGE_SCALE1
Value:
PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
180 MHz by activating the over-drive mode. */

Definition at line 74 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h.

◆ PWR_REGULATOR_VOLTAGE_SCALE2 [1/3]

#define PWR_REGULATOR_VOLTAGE_SCALE2
Value:
PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
168 MHz by activating the over-drive mode. */

Definition at line 75 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h.

◆ PWR_REGULATOR_VOLTAGE_SCALE2 [2/3]

#define PWR_REGULATOR_VOLTAGE_SCALE2
Value:
PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
168 MHz by activating the over-drive mode. */

Definition at line 75 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h.

◆ PWR_REGULATOR_VOLTAGE_SCALE2 [3/3]

#define PWR_REGULATOR_VOLTAGE_SCALE2
Value:
PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
168 MHz by activating the over-drive mode. */

Definition at line 75 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h.

◆ PWR_REGULATOR_VOLTAGE_SCALE3 [1/3]

#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */

◆ PWR_REGULATOR_VOLTAGE_SCALE3 [2/3]

#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */

◆ PWR_REGULATOR_VOLTAGE_SCALE3 [3/3]

#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
PWR_CR_VOS
#define PWR_CR_VOS
Definition: stm32f407xx.h:9389
PWR_CR_VOS_1
#define PWR_CR_VOS_1
Definition: stm32f411xe.h:3826


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:06