stm32f7xx_hal_i2s.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32F7xx_HAL_I2S_H
22 #define STM32F7xx_HAL_I2S_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f7xx_hal_def.h"
30 
39 /* Exported types ------------------------------------------------------------*/
47 typedef struct
48 {
49  uint32_t Mode;
52  uint32_t Standard;
55  uint32_t DataFormat;
58  uint32_t MCLKOutput;
61  uint32_t AudioFreq;
64  uint32_t CPOL;
67  uint32_t ClockSource;
70 
74 typedef enum
75 {
84 
88 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
89 typedef struct __I2S_HandleTypeDef
90 #else
91 typedef struct
92 #endif
93 {
98  uint16_t *pTxBuffPtr;
100  __IO uint16_t TxXferSize;
102  __IO uint16_t TxXferCount;
104  uint16_t *pRxBuffPtr;
106  __IO uint16_t RxXferSize;
108  __IO uint16_t RxXferCount;
122  __IO uint32_t ErrorCode;
125 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
126  void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);
127  void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);
128  void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);
129  void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);
130  void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s);
131  void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s);
132  void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s);
134 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
136 
137 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
138 
141 typedef enum
142 {
143  HAL_I2S_TX_COMPLETE_CB_ID = 0x00U,
144  HAL_I2S_RX_COMPLETE_CB_ID = 0x01U,
145  HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U,
146  HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U,
147  HAL_I2S_ERROR_CB_ID = 0x06U,
148  HAL_I2S_MSPINIT_CB_ID = 0x07U,
149  HAL_I2S_MSPDEINIT_CB_ID = 0x08U
151 } HAL_I2S_CallbackIDTypeDef;
152 
156 typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s);
158 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
159 
163 /* Exported constants --------------------------------------------------------*/
170 #define HAL_I2S_ERROR_NONE (0x00000000U)
171 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U)
172 #define HAL_I2S_ERROR_OVR (0x00000002U)
173 #define HAL_I2S_ERROR_UDR (0x00000004U)
174 #define HAL_I2S_ERROR_DMA (0x00000008U)
175 #define HAL_I2S_ERROR_PRESCALER (0x00000010U)
176 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
177 #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U)
178 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
179 
186 #define I2S_MODE_SLAVE_TX (0x00000000U)
187 #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
188 #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
189 #define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
190 
197 #define I2S_STANDARD_PHILIPS (0x00000000U)
198 #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
199 #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
200 #define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
201 #define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
202 
209 #define I2S_DATAFORMAT_16B (0x00000000U)
210 #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
211 #define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
212 #define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
213 
220 #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
221 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
222 
229 #define I2S_AUDIOFREQ_192K (192000U)
230 #define I2S_AUDIOFREQ_96K (96000U)
231 #define I2S_AUDIOFREQ_48K (48000U)
232 #define I2S_AUDIOFREQ_44K (44100U)
233 #define I2S_AUDIOFREQ_32K (32000U)
234 #define I2S_AUDIOFREQ_22K (22050U)
235 #define I2S_AUDIOFREQ_16K (16000U)
236 #define I2S_AUDIOFREQ_11K (11025U)
237 #define I2S_AUDIOFREQ_8K (8000U)
238 #define I2S_AUDIOFREQ_DEFAULT (2U)
239 
246 #define I2S_CPOL_LOW (0x00000000U)
247 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
248 
255 #define I2S_IT_TXE SPI_CR2_TXEIE
256 #define I2S_IT_RXNE SPI_CR2_RXNEIE
257 #define I2S_IT_ERR SPI_CR2_ERRIE
258 
265 #define I2S_FLAG_TXE SPI_SR_TXE
266 #define I2S_FLAG_RXNE SPI_SR_RXNE
267 
268 #define I2S_FLAG_UDR SPI_SR_UDR
269 #define I2S_FLAG_OVR SPI_SR_OVR
270 #define I2S_FLAG_FRE SPI_SR_FRE
271 
272 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
273 #define I2S_FLAG_BSY SPI_SR_BSY
274 
275 #define I2S_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY)
276 
283 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001U)
284 #define I2S_CLOCK_PLL ((uint32_t)0x00000002U)
285 
292 /* Exported macros -----------------------------------------------------------*/
301 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
302 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
303  (__HANDLE__)->State = HAL_I2S_STATE_RESET; \
304  (__HANDLE__)->MspInitCallback = NULL; \
305  (__HANDLE__)->MspDeInitCallback = NULL; \
306  } while(0)
307 #else
308 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
309 #endif
310 
315 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
316 
321 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
322 
332 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
333 
343 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
344 
355 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
356 
370 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
371 
376 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
377  __IO uint32_t tmpreg_ovr = 0x00U; \
378  tmpreg_ovr = (__HANDLE__)->Instance->DR; \
379  tmpreg_ovr = (__HANDLE__)->Instance->SR; \
380  UNUSED(tmpreg_ovr); \
381  }while(0U)
382 
386 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
387  __IO uint32_t tmpreg_udr = 0x00U;\
388  tmpreg_udr = ((__HANDLE__)->Instance->SR);\
389  UNUSED(tmpreg_udr); \
390  }while(0U)
391 
395 /* Exported functions --------------------------------------------------------*/
403 /* Initialization/de-initialization functions ********************************/
408 
409 /* Callbacks Register/UnRegister functions ***********************************/
410 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
411 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback);
412 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
413 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
414 
421 /* I/O operation functions ***************************************************/
422 /* Blocking mode: Polling */
423 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
424 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
425 
426 /* Non-Blocking mode: Interrupt */
427 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
428 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
430 
431 /* Non-Blocking mode: DMA */
432 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
433 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
434 
438 
439 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
452 /* Peripheral Control and State functions ************************************/
454 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
463 /* Private types -------------------------------------------------------------*/
464 /* Private variables ---------------------------------------------------------*/
465 /* Private constants ---------------------------------------------------------*/
474 /* Private macros ------------------------------------------------------------*/
491 #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
492 
502 #define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
503 
509 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \
510  ((__MODE__) == I2S_MODE_SLAVE_RX) || \
511  ((__MODE__) == I2S_MODE_MASTER_TX) || \
512  ((__MODE__) == I2S_MODE_MASTER_RX))
513 
514 #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \
515  ((__STANDARD__) == I2S_STANDARD_MSB) || \
516  ((__STANDARD__) == I2S_STANDARD_LSB) || \
517  ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
518  ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
519 
520 #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \
521  ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
522  ((__FORMAT__) == I2S_DATAFORMAT_24B) || \
523  ((__FORMAT__) == I2S_DATAFORMAT_32B))
524 
525 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
526  ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
527 
528 #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
529  ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
530  ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
531 
537 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
538  ((__CPOL__) == I2S_CPOL_HIGH))
539 
540 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
541  ((CLOCK) == I2S_CLOCK_PLL))
542 
554 #ifdef __cplusplus
555 }
556 #endif
557 
558 #endif /* STM32F7xx_HAL_I2S_H */
559 
560 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_I2S_MspDeInit
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
SPI_TypeDef
Serial Peripheral Interface.
Definition: stm32f407xx.h:711
HAL_I2S_TxHalfCpltCallback
void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
Tx Half Transfer completed callbacks.
Definition: stm32f4_discovery_audio.c:469
__IO
#define __IO
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:237
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
I2S_HandleTypeDef::pRxBuffPtr
uint16_t * pRxBuffPtr
Definition: stm32f7xx_hal_i2s.h:104
HAL_I2S_Receive
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2S_TxCpltCallback
void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
Tx Transfer completed callbacks.
Definition: stm32f4_discovery_audio.c:456
HAL_I2S_STATE_BUSY_TX
@ HAL_I2S_STATE_BUSY_TX
Definition: stm32f7xx_hal_i2s.h:79
HAL_I2S_RxCpltCallback
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
Rx Transfer completed callbacks.
Definition: stm32f4_discovery_audio.c:844
I2S_HandleTypeDef
I2S handle Structure definition.
Definition: stm32f7xx_hal_i2s.h:91
I2S_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
Definition: stm32f7xx_hal_i2s.h:114
HAL_I2S_STATE_BUSY
@ HAL_I2S_STATE_BUSY
Definition: stm32f7xx_hal_i2s.h:78
HAL_I2S_STATE_TIMEOUT
@ HAL_I2S_STATE_TIMEOUT
Definition: stm32f7xx_hal_i2s.h:81
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:51
I2S_HandleTypeDef::TxXferSize
__IO uint16_t TxXferSize
Definition: stm32f7xx_hal_i2s.h:100
HAL_I2S_Transmit
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
HAL_I2S_DMAPause
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
I2S_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32f7xx_hal_i2s.h:122
I2S_HandleTypeDef::pTxBuffPtr
uint16_t * pTxBuffPtr
Definition: stm32f7xx_hal_i2s.h:98
HAL_I2S_GetError
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
I2S_HandleTypeDef
struct __I2S_HandleTypeDef I2S_HandleTypeDef
I2S handle Structure definition.
__I2S_HandleTypeDef
I2S handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h:91
I2S_HandleTypeDef::Instance
SPI_TypeDef * Instance
Definition: stm32f7xx_hal_i2s.h:94
HAL_I2S_STATE_BUSY_RX
@ HAL_I2S_STATE_BUSY_RX
Definition: stm32f7xx_hal_i2s.h:80
HAL_I2S_Receive_DMA
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
HAL_I2S_RxHalfCpltCallback
void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
Rx Half Transfer completed callbacks.
Definition: stm32f4_discovery_audio.c:854
HAL_I2S_DMAResume
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
HAL_I2S_GetState
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
HAL_I2S_STATE_READY
@ HAL_I2S_STATE_READY
Definition: stm32f7xx_hal_i2s.h:77
HAL_I2S_Transmit_IT
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
HAL_I2S_Init
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
HAL_I2S_ErrorCallback
void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
I2S error callbacks.
Definition: stm32f4_discovery_audio.c:1110
HAL_I2S_IRQHandler
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
I2S_HandleTypeDef::RxXferSize
__IO uint16_t RxXferSize
Definition: stm32f7xx_hal_i2s.h:106
I2S_HandleTypeDef::State
__IO HAL_I2S_StateTypeDef State
Definition: stm32f7xx_hal_i2s.h:120
I2S_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
Definition: stm32f7xx_hal_i2s.h:116
I2S_HandleTypeDef::Init
I2S_InitTypeDef Init
Definition: stm32f7xx_hal_i2s.h:96
HAL_I2S_STATE_ERROR
@ HAL_I2S_STATE_ERROR
Definition: stm32f7xx_hal_i2s.h:82
I2S_HandleTypeDef::RxXferCount
__IO uint16_t RxXferCount
Definition: stm32f7xx_hal_i2s.h:108
stm32f7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_I2S_STATE_RESET
@ HAL_I2S_STATE_RESET
Definition: stm32f7xx_hal_i2s.h:76
I2S_HandleTypeDef::TxXferCount
__IO uint16_t TxXferCount
Definition: stm32f7xx_hal_i2s.h:102
HAL_I2S_DMAStop
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
I2S_InitTypeDef
I2S Init structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h:47
HAL_I2S_StateTypeDef
HAL_I2S_StateTypeDef
HAL State structures definition.
Definition: stm32f7xx_hal_i2s.h:74
HAL_I2S_MspInit
void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
__I2C_HandleTypeDef::Mode
__IO HAL_I2C_ModeTypeDef Mode
Definition: stm32f7xx_hal_i2c.h:213
HAL_I2S_DeInit
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
I2S_HandleTypeDef::Lock
__IO HAL_LockTypeDef Lock
Definition: stm32f7xx_hal_i2s.h:118
HAL_I2S_Transmit_DMA
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
HAL_I2S_Receive_IT
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)


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autogenerated on Fri Apr 1 2022 02:14:53