Macros

RCC registers bit address in the alias region. More...

Collaboration diagram for RCC BitAddress AliasRegion:

Macros

#define CLOCKSWITCH_TIMEOUT_VALUE   5000U /* 5 s */
 
#define CLOCKSWITCH_TIMEOUT_VALUE   5000U /* 5 s */
 
#define CLOCKSWITCH_TIMEOUT_VALUE   5000U /* 5 s */
 
#define HSE_TIMEOUT_VALUE   HSE_STARTUP_TIMEOUT
 
#define HSE_TIMEOUT_VALUE   HSE_STARTUP_TIMEOUT
 
#define HSE_TIMEOUT_VALUE   HSE_STARTUP_TIMEOUT
 
#define HSI_TIMEOUT_VALUE   2U /* 2 ms */
 
#define HSI_TIMEOUT_VALUE   2U /* 2 ms */
 
#define HSI_TIMEOUT_VALUE   2U /* 2 ms */
 
#define LSI_TIMEOUT_VALUE   2U /* 2 ms */
 
#define LSI_TIMEOUT_VALUE   2U /* 2 ms */
 
#define LSI_TIMEOUT_VALUE   2U /* 2 ms */
 
#define RCC_BDCR_BDRST_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))
 
#define RCC_BDCR_BDRST_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))
 
#define RCC_BDCR_BDRST_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))
 
#define RCC_BDCR_BYTE0_ADDRESS   (PERIPH_BASE + RCC_BDCR_OFFSET)
 
#define RCC_BDCR_BYTE0_ADDRESS   (PERIPH_BASE + RCC_BDCR_OFFSET)
 
#define RCC_BDCR_BYTE0_ADDRESS   (PERIPH_BASE + RCC_BDCR_OFFSET)
 
#define RCC_BDCR_OFFSET   (RCC_OFFSET + 0x70U)
 
#define RCC_BDCR_OFFSET   (RCC_OFFSET + 0x70U)
 
#define RCC_BDCR_OFFSET   (RCC_OFFSET + 0x70U)
 
#define RCC_BDCR_RTCEN_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))
 
#define RCC_BDCR_RTCEN_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))
 
#define RCC_BDCR_RTCEN_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))
 
#define RCC_BDRST_BIT_NUMBER   0x10U
 
#define RCC_BDRST_BIT_NUMBER   0x10U
 
#define RCC_BDRST_BIT_NUMBER   0x10U
 
#define RCC_CIR_BYTE1_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))
 
#define RCC_CIR_BYTE1_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))
 
#define RCC_CIR_BYTE1_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))
 
#define RCC_CIR_BYTE2_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))
 
#define RCC_CIR_BYTE2_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))
 
#define RCC_CIR_BYTE2_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))
 
#define RCC_CR_BYTE2_ADDRESS   0x40023802U
 
#define RCC_CR_BYTE2_ADDRESS   0x40023802U
 
#define RCC_CR_BYTE2_ADDRESS   0x40023802U
 
#define RCC_CR_CSSON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))
 
#define RCC_CR_CSSON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))
 
#define RCC_CR_CSSON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))
 
#define RCC_CR_HSION_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))
 
#define RCC_CR_HSION_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))
 
#define RCC_CR_HSION_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))
 
#define RCC_CR_OFFSET   (RCC_OFFSET + 0x00U)
 
#define RCC_CR_OFFSET   (RCC_OFFSET + 0x00U)
 
#define RCC_CR_OFFSET   (RCC_OFFSET + 0x00U)
 
#define RCC_CR_PLLON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))
 
#define RCC_CR_PLLON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))
 
#define RCC_CR_PLLON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))
 
#define RCC_CSR_LSION_BB   (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))
 
#define RCC_CSR_LSION_BB   (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))
 
#define RCC_CSR_LSION_BB   (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))
 
#define RCC_CSR_OFFSET   (RCC_OFFSET + 0x74U)
 
#define RCC_CSR_OFFSET   (RCC_OFFSET + 0x74U)
 
#define RCC_CSR_OFFSET   (RCC_OFFSET + 0x74U)
 
#define RCC_CSSON_BIT_NUMBER   0x13U
 
#define RCC_CSSON_BIT_NUMBER   0x13U
 
#define RCC_CSSON_BIT_NUMBER   0x13U
 
#define RCC_DBP_TIMEOUT_VALUE   2U
 
#define RCC_DBP_TIMEOUT_VALUE   2U
 
#define RCC_DBP_TIMEOUT_VALUE   2U
 
#define RCC_HSION_BIT_NUMBER   0x00U
 
#define RCC_HSION_BIT_NUMBER   0x00U
 
#define RCC_HSION_BIT_NUMBER   0x00U
 
#define RCC_LSE_TIMEOUT_VALUE   LSE_STARTUP_TIMEOUT
 
#define RCC_LSE_TIMEOUT_VALUE   LSE_STARTUP_TIMEOUT
 
#define RCC_LSE_TIMEOUT_VALUE   LSE_STARTUP_TIMEOUT
 
#define RCC_LSION_BIT_NUMBER   0x00U
 
#define RCC_LSION_BIT_NUMBER   0x00U
 
#define RCC_LSION_BIT_NUMBER   0x00U
 
#define RCC_OFFSET   (RCC_BASE - PERIPH_BASE)
 
#define RCC_OFFSET   (RCC_BASE - PERIPH_BASE)
 
#define RCC_OFFSET   (RCC_BASE - PERIPH_BASE)
 
#define RCC_PLLON_BIT_NUMBER   0x18U
 
#define RCC_PLLON_BIT_NUMBER   0x18U
 
#define RCC_PLLON_BIT_NUMBER   0x18U
 
#define RCC_RTCEN_BIT_NUMBER   0x0FU
 
#define RCC_RTCEN_BIT_NUMBER   0x0FU
 
#define RCC_RTCEN_BIT_NUMBER   0x0FU
 

Detailed Description

RCC registers bit address in the alias region.

Macro Definition Documentation

◆ CLOCKSWITCH_TIMEOUT_VALUE [1/3]

#define CLOCKSWITCH_TIMEOUT_VALUE   5000U /* 5 s */

◆ CLOCKSWITCH_TIMEOUT_VALUE [2/3]

#define CLOCKSWITCH_TIMEOUT_VALUE   5000U /* 5 s */

◆ CLOCKSWITCH_TIMEOUT_VALUE [3/3]

#define CLOCKSWITCH_TIMEOUT_VALUE   5000U /* 5 s */

◆ HSE_TIMEOUT_VALUE [1/3]

#define HSE_TIMEOUT_VALUE   HSE_STARTUP_TIMEOUT

◆ HSE_TIMEOUT_VALUE [2/3]

#define HSE_TIMEOUT_VALUE   HSE_STARTUP_TIMEOUT

◆ HSE_TIMEOUT_VALUE [3/3]

#define HSE_TIMEOUT_VALUE   HSE_STARTUP_TIMEOUT

◆ HSI_TIMEOUT_VALUE [1/3]

#define HSI_TIMEOUT_VALUE   2U /* 2 ms */

◆ HSI_TIMEOUT_VALUE [2/3]

#define HSI_TIMEOUT_VALUE   2U /* 2 ms */

◆ HSI_TIMEOUT_VALUE [3/3]

#define HSI_TIMEOUT_VALUE   2U /* 2 ms */

◆ LSI_TIMEOUT_VALUE [1/3]

#define LSI_TIMEOUT_VALUE   2U /* 2 ms */

◆ LSI_TIMEOUT_VALUE [2/3]

#define LSI_TIMEOUT_VALUE   2U /* 2 ms */

◆ LSI_TIMEOUT_VALUE [3/3]

#define LSI_TIMEOUT_VALUE   2U /* 2 ms */

◆ RCC_BDCR_BDRST_BB [1/3]

#define RCC_BDCR_BDRST_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))

◆ RCC_BDCR_BDRST_BB [2/3]

#define RCC_BDCR_BDRST_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))

◆ RCC_BDCR_BDRST_BB [3/3]

#define RCC_BDCR_BDRST_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))

◆ RCC_BDCR_BYTE0_ADDRESS [1/3]

#define RCC_BDCR_BYTE0_ADDRESS   (PERIPH_BASE + RCC_BDCR_OFFSET)

◆ RCC_BDCR_BYTE0_ADDRESS [2/3]

#define RCC_BDCR_BYTE0_ADDRESS   (PERIPH_BASE + RCC_BDCR_OFFSET)

◆ RCC_BDCR_BYTE0_ADDRESS [3/3]

#define RCC_BDCR_BYTE0_ADDRESS   (PERIPH_BASE + RCC_BDCR_OFFSET)

◆ RCC_BDCR_OFFSET [1/3]

#define RCC_BDCR_OFFSET   (RCC_OFFSET + 0x70U)

◆ RCC_BDCR_OFFSET [2/3]

#define RCC_BDCR_OFFSET   (RCC_OFFSET + 0x70U)

◆ RCC_BDCR_OFFSET [3/3]

#define RCC_BDCR_OFFSET   (RCC_OFFSET + 0x70U)

◆ RCC_BDCR_RTCEN_BB [1/3]

#define RCC_BDCR_RTCEN_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))

◆ RCC_BDCR_RTCEN_BB [2/3]

#define RCC_BDCR_RTCEN_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))

◆ RCC_BDCR_RTCEN_BB [3/3]

#define RCC_BDCR_RTCEN_BB   (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))

◆ RCC_BDRST_BIT_NUMBER [1/3]

#define RCC_BDRST_BIT_NUMBER   0x10U

◆ RCC_BDRST_BIT_NUMBER [2/3]

#define RCC_BDRST_BIT_NUMBER   0x10U

◆ RCC_BDRST_BIT_NUMBER [3/3]

#define RCC_BDRST_BIT_NUMBER   0x10U

◆ RCC_CIR_BYTE1_ADDRESS [1/3]

#define RCC_CIR_BYTE1_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))

◆ RCC_CIR_BYTE1_ADDRESS [2/3]

#define RCC_CIR_BYTE1_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))

◆ RCC_CIR_BYTE1_ADDRESS [3/3]

#define RCC_CIR_BYTE1_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))

◆ RCC_CIR_BYTE2_ADDRESS [1/3]

#define RCC_CIR_BYTE2_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))

◆ RCC_CIR_BYTE2_ADDRESS [2/3]

#define RCC_CIR_BYTE2_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))

◆ RCC_CIR_BYTE2_ADDRESS [3/3]

#define RCC_CIR_BYTE2_ADDRESS   ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))

◆ RCC_CR_BYTE2_ADDRESS [1/3]

#define RCC_CR_BYTE2_ADDRESS   0x40023802U

◆ RCC_CR_BYTE2_ADDRESS [2/3]

#define RCC_CR_BYTE2_ADDRESS   0x40023802U

◆ RCC_CR_BYTE2_ADDRESS [3/3]

#define RCC_CR_BYTE2_ADDRESS   0x40023802U

◆ RCC_CR_CSSON_BB [1/3]

#define RCC_CR_CSSON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))

◆ RCC_CR_CSSON_BB [2/3]

#define RCC_CR_CSSON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))

◆ RCC_CR_CSSON_BB [3/3]

#define RCC_CR_CSSON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))

◆ RCC_CR_HSION_BB [1/3]

#define RCC_CR_HSION_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))

◆ RCC_CR_HSION_BB [2/3]

#define RCC_CR_HSION_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))

◆ RCC_CR_HSION_BB [3/3]

#define RCC_CR_HSION_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))

◆ RCC_CR_OFFSET [1/3]

#define RCC_CR_OFFSET   (RCC_OFFSET + 0x00U)

◆ RCC_CR_OFFSET [2/3]

#define RCC_CR_OFFSET   (RCC_OFFSET + 0x00U)

◆ RCC_CR_OFFSET [3/3]

#define RCC_CR_OFFSET   (RCC_OFFSET + 0x00U)

◆ RCC_CR_PLLON_BB [1/3]

#define RCC_CR_PLLON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))

◆ RCC_CR_PLLON_BB [2/3]

#define RCC_CR_PLLON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))

◆ RCC_CR_PLLON_BB [3/3]

#define RCC_CR_PLLON_BB   (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))

◆ RCC_CSR_LSION_BB [1/3]

#define RCC_CSR_LSION_BB   (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))

◆ RCC_CSR_LSION_BB [2/3]

#define RCC_CSR_LSION_BB   (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))

◆ RCC_CSR_LSION_BB [3/3]

#define RCC_CSR_LSION_BB   (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))

◆ RCC_CSR_OFFSET [1/3]

#define RCC_CSR_OFFSET   (RCC_OFFSET + 0x74U)

◆ RCC_CSR_OFFSET [2/3]

#define RCC_CSR_OFFSET   (RCC_OFFSET + 0x74U)

◆ RCC_CSR_OFFSET [3/3]

#define RCC_CSR_OFFSET   (RCC_OFFSET + 0x74U)

◆ RCC_CSSON_BIT_NUMBER [1/3]

#define RCC_CSSON_BIT_NUMBER   0x13U

◆ RCC_CSSON_BIT_NUMBER [2/3]

#define RCC_CSSON_BIT_NUMBER   0x13U

◆ RCC_CSSON_BIT_NUMBER [3/3]

#define RCC_CSSON_BIT_NUMBER   0x13U

◆ RCC_DBP_TIMEOUT_VALUE [1/3]

#define RCC_DBP_TIMEOUT_VALUE   2U

◆ RCC_DBP_TIMEOUT_VALUE [2/3]

#define RCC_DBP_TIMEOUT_VALUE   2U

◆ RCC_DBP_TIMEOUT_VALUE [3/3]

#define RCC_DBP_TIMEOUT_VALUE   2U

◆ RCC_HSION_BIT_NUMBER [1/3]

#define RCC_HSION_BIT_NUMBER   0x00U

◆ RCC_HSION_BIT_NUMBER [2/3]

#define RCC_HSION_BIT_NUMBER   0x00U

◆ RCC_HSION_BIT_NUMBER [3/3]

#define RCC_HSION_BIT_NUMBER   0x00U

◆ RCC_LSE_TIMEOUT_VALUE [1/3]

#define RCC_LSE_TIMEOUT_VALUE   LSE_STARTUP_TIMEOUT

◆ RCC_LSE_TIMEOUT_VALUE [2/3]

#define RCC_LSE_TIMEOUT_VALUE   LSE_STARTUP_TIMEOUT

◆ RCC_LSE_TIMEOUT_VALUE [3/3]

#define RCC_LSE_TIMEOUT_VALUE   LSE_STARTUP_TIMEOUT

◆ RCC_LSION_BIT_NUMBER [1/3]

#define RCC_LSION_BIT_NUMBER   0x00U

◆ RCC_LSION_BIT_NUMBER [2/3]

#define RCC_LSION_BIT_NUMBER   0x00U

◆ RCC_LSION_BIT_NUMBER [3/3]

#define RCC_LSION_BIT_NUMBER   0x00U

◆ RCC_OFFSET [1/3]

#define RCC_OFFSET   (RCC_BASE - PERIPH_BASE)

◆ RCC_OFFSET [2/3]

#define RCC_OFFSET   (RCC_BASE - PERIPH_BASE)

◆ RCC_OFFSET [3/3]

#define RCC_OFFSET   (RCC_BASE - PERIPH_BASE)

◆ RCC_PLLON_BIT_NUMBER [1/3]

#define RCC_PLLON_BIT_NUMBER   0x18U

◆ RCC_PLLON_BIT_NUMBER [2/3]

#define RCC_PLLON_BIT_NUMBER   0x18U

◆ RCC_PLLON_BIT_NUMBER [3/3]

#define RCC_PLLON_BIT_NUMBER   0x18U

◆ RCC_RTCEN_BIT_NUMBER [1/3]

#define RCC_RTCEN_BIT_NUMBER   0x0FU

◆ RCC_RTCEN_BIT_NUMBER [2/3]

#define RCC_RTCEN_BIT_NUMBER   0x0FU

◆ RCC_RTCEN_BIT_NUMBER [3/3]

#define RCC_RTCEN_BIT_NUMBER   0x0FU


picovoice_driver
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autogenerated on Fri Apr 1 2022 02:15:07