35 #ifndef _SAME70_RTT_COMPONENT_ 36 #define _SAME70_RTT_COMPONENT_ 44 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 54 #define RTT_MR_RTPRES_Pos 0 55 #define RTT_MR_RTPRES_Msk (0xffffu << RTT_MR_RTPRES_Pos) 56 #define RTT_MR_RTPRES(value) ((RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos))) 57 #define RTT_MR_ALMIEN (0x1u << 16) 58 #define RTT_MR_RTTINCIEN (0x1u << 17) 59 #define RTT_MR_RTTRST (0x1u << 18) 60 #define RTT_MR_RTTDIS (0x1u << 20) 61 #define RTT_MR_RTC1HZ (0x1u << 24) 63 #define RTT_AR_ALMV_Pos 0 64 #define RTT_AR_ALMV_Msk (0xffffffffu << RTT_AR_ALMV_Pos) 65 #define RTT_AR_ALMV(value) ((RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos))) 67 #define RTT_VR_CRTV_Pos 0 68 #define RTT_VR_CRTV_Msk (0xffffffffu << RTT_VR_CRTV_Pos) 70 #define RTT_SR_ALMS (0x1u << 0) 71 #define RTT_SR_RTTINC (0x1u << 1) __I uint32_t RTT_SR
(Rtt Offset: 0x0C) Status Register
__IO uint32_t RTT_AR
(Rtt Offset: 0x04) Alarm Register
__I uint32_t RTT_VR
(Rtt Offset: 0x08) Value Register
__IO uint32_t RTT_MR
(Rtt Offset: 0x00) Mode Register