Go to the documentation of this file. 35 #ifndef _SAME70_TWIHS2_INSTANCE_ 36 #define _SAME70_TWIHS2_INSTANCE_ 39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 40 #define REG_TWIHS2_CR (0x40060000U) 41 #define REG_TWIHS2_MMR (0x40060004U) 42 #define REG_TWIHS2_SMR (0x40060008U) 43 #define REG_TWIHS2_IADR (0x4006000CU) 44 #define REG_TWIHS2_CWGR (0x40060010U) 45 #define REG_TWIHS2_SR (0x40060020U) 46 #define REG_TWIHS2_IER (0x40060024U) 47 #define REG_TWIHS2_IDR (0x40060028U) 48 #define REG_TWIHS2_IMR (0x4006002CU) 49 #define REG_TWIHS2_RHR (0x40060030U) 50 #define REG_TWIHS2_THR (0x40060034U) 51 #define REG_TWIHS2_SMBTR (0x40060038U) 52 #define REG_TWIHS2_FILTR (0x40060044U) 53 #define REG_TWIHS2_SWMR (0x4006004CU) 54 #define REG_TWIHS2_DR (0x400600D0U) 55 #define REG_TWIHS2_WPMR (0x400600E4U) 56 #define REG_TWIHS2_WPSR (0x400600E8U) 57 #define REG_TWIHS2_VER (0x400600FCU) 59 #define REG_TWIHS2_CR (*(__O uint32_t*)0x40060000U) 60 #define REG_TWIHS2_MMR (*(__IO uint32_t*)0x40060004U) 61 #define REG_TWIHS2_SMR (*(__IO uint32_t*)0x40060008U) 62 #define REG_TWIHS2_IADR (*(__IO uint32_t*)0x4006000CU) 63 #define REG_TWIHS2_CWGR (*(__IO uint32_t*)0x40060010U) 64 #define REG_TWIHS2_SR (*(__I uint32_t*)0x40060020U) 65 #define REG_TWIHS2_IER (*(__O uint32_t*)0x40060024U) 66 #define REG_TWIHS2_IDR (*(__O uint32_t*)0x40060028U) 67 #define REG_TWIHS2_IMR (*(__I uint32_t*)0x4006002CU) 68 #define REG_TWIHS2_RHR (*(__I uint32_t*)0x40060030U) 69 #define REG_TWIHS2_THR (*(__O uint32_t*)0x40060034U) 70 #define REG_TWIHS2_SMBTR (*(__IO uint32_t*)0x40060038U) 71 #define REG_TWIHS2_FILTR (*(__IO uint32_t*)0x40060044U) 72 #define REG_TWIHS2_SWMR (*(__IO uint32_t*)0x4006004CU) 73 #define REG_TWIHS2_DR (*(__I uint32_t*)0x400600D0U) 74 #define REG_TWIHS2_WPMR (*(__IO uint32_t*)0x400600E4U) 75 #define REG_TWIHS2_WPSR (*(__I uint32_t*)0x400600E8U) 76 #define REG_TWIHS2_VER (*(__I uint32_t*)0x400600FCU)