Public Attributes | List of all members

Usart hardware registers. More...

#include <usart.h>

Public Attributes

__I uint32_t Reserved1 [5]
 
__I uint32_t Reserved2 [1]
 
__I uint32_t Reserved3 [22]
 
__I uint32_t Reserved4 [4]
 
__IO uint32_t US_BRGR
 (Usart Offset: 0x0020) Baud Rate Generator Register More...
 
__O uint32_t US_CR
 (Usart Offset: 0x0000) Control Register More...
 
__I uint32_t US_CSR
 (Usart Offset: 0x0014) Channel Status Register More...
 
__IO uint32_t US_FIDI
 (Usart Offset: 0x0040) FI DI Ratio Register More...
 
__IO uint32_t US_ICDIFF
 (Usart Offset: 0x0088) IC DIFF Register More...
 
__O uint32_t US_IDR
 (Usart Offset: 0x000C) Interrupt Disable Register More...
 
__IO uint32_t US_IDTRX
 (Usart Offset: 0x0084) LON IDT Rx Register More...
 
__IO uint32_t US_IDTTX
 (Usart Offset: 0x0080) LON IDT Tx Register More...
 
__O uint32_t US_IER
 (Usart Offset: 0x0008) Interrupt Enable Register More...
 
__IO uint32_t US_IF
 (Usart Offset: 0x004C) IrDA Filter Register More...
 
__I uint32_t US_IMR
 (Usart Offset: 0x0010) Interrupt Mask Register More...
 
__I uint32_t US_LINBRR
 (Usart Offset: 0x005C) LIN Baud Rate Register More...
 
__IO uint32_t US_LINIR
 (Usart Offset: 0x0058) LIN Identifier Register More...
 
__IO uint32_t US_LINMR
 (Usart Offset: 0x0054) LIN Mode Register More...
 
__IO uint32_t US_LONB1RX
 (Usart Offset: 0x0078) LON Beta1 Rx Register More...
 
__IO uint32_t US_LONB1TX
 (Usart Offset: 0x0074) LON Beta1 Tx Register More...
 
__I uint32_t US_LONBL
 (Usart Offset: 0x0070) LON Backlog Register More...
 
__IO uint32_t US_LONDL
 (Usart Offset: 0x0068) LON Data Length Register More...
 
__IO uint32_t US_LONL2HDR
 (Usart Offset: 0x006C) LON L2HDR Register More...
 
__IO uint32_t US_LONMR
 (Usart Offset: 0x0060) LON Mode Register More...
 
__IO uint32_t US_LONPR
 (Usart Offset: 0x0064) LON Preamble Register More...
 
__IO uint32_t US_LONPRIO
 (Usart Offset: 0x007C) LON Priority Register More...
 
__IO uint32_t US_MAN
 (Usart Offset: 0x0050) Manchester Configuration Register More...
 
__IO uint32_t US_MR
 (Usart Offset: 0x0004) Mode Register More...
 
__I uint32_t US_NER
 (Usart Offset: 0x0044) Number of Errors Register More...
 
__I uint32_t US_RHR
 (Usart Offset: 0x0018) Receive Holding Register More...
 
__IO uint32_t US_RTOR
 (Usart Offset: 0x0024) Receiver Time-out Register More...
 
__O uint32_t US_THR
 (Usart Offset: 0x001C) Transmit Holding Register More...
 
__IO uint32_t US_TTGR
 (Usart Offset: 0x0028) Transmitter Timeguard Register More...
 
__I uint32_t US_VERSION
 (Usart Offset: 0x00FC) Version Register More...
 
__IO uint32_t US_WPMR
 (Usart Offset: 0x00E4) Write Protection Mode Register More...
 
__I uint32_t US_WPSR
 (Usart Offset: 0x00E8) Write Protection Status Register More...
 

Detailed Description

Usart hardware registers.

Definition at line 46 of file utils/cmsis/same70/include/component/usart.h.

Member Data Documentation

◆ Reserved1

__I uint32_t Usart::Reserved1[5]

Definition at line 58 of file utils/cmsis/same70/include/component/usart.h.

◆ Reserved2

__I uint32_t Usart::Reserved2[1]

Definition at line 61 of file utils/cmsis/same70/include/component/usart.h.

◆ Reserved3

__I uint32_t Usart::Reserved3[22]

Definition at line 78 of file utils/cmsis/same70/include/component/usart.h.

◆ Reserved4

__I uint32_t Usart::Reserved4[4]

Definition at line 81 of file utils/cmsis/same70/include/component/usart.h.

◆ US_BRGR

__IO uint32_t Usart::US_BRGR

(Usart Offset: 0x0020) Baud Rate Generator Register

Definition at line 55 of file utils/cmsis/same70/include/component/usart.h.

◆ US_CR

__O uint32_t Usart::US_CR

(Usart Offset: 0x0000) Control Register

Definition at line 47 of file utils/cmsis/same70/include/component/usart.h.

◆ US_CSR

__I uint32_t Usart::US_CSR

(Usart Offset: 0x0014) Channel Status Register

Definition at line 52 of file utils/cmsis/same70/include/component/usart.h.

◆ US_FIDI

__IO uint32_t Usart::US_FIDI

(Usart Offset: 0x0040) FI DI Ratio Register

Definition at line 59 of file utils/cmsis/same70/include/component/usart.h.

◆ US_ICDIFF

__IO uint32_t Usart::US_ICDIFF

(Usart Offset: 0x0088) IC DIFF Register

Definition at line 77 of file utils/cmsis/same70/include/component/usart.h.

◆ US_IDR

__O uint32_t Usart::US_IDR

(Usart Offset: 0x000C) Interrupt Disable Register

Definition at line 50 of file utils/cmsis/same70/include/component/usart.h.

◆ US_IDTRX

__IO uint32_t Usart::US_IDTRX

(Usart Offset: 0x0084) LON IDT Rx Register

Definition at line 76 of file utils/cmsis/same70/include/component/usart.h.

◆ US_IDTTX

__IO uint32_t Usart::US_IDTTX

(Usart Offset: 0x0080) LON IDT Tx Register

Definition at line 75 of file utils/cmsis/same70/include/component/usart.h.

◆ US_IER

__O uint32_t Usart::US_IER

(Usart Offset: 0x0008) Interrupt Enable Register

Definition at line 49 of file utils/cmsis/same70/include/component/usart.h.

◆ US_IF

__IO uint32_t Usart::US_IF

(Usart Offset: 0x004C) IrDA Filter Register

Definition at line 62 of file utils/cmsis/same70/include/component/usart.h.

◆ US_IMR

__I uint32_t Usart::US_IMR

(Usart Offset: 0x0010) Interrupt Mask Register

Definition at line 51 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LINBRR

__I uint32_t Usart::US_LINBRR

(Usart Offset: 0x005C) LIN Baud Rate Register

Definition at line 66 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LINIR

__IO uint32_t Usart::US_LINIR

(Usart Offset: 0x0058) LIN Identifier Register

Definition at line 65 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LINMR

__IO uint32_t Usart::US_LINMR

(Usart Offset: 0x0054) LIN Mode Register

Definition at line 64 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONB1RX

__IO uint32_t Usart::US_LONB1RX

(Usart Offset: 0x0078) LON Beta1 Rx Register

Definition at line 73 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONB1TX

__IO uint32_t Usart::US_LONB1TX

(Usart Offset: 0x0074) LON Beta1 Tx Register

Definition at line 72 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONBL

__I uint32_t Usart::US_LONBL

(Usart Offset: 0x0070) LON Backlog Register

Definition at line 71 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONDL

__IO uint32_t Usart::US_LONDL

(Usart Offset: 0x0068) LON Data Length Register

Definition at line 69 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONL2HDR

__IO uint32_t Usart::US_LONL2HDR

(Usart Offset: 0x006C) LON L2HDR Register

Definition at line 70 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONMR

__IO uint32_t Usart::US_LONMR

(Usart Offset: 0x0060) LON Mode Register

Definition at line 67 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONPR

__IO uint32_t Usart::US_LONPR

(Usart Offset: 0x0064) LON Preamble Register

Definition at line 68 of file utils/cmsis/same70/include/component/usart.h.

◆ US_LONPRIO

__IO uint32_t Usart::US_LONPRIO

(Usart Offset: 0x007C) LON Priority Register

Definition at line 74 of file utils/cmsis/same70/include/component/usart.h.

◆ US_MAN

__IO uint32_t Usart::US_MAN

(Usart Offset: 0x0050) Manchester Configuration Register

Definition at line 63 of file utils/cmsis/same70/include/component/usart.h.

◆ US_MR

__IO uint32_t Usart::US_MR

(Usart Offset: 0x0004) Mode Register

Definition at line 48 of file utils/cmsis/same70/include/component/usart.h.

◆ US_NER

__I uint32_t Usart::US_NER

(Usart Offset: 0x0044) Number of Errors Register

Definition at line 60 of file utils/cmsis/same70/include/component/usart.h.

◆ US_RHR

__I uint32_t Usart::US_RHR

(Usart Offset: 0x0018) Receive Holding Register

Definition at line 53 of file utils/cmsis/same70/include/component/usart.h.

◆ US_RTOR

__IO uint32_t Usart::US_RTOR

(Usart Offset: 0x0024) Receiver Time-out Register

Definition at line 56 of file utils/cmsis/same70/include/component/usart.h.

◆ US_THR

__O uint32_t Usart::US_THR

(Usart Offset: 0x001C) Transmit Holding Register

Definition at line 54 of file utils/cmsis/same70/include/component/usart.h.

◆ US_TTGR

__IO uint32_t Usart::US_TTGR

(Usart Offset: 0x0028) Transmitter Timeguard Register

Definition at line 57 of file utils/cmsis/same70/include/component/usart.h.

◆ US_VERSION

__I uint32_t Usart::US_VERSION

(Usart Offset: 0x00FC) Version Register

Definition at line 82 of file utils/cmsis/same70/include/component/usart.h.

◆ US_WPMR

__IO uint32_t Usart::US_WPMR

(Usart Offset: 0x00E4) Write Protection Mode Register

Definition at line 79 of file utils/cmsis/same70/include/component/usart.h.

◆ US_WPSR

__I uint32_t Usart::US_WPSR

(Usart Offset: 0x00E8) Write Protection Status Register

Definition at line 80 of file utils/cmsis/same70/include/component/usart.h.


The documentation for this struct was generated from the following file:


inertial_sense_ros
Author(s):
autogenerated on Sat Sep 19 2020 03:19:10