PwmCh_num hardware registers.
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#include <pwm.h>
PwmCh_num hardware registers.
Definition at line 46 of file pwm.h.
◆ PWM_CCNT
| __I uint32_t PwmCh_num::PWM_CCNT |
(PwmCh_num Offset: 0x14) PWM Channel Counter Register
Definition at line 52 of file pwm.h.
◆ PWM_CDTY
| __IO uint32_t PwmCh_num::PWM_CDTY |
(PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register
Definition at line 48 of file pwm.h.
◆ PWM_CDTYUPD
| __O uint32_t PwmCh_num::PWM_CDTYUPD |
(PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register
Definition at line 49 of file pwm.h.
◆ PWM_CMR
| __IO uint32_t PwmCh_num::PWM_CMR |
(PwmCh_num Offset: 0x0) PWM Channel Mode Register
Definition at line 47 of file pwm.h.
◆ PWM_CPRD
| __IO uint32_t PwmCh_num::PWM_CPRD |
(PwmCh_num Offset: 0xC) PWM Channel Period Register
Definition at line 50 of file pwm.h.
◆ PWM_CPRDUPD
| __O uint32_t PwmCh_num::PWM_CPRDUPD |
(PwmCh_num Offset: 0x10) PWM Channel Period Update Register
Definition at line 51 of file pwm.h.
◆ PWM_DT
| __IO uint32_t PwmCh_num::PWM_DT |
(PwmCh_num Offset: 0x18) PWM Channel Dead Time Register
Definition at line 53 of file pwm.h.
◆ PWM_DTUPD
| __O uint32_t PwmCh_num::PWM_DTUPD |
(PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register
Definition at line 54 of file pwm.h.
The documentation for this struct was generated from the following file: