Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm7.h>

Public Attributes
__IO uint32_t	IABR [8]

__IO uint32_t	ICER [8]

__IO uint32_t	ICPR [8]

__IO uint8_t	IP [240]

__IO uint32_t	ISER [8]

__IO uint32_t	ISPR [8]

uint32_t	RESERVED0 [24]

uint32_t	RESERVED2 [24]

uint32_t	RESERVED3 [24]

uint32_t	RESERVED4 [56]

uint32_t	RESERVED5 [644]

uint32_t	RSERVED1 [24]

__O uint32_t	STIR

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Definition at line 380 of file core_cm7.h.

Member Data Documentation

◆ IABR

__IO uint32_t NVIC_Type::IABR[8]

Offset: 0x200 (R/W) Interrupt Active bit Register

Definition at line 390 of file core_cm7.h.

◆ ICER

__IO uint32_t NVIC_Type::ICER[8]

Offset: 0x080 (R/W) Interrupt Clear Enable Register

Definition at line 384 of file core_cm7.h.

◆ ICPR

__IO uint32_t NVIC_Type::ICPR[8]

Offset: 0x180 (R/W) Interrupt Clear Pending Register

Definition at line 388 of file core_cm7.h.

◆ IP

__IO uint8_t NVIC_Type::IP[240]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 392 of file core_cm7.h.

◆ ISER

__IO uint32_t NVIC_Type::ISER[8]

Offset: 0x000 (R/W) Interrupt Set Enable Register

Definition at line 382 of file core_cm7.h.

◆ ISPR

__IO uint32_t NVIC_Type::ISPR[8]

Offset: 0x100 (R/W) Interrupt Set Pending Register

Definition at line 386 of file core_cm7.h.

◆ RESERVED0

uint32_t NVIC_Type::RESERVED0[24]

Definition at line 383 of file core_cm7.h.

◆ RESERVED2

uint32_t NVIC_Type::RESERVED2[24]

Definition at line 387 of file core_cm7.h.

◆ RESERVED3

uint32_t NVIC_Type::RESERVED3[24]

Definition at line 389 of file core_cm7.h.

◆ RESERVED4

uint32_t NVIC_Type::RESERVED4[56]

Definition at line 391 of file core_cm7.h.

◆ RESERVED5

uint32_t NVIC_Type::RESERVED5[644]

Definition at line 393 of file core_cm7.h.

◆ RSERVED1

uint32_t NVIC_Type::RSERVED1[24]

Definition at line 385 of file core_cm7.h.

◆ STIR

__O uint32_t NVIC_Type::STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

Definition at line 394 of file core_cm7.h.

The documentation for this struct was generated from the following file:

core_cm7.h

Public Attributes