Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...
#include <core_cm7.h>
Public Attributes | |
__I uint32_t | CID0 |
__I uint32_t | CID1 |
__I uint32_t | CID2 |
__I uint32_t | CID3 |
__IO uint32_t | IMCR |
__I uint32_t | IRR |
__O uint32_t | IWR |
__O uint32_t | LAR |
__I uint32_t | LSR |
__I uint32_t | PID0 |
__I uint32_t | PID1 |
__I uint32_t | PID2 |
__I uint32_t | PID3 |
__I uint32_t | PID4 |
__I uint32_t | PID5 |
__I uint32_t | PID6 |
__I uint32_t | PID7 |
union { | |
__O uint16_t u16 | |
__O uint32_t u32 | |
__O uint8_t u8 | |
} | PORT [32] |
uint32_t | RESERVED0 [864] |
uint32_t | RESERVED1 [15] |
uint32_t | RESERVED2 [15] |
uint32_t | RESERVED3 [29] |
uint32_t | RESERVED4 [43] |
uint32_t | RESERVED5 [6] |
__IO uint32_t | TCR |
__IO uint32_t | TER |
__IO uint32_t | TPR |
Structure type to access the Instrumentation Trace Macrocell Register (ITM).
Definition at line 883 of file core_cm7.h.
__I uint32_t ITM_Type::CID0 |
Offset: 0xFF0 (R/ ) ITM Component Identification Register #0
Definition at line 913 of file core_cm7.h.
__I uint32_t ITM_Type::CID1 |
Offset: 0xFF4 (R/ ) ITM Component Identification Register #1
Definition at line 914 of file core_cm7.h.
__I uint32_t ITM_Type::CID2 |
Offset: 0xFF8 (R/ ) ITM Component Identification Register #2
Definition at line 915 of file core_cm7.h.
__I uint32_t ITM_Type::CID3 |
Offset: 0xFFC (R/ ) ITM Component Identification Register #3
Definition at line 916 of file core_cm7.h.
__IO uint32_t ITM_Type::IMCR |
Offset: 0xF00 (R/W) ITM Integration Mode Control Register
Definition at line 900 of file core_cm7.h.
__I uint32_t ITM_Type::IRR |
Offset: 0xEFC (R/ ) ITM Integration Read Register
Definition at line 899 of file core_cm7.h.
__O uint32_t ITM_Type::IWR |
Offset: 0xEF8 ( /W) ITM Integration Write Register
Definition at line 898 of file core_cm7.h.
__O uint32_t ITM_Type::LAR |
Offset: 0xFB0 ( /W) ITM Lock Access Register
Definition at line 902 of file core_cm7.h.
__I uint32_t ITM_Type::LSR |
Offset: 0xFB4 (R/ ) ITM Lock Status Register
Definition at line 903 of file core_cm7.h.
__I uint32_t ITM_Type::PID0 |
Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0
Definition at line 909 of file core_cm7.h.
__I uint32_t ITM_Type::PID1 |
Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1
Definition at line 910 of file core_cm7.h.
__I uint32_t ITM_Type::PID2 |
Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2
Definition at line 911 of file core_cm7.h.
__I uint32_t ITM_Type::PID3 |
Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3
Definition at line 912 of file core_cm7.h.
__I uint32_t ITM_Type::PID4 |
Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4
Definition at line 905 of file core_cm7.h.
__I uint32_t ITM_Type::PID5 |
Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5
Definition at line 906 of file core_cm7.h.
__I uint32_t ITM_Type::PID6 |
Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6
Definition at line 907 of file core_cm7.h.
__I uint32_t ITM_Type::PID7 |
Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7
Definition at line 908 of file core_cm7.h.
__O { ... } ITM_Type::PORT[32] |
Offset: 0x000 ( /W) ITM Stimulus Port Registers
uint32_t ITM_Type::RESERVED0[864] |
Definition at line 891 of file core_cm7.h.
uint32_t ITM_Type::RESERVED1[15] |
Definition at line 893 of file core_cm7.h.
uint32_t ITM_Type::RESERVED2[15] |
Definition at line 895 of file core_cm7.h.
uint32_t ITM_Type::RESERVED3[29] |
Definition at line 897 of file core_cm7.h.
uint32_t ITM_Type::RESERVED4[43] |
Definition at line 901 of file core_cm7.h.
uint32_t ITM_Type::RESERVED5[6] |
Definition at line 904 of file core_cm7.h.
__IO uint32_t ITM_Type::TCR |
Offset: 0xE80 (R/W) ITM Trace Control Register
Definition at line 896 of file core_cm7.h.
__IO uint32_t ITM_Type::TER |
Offset: 0xE00 (R/W) ITM Trace Enable Register
Definition at line 892 of file core_cm7.h.
__IO uint32_t ITM_Type::TPR |
Offset: 0xE40 (R/W) ITM Trace Privilege Register
Definition at line 894 of file core_cm7.h.
__O uint16_t ITM_Type::u16 |
Offset: 0x000 ( /W) ITM Stimulus Port 16-bit
Definition at line 888 of file core_cm7.h.
__O uint32_t ITM_Type::u32 |
Offset: 0x000 ( /W) ITM Stimulus Port 32-bit
Definition at line 889 of file core_cm7.h.
__O uint8_t ITM_Type::u8 |
Offset: 0x000 ( /W) ITM Stimulus Port 8-bit
Definition at line 887 of file core_cm7.h.