Public Attributes | List of all members
Gmac Struct Reference

#include <gmac.h>

Public Attributes

__I uint32_t GMAC_AE
 (Gmac Offset: 0x19C) Alignment Errors Register More...
 
__I uint32_t GMAC_BCFR
 (Gmac Offset: 0x15C) Broadcast Frames Received Register More...
 
__I uint32_t GMAC_BCFT
 (Gmac Offset: 0x10C) Broadcast Frames Transmitted Register More...
 
__I uint32_t GMAC_BFR64
 (Gmac Offset: 0x168) 64 Byte Frames Received Register More...
 
__I uint32_t GMAC_BFT64
 (Gmac Offset: 0x118) 64 Byte Frames Transmitted Register More...
 
__IO uint32_t GMAC_CBSCR
 (Gmac Offset: 0x4BC) Credit-Based Shaping Control Register More...
 
__IO uint32_t GMAC_CBSISQA
 (Gmac Offset: 0x4C0) Credit-Based Shaping IdleSlope Register for Queue A More...
 
__IO uint32_t GMAC_CBSISQB
 (Gmac Offset: 0x4C4) Credit-Based Shaping IdleSlope Register for Queue B More...
 
__I uint32_t GMAC_CSE
 (Gmac Offset: 0x14C) Carrier Sense Errors Register More...
 
__IO uint32_t GMAC_DCFGR
 (Gmac Offset: 0x010) DMA Configuration Register More...
 
__I uint32_t GMAC_DTF
 (Gmac Offset: 0x148) Deferred Transmission Frames Register More...
 
__I uint32_t GMAC_EC
 (Gmac Offset: 0x140) Excessive Collisions Register More...
 
__I uint32_t GMAC_EFRN
 (Gmac Offset: 0x1EC) PTP Event Frame Received Nanoseconds Register More...
 
__I uint32_t GMAC_EFRSH
 (Gmac Offset: 0x0EC) PTP Event Frame Received Seconds High Register More...
 
__I uint32_t GMAC_EFRSL
 (Gmac Offset: 0x1E8) PTP Event Frame Received Seconds Low Register More...
 
__I uint32_t GMAC_EFTN
 (Gmac Offset: 0x1E4) PTP Event Frame Transmitted Nanoseconds Register More...
 
__I uint32_t GMAC_EFTSH
 (Gmac Offset: 0x0E8) PTP Event Frame Transmitted Seconds High Register More...
 
__I uint32_t GMAC_EFTSL
 (Gmac Offset: 0x1E0) PTP Event Frame Transmitted Seconds Low Register More...
 
__I uint32_t GMAC_FCSE
 (Gmac Offset: 0x190) Frame Check Sequence Errors Register More...
 
__I uint32_t GMAC_FR
 (Gmac Offset: 0x158) Frames Received Register More...
 
__I uint32_t GMAC_FT
 (Gmac Offset: 0x108) Frames Transmitted Register More...
 
__I uint32_t GMAC_GTBFT1518
 (Gmac Offset: 0x130) Greater Than 1518 Byte Frames Transmitted Register More...
 
__IO uint32_t GMAC_HRB
 (Gmac Offset: 0x080) Hash Register Bottom More...
 
__IO uint32_t GMAC_HRT
 (Gmac Offset: 0x084) Hash Register Top More...
 
__O uint32_t GMAC_IDR
 (Gmac Offset: 0x02C) Interrupt Disable Register More...
 
__O uint32_t GMAC_IDRPQ [5]
 (Gmac Offset: 0x61C) Interrupt Disable Register Priority Queue (index = 1) More...
 
__O uint32_t GMAC_IER
 (Gmac Offset: 0x028) Interrupt Enable Register More...
 
__O uint32_t GMAC_IERPQ [5]
 (Gmac Offset: 0x5FC) Interrupt Enable Register Priority Queue (index = 1) More...
 
__I uint32_t GMAC_IHCE
 (Gmac Offset: 0x1A8) IP Header Checksum Errors Register More...
 
__IO uint32_t GMAC_IMR
 (Gmac Offset: 0x030) Interrupt Mask Register More...
 
__IO uint32_t GMAC_IMRPQ [5]
 (Gmac Offset: 0x63C) Interrupt Mask Register Priority Queue (index = 1) More...
 
__IO uint32_t GMAC_IPGS
 (Gmac Offset: 0x0BC) IPG Stretch Register More...
 
__I uint32_t GMAC_ISR
 (Gmac Offset: 0x024) Interrupt Status Register More...
 
__I uint32_t GMAC_ISRPQ [5]
 (Gmac Offset: 0x400) Interrupt Status Register Priority Queue (index = 1) More...
 
__I uint32_t GMAC_JR
 (Gmac Offset: 0x18C) Jabbers Received Register More...
 
__I uint32_t GMAC_LC
 (Gmac Offset: 0x144) Late Collisions Register More...
 
__I uint32_t GMAC_LFFE
 (Gmac Offset: 0x194) Length Field Frame Errors Register More...
 
__IO uint32_t GMAC_MAN
 (Gmac Offset: 0x034) PHY Maintenance Register More...
 
__I uint32_t GMAC_MCF
 (Gmac Offset: 0x13C) Multiple Collision Frames Register More...
 
__I uint32_t GMAC_MFR
 (Gmac Offset: 0x160) Multicast Frames Received Register More...
 
__I uint32_t GMAC_MFT
 (Gmac Offset: 0x110) Multicast Frames Transmitted Register More...
 
__I uint32_t GMAC_MID
 (Gmac Offset: 0x0FC) Module ID Register More...
 
__IO uint32_t GMAC_NCFGR
 (Gmac Offset: 0x004) Network Configuration Register More...
 
__IO uint32_t GMAC_NCR
 (Gmac Offset: 0x000) Network Control Register More...
 
__IO uint32_t GMAC_NSC
 (Gmac Offset: 0x0DC) 1588 Timer Nanosecond Comparison Register More...
 
__I uint32_t GMAC_NSR
 (Gmac Offset: 0x008) Network Status Register More...
 
__I uint32_t GMAC_OFR
 (Gmac Offset: 0x188) Oversize Frames Received Register More...
 
__I uint32_t GMAC_ORHI
 (Gmac Offset: 0x154) Octets Received High Received Register More...
 
__I uint32_t GMAC_ORLO
 (Gmac Offset: 0x150) Octets Received Low Received Register More...
 
__I uint32_t GMAC_OTHI
 (Gmac Offset: 0x104) Octets Transmitted High Register More...
 
__I uint32_t GMAC_OTLO
 (Gmac Offset: 0x100) Octets Transmitted Low Register More...
 
__I uint32_t GMAC_PEFRN
 (Gmac Offset: 0x1FC) PTP Peer Event Frame Received Nanoseconds Register More...
 
__I uint32_t GMAC_PEFRSH
 (Gmac Offset: 0x0F4) PTP Peer Event Frame Received Seconds High Register More...
 
__I uint32_t GMAC_PEFRSL
 (Gmac Offset: 0x1F8) PTP Peer Event Frame Received Seconds Low Register More...
 
__I uint32_t GMAC_PEFTN
 (Gmac Offset: 0x1F4) PTP Peer Event Frame Transmitted Nanoseconds Register More...
 
__I uint32_t GMAC_PEFTSH
 (Gmac Offset: 0x0F0) PTP Peer Event Frame Transmitted Seconds High Register More...
 
__I uint32_t GMAC_PEFTSL
 (Gmac Offset: 0x1F0) PTP Peer Event Frame Transmitted Seconds Low Register More...
 
__I uint32_t GMAC_PFR
 (Gmac Offset: 0x164) Pause Frames Received Register More...
 
__I uint32_t GMAC_PFT
 (Gmac Offset: 0x114) Pause Frames Transmitted Register More...
 
__IO uint32_t GMAC_RBQB
 (Gmac Offset: 0x018) Receive Buffer Queue Base Address Register More...
 
__IO uint32_t GMAC_RBQBAPQ [5]
 (Gmac Offset: 0x480) Receive Buffer Queue Base Address Register Priority Queue (index = 1) More...
 
__IO uint32_t GMAC_RBSRPQ [5]
 (Gmac Offset: 0x4A0) Receive Buffer Size Register Priority Queue (index = 1) More...
 
__IO uint32_t GMAC_RJFML
 (Gmac Offset: 0x048) RX Jumbo Frame Max Length Register More...
 
__I uint32_t GMAC_ROE
 (Gmac Offset: 0x1A4) Receive Overrun Register More...
 
__I uint32_t GMAC_RPQ
 (Gmac Offset: 0x038) Received Pause Quantum Register More...
 
__IO uint32_t GMAC_RPSF
 (Gmac Offset: 0x044) RX Partial Store and Forward Register More...
 
__I uint32_t GMAC_RRE
 (Gmac Offset: 0x1A0) Receive Resource Errors Register More...
 
__I uint32_t GMAC_RSE
 (Gmac Offset: 0x198) Receive Symbol Errors Register More...
 
__IO uint32_t GMAC_RSR
 (Gmac Offset: 0x020) Receive Status Register More...
 
__I uint32_t GMAC_RXLPI
 (Gmac Offset: 0x270) Received LPI Transitions More...
 
__I uint32_t GMAC_RXLPITIME
 (Gmac Offset: 0x274) Received LPI Time More...
 
GmacSa GMAC_SA [GMACSA_NUMBER]
 (Gmac Offset: 0x088) 1 .. 4 More...
 
__IO uint32_t GMAC_SAMB1
 (Gmac Offset: 0x0C8) Specific Address 1 Mask Bottom Register More...
 
__IO uint32_t GMAC_SAMT1
 (Gmac Offset: 0x0CC) Specific Address 1 Mask Top Register More...
 
__I uint32_t GMAC_SCF
 (Gmac Offset: 0x138) Single Collision Frames Register More...
 
__IO uint32_t GMAC_SCH
 (Gmac Offset: 0x0E4) 1588 Timer Second Comparison High Register More...
 
__IO uint32_t GMAC_SCL
 (Gmac Offset: 0x0E0) 1588 Timer Second Comparison Low Register More...
 
__IO uint32_t GMAC_ST1RPQ [4]
 (Gmac Offset: 0x500) Screening Type 1 Register Priority Queue (index = 0) More...
 
__IO uint32_t GMAC_ST2CW00
 (Gmac Offset: 0x700) Screening Type 2 Compare Word 0 Register (index = 0) More...
 
__IO uint32_t GMAC_ST2CW01
 (Gmac Offset: 0x708) Screening Type 2 Compare Word 0 Register (index = 1) More...
 
__IO uint32_t GMAC_ST2CW010
 (Gmac Offset: 0x750) Screening Type 2 Compare Word 0 Register (index = 10) More...
 
__IO uint32_t GMAC_ST2CW011
 (Gmac Offset: 0x758) Screening Type 2 Compare Word 0 Register (index = 11) More...
 
__IO uint32_t GMAC_ST2CW012
 (Gmac Offset: 0x760) Screening Type 2 Compare Word 0 Register (index = 12) More...
 
__IO uint32_t GMAC_ST2CW013
 (Gmac Offset: 0x768) Screening Type 2 Compare Word 0 Register (index = 13) More...
 
__IO uint32_t GMAC_ST2CW014
 (Gmac Offset: 0x770) Screening Type 2 Compare Word 0 Register (index = 14) More...
 
__IO uint32_t GMAC_ST2CW015
 (Gmac Offset: 0x778) Screening Type 2 Compare Word 0 Register (index = 15) More...
 
__IO uint32_t GMAC_ST2CW016
 (Gmac Offset: 0x780) Screening Type 2 Compare Word 0 Register (index = 16) More...
 
__IO uint32_t GMAC_ST2CW017
 (Gmac Offset: 0x788) Screening Type 2 Compare Word 0 Register (index = 17) More...
 
__IO uint32_t GMAC_ST2CW018
 (Gmac Offset: 0x790) Screening Type 2 Compare Word 0 Register (index = 18) More...
 
__IO uint32_t GMAC_ST2CW019
 (Gmac Offset: 0x798) Screening Type 2 Compare Word 0 Register (index = 19) More...
 
__IO uint32_t GMAC_ST2CW02
 (Gmac Offset: 0x710) Screening Type 2 Compare Word 0 Register (index = 2) More...
 
__IO uint32_t GMAC_ST2CW020
 (Gmac Offset: 0x7A0) Screening Type 2 Compare Word 0 Register (index = 20) More...
 
__IO uint32_t GMAC_ST2CW021
 (Gmac Offset: 0x7A8) Screening Type 2 Compare Word 0 Register (index = 21) More...
 
__IO uint32_t GMAC_ST2CW022
 (Gmac Offset: 0x7B0) Screening Type 2 Compare Word 0 Register (index = 22) More...
 
__IO uint32_t GMAC_ST2CW023
 (Gmac Offset: 0x7B8) Screening Type 2 Compare Word 0 Register (index = 23) More...
 
__IO uint32_t GMAC_ST2CW03
 (Gmac Offset: 0x718) Screening Type 2 Compare Word 0 Register (index = 3) More...
 
__IO uint32_t GMAC_ST2CW04
 (Gmac Offset: 0x720) Screening Type 2 Compare Word 0 Register (index = 4) More...
 
__IO uint32_t GMAC_ST2CW05
 (Gmac Offset: 0x728) Screening Type 2 Compare Word 0 Register (index = 5) More...
 
__IO uint32_t GMAC_ST2CW06
 (Gmac Offset: 0x730) Screening Type 2 Compare Word 0 Register (index = 6) More...
 
__IO uint32_t GMAC_ST2CW07
 (Gmac Offset: 0x738) Screening Type 2 Compare Word 0 Register (index = 7) More...
 
__IO uint32_t GMAC_ST2CW08
 (Gmac Offset: 0x740) Screening Type 2 Compare Word 0 Register (index = 8) More...
 
__IO uint32_t GMAC_ST2CW09
 (Gmac Offset: 0x748) Screening Type 2 Compare Word 0 Register (index = 9) More...
 
__IO uint32_t GMAC_ST2CW10
 (Gmac Offset: 0x704) Screening Type 2 Compare Word 1 Register (index = 0) More...
 
__IO uint32_t GMAC_ST2CW11
 (Gmac Offset: 0x70C) Screening Type 2 Compare Word 1 Register (index = 1) More...
 
__IO uint32_t GMAC_ST2CW110
 (Gmac Offset: 0x754) Screening Type 2 Compare Word 1 Register (index = 10) More...
 
__IO uint32_t GMAC_ST2CW111
 (Gmac Offset: 0x75C) Screening Type 2 Compare Word 1 Register (index = 11) More...
 
__IO uint32_t GMAC_ST2CW112
 (Gmac Offset: 0x764) Screening Type 2 Compare Word 1 Register (index = 12) More...
 
__IO uint32_t GMAC_ST2CW113
 (Gmac Offset: 0x76C) Screening Type 2 Compare Word 1 Register (index = 13) More...
 
__IO uint32_t GMAC_ST2CW114
 (Gmac Offset: 0x774) Screening Type 2 Compare Word 1 Register (index = 14) More...
 
__IO uint32_t GMAC_ST2CW115
 (Gmac Offset: 0x77C) Screening Type 2 Compare Word 1 Register (index = 15) More...
 
__IO uint32_t GMAC_ST2CW116
 (Gmac Offset: 0x784) Screening Type 2 Compare Word 1 Register (index = 16) More...
 
__IO uint32_t GMAC_ST2CW117
 (Gmac Offset: 0x78C) Screening Type 2 Compare Word 1 Register (index = 17) More...
 
__IO uint32_t GMAC_ST2CW118
 (Gmac Offset: 0x794) Screening Type 2 Compare Word 1 Register (index = 18) More...
 
__IO uint32_t GMAC_ST2CW119
 (Gmac Offset: 0x79C) Screening Type 2 Compare Word 1 Register (index = 19) More...
 
__IO uint32_t GMAC_ST2CW12
 (Gmac Offset: 0x714) Screening Type 2 Compare Word 1 Register (index = 2) More...
 
__IO uint32_t GMAC_ST2CW120
 (Gmac Offset: 0x7A4) Screening Type 2 Compare Word 1 Register (index = 20) More...
 
__IO uint32_t GMAC_ST2CW121
 (Gmac Offset: 0x7AC) Screening Type 2 Compare Word 1 Register (index = 21) More...
 
__IO uint32_t GMAC_ST2CW122
 (Gmac Offset: 0x7B4) Screening Type 2 Compare Word 1 Register (index = 22) More...
 
__IO uint32_t GMAC_ST2CW123
 (Gmac Offset: 0x7BC) Screening Type 2 Compare Word 1 Register (index = 23) More...
 
__IO uint32_t GMAC_ST2CW13
 (Gmac Offset: 0x71C) Screening Type 2 Compare Word 1 Register (index = 3) More...
 
__IO uint32_t GMAC_ST2CW14
 (Gmac Offset: 0x724) Screening Type 2 Compare Word 1 Register (index = 4) More...
 
__IO uint32_t GMAC_ST2CW15
 (Gmac Offset: 0x72C) Screening Type 2 Compare Word 1 Register (index = 5) More...
 
__IO uint32_t GMAC_ST2CW16
 (Gmac Offset: 0x734) Screening Type 2 Compare Word 1 Register (index = 6) More...
 
__IO uint32_t GMAC_ST2CW17
 (Gmac Offset: 0x73C) Screening Type 2 Compare Word 1 Register (index = 7) More...
 
__IO uint32_t GMAC_ST2CW18
 (Gmac Offset: 0x744) Screening Type 2 Compare Word 1 Register (index = 8) More...
 
__IO uint32_t GMAC_ST2CW19
 (Gmac Offset: 0x74C) Screening Type 2 Compare Word 1 Register (index = 9) More...
 
__IO uint32_t GMAC_ST2ER [4]
 (Gmac Offset: 0x6E0) Screening Type 2 Ethertype Register (index = 0) More...
 
__IO uint32_t GMAC_ST2RPQ [8]
 (Gmac Offset: 0x540) Screening Type 2 Register Priority Queue (index = 0) More...
 
__IO uint32_t GMAC_SVLAN
 (Gmac Offset: 0x0C0) Stacked VLAN Register More...
 
__O uint32_t GMAC_TA
 (Gmac Offset: 0x1D8) 1588 Timer Adjust Register More...
 
__I uint32_t GMAC_TBFR1023
 (Gmac Offset: 0x178) 512 to 1023 Byte Frames Received Register More...
 
__I uint32_t GMAC_TBFR127
 (Gmac Offset: 0x16C) 65 to 127 Byte Frames Received Register More...
 
__I uint32_t GMAC_TBFR1518
 (Gmac Offset: 0x17C) 1024 to 1518 Byte Frames Received Register More...
 
__I uint32_t GMAC_TBFR255
 (Gmac Offset: 0x170) 128 to 255 Byte Frames Received Register More...
 
__I uint32_t GMAC_TBFR511
 (Gmac Offset: 0x174) 256 to 511 Byte Frames Received Register More...
 
__I uint32_t GMAC_TBFT1023
 (Gmac Offset: 0x128) 512 to 1023 Byte Frames Transmitted Register More...
 
__I uint32_t GMAC_TBFT127
 (Gmac Offset: 0x11C) 65 to 127 Byte Frames Transmitted Register More...
 
__I uint32_t GMAC_TBFT1518
 (Gmac Offset: 0x12C) 1024 to 1518 Byte Frames Transmitted Register More...
 
__I uint32_t GMAC_TBFT255
 (Gmac Offset: 0x120) 128 to 255 Byte Frames Transmitted Register More...
 
__I uint32_t GMAC_TBFT511
 (Gmac Offset: 0x124) 256 to 511 Byte Frames Transmitted Register More...
 
__IO uint32_t GMAC_TBQB
 (Gmac Offset: 0x01C) Transmit Buffer Queue Base Address Register More...
 
__IO uint32_t GMAC_TBQBAPQ [5]
 (Gmac Offset: 0x440) Transmit Buffer Queue Base Address Register Priority Queue (index = 1) More...
 
__I uint32_t GMAC_TCE
 (Gmac Offset: 0x1AC) TCP Checksum Errors Register More...
 
__IO uint32_t GMAC_TI
 (Gmac Offset: 0x1DC) 1588 Timer Increment Register More...
 
__IO uint32_t GMAC_TIDM1
 (Gmac Offset: 0x0A8) Type ID Match 1 Register More...
 
__IO uint32_t GMAC_TIDM2
 (Gmac Offset: 0x0AC) Type ID Match 2 Register More...
 
__IO uint32_t GMAC_TIDM3
 (Gmac Offset: 0x0B0) Type ID Match 3 Register More...
 
__IO uint32_t GMAC_TIDM4
 (Gmac Offset: 0x0B4) Type ID Match 4 Register More...
 
__IO uint32_t GMAC_TISUBN
 (Gmac Offset: 0x1BC) 1588 Timer Increment Sub-nanoseconds Register More...
 
__I uint32_t GMAC_TMXBFR
 (Gmac Offset: 0x180) 1519 to Maximum Byte Frames Received Register More...
 
__IO uint32_t GMAC_TN
 (Gmac Offset: 0x1D4) 1588 Timer Nanoseconds Register More...
 
__IO uint32_t GMAC_TPFCP
 (Gmac Offset: 0x0C4) Transmit PFC Pause Register More...
 
__IO uint32_t GMAC_TPQ
 (Gmac Offset: 0x03C) Transmit Pause Quantum Register More...
 
__IO uint32_t GMAC_TPSF
 (Gmac Offset: 0x040) TX Partial Store and Forward Register More...
 
__IO uint32_t GMAC_TSH
 (Gmac Offset: 0x1C0) 1588 Timer Seconds High Register More...
 
__IO uint32_t GMAC_TSL
 (Gmac Offset: 0x1D0) 1588 Timer Seconds Low Register More...
 
__IO uint32_t GMAC_TSR
 (Gmac Offset: 0x014) Transmit Status Register More...
 
__I uint32_t GMAC_TUR
 (Gmac Offset: 0x134) Transmit Underruns Register More...
 
__I uint32_t GMAC_TXLPI
 (Gmac Offset: 0x278) Transmit LPI Transitions More...
 
__I uint32_t GMAC_TXLPITIME
 (Gmac Offset: 0x27C) Transmit LPI Time More...
 
__I uint32_t GMAC_UCE
 (Gmac Offset: 0x1B0) UDP Checksum Errors Register More...
 
__I uint32_t GMAC_UFR
 (Gmac Offset: 0x184) Undersize Frames Received Register More...
 
__IO uint32_t GMAC_UR
 (Gmac Offset: 0x00C) User Register More...
 
__IO uint32_t GMAC_WOL
 (Gmac Offset: 0x0B8) Wake on LAN Register More...
 
__I uint32_t Reserved1 [13]
 
__I uint32_t Reserved10 [3]
 
__I uint32_t Reserved11 [2]
 
__I uint32_t Reserved12 [14]
 
__I uint32_t Reserved13 [12]
 
__I uint32_t Reserved14 [39]
 
__I uint32_t Reserved15 [3]
 
__I uint32_t Reserved16 [3]
 
__I uint32_t Reserved17 [36]
 
__I uint32_t Reserved18 [4]
 
__I uint32_t Reserved2 [3]
 
__I uint32_t Reserved3 [1]
 
__I uint32_t Reserved4 [2]
 
__I uint32_t Reserved5 [3]
 
__I uint32_t Reserved6 [28]
 
__I uint32_t Reserved7 [96]
 
__I uint32_t Reserved8 [11]
 
__I uint32_t Reserved9 [11]
 

Detailed Description

Definition at line 52 of file component/gmac.h.

Member Data Documentation

◆ GMAC_AE

__I uint32_t Gmac::GMAC_AE

(Gmac Offset: 0x19C) Alignment Errors Register

Definition at line 135 of file component/gmac.h.

◆ GMAC_BCFR

__I uint32_t Gmac::GMAC_BCFR

(Gmac Offset: 0x15C) Broadcast Frames Received Register

Definition at line 119 of file component/gmac.h.

◆ GMAC_BCFT

__I uint32_t Gmac::GMAC_BCFT

(Gmac Offset: 0x10C) Broadcast Frames Transmitted Register

Definition at line 99 of file component/gmac.h.

◆ GMAC_BFR64

__I uint32_t Gmac::GMAC_BFR64

(Gmac Offset: 0x168) 64 Byte Frames Received Register

Definition at line 122 of file component/gmac.h.

◆ GMAC_BFT64

__I uint32_t Gmac::GMAC_BFT64

(Gmac Offset: 0x118) 64 Byte Frames Transmitted Register

Definition at line 102 of file component/gmac.h.

◆ GMAC_CBSCR

__IO uint32_t Gmac::GMAC_CBSCR

(Gmac Offset: 0x4BC) Credit-Based Shaping Control Register

Definition at line 171 of file component/gmac.h.

◆ GMAC_CBSISQA

__IO uint32_t Gmac::GMAC_CBSISQA

(Gmac Offset: 0x4C0) Credit-Based Shaping IdleSlope Register for Queue A

Definition at line 172 of file component/gmac.h.

◆ GMAC_CBSISQB

__IO uint32_t Gmac::GMAC_CBSISQB

(Gmac Offset: 0x4C4) Credit-Based Shaping IdleSlope Register for Queue B

Definition at line 173 of file component/gmac.h.

◆ GMAC_CSE

__I uint32_t Gmac::GMAC_CSE

(Gmac Offset: 0x14C) Carrier Sense Errors Register

Definition at line 115 of file component/gmac.h.

◆ GMAC_DCFGR

__IO uint32_t Gmac::GMAC_DCFGR

(Gmac Offset: 0x010) DMA Configuration Register

Definition at line 57 of file component/gmac.h.

◆ GMAC_DTF

__I uint32_t Gmac::GMAC_DTF

(Gmac Offset: 0x148) Deferred Transmission Frames Register

Definition at line 114 of file component/gmac.h.

◆ GMAC_EC

__I uint32_t Gmac::GMAC_EC

(Gmac Offset: 0x140) Excessive Collisions Register

Definition at line 112 of file component/gmac.h.

◆ GMAC_EFRN

__I uint32_t Gmac::GMAC_EFRN

(Gmac Offset: 0x1EC) PTP Event Frame Received Nanoseconds Register

Definition at line 152 of file component/gmac.h.

◆ GMAC_EFRSH

__I uint32_t Gmac::GMAC_EFRSH

(Gmac Offset: 0x0EC) PTP Event Frame Received Seconds High Register

Definition at line 91 of file component/gmac.h.

◆ GMAC_EFRSL

__I uint32_t Gmac::GMAC_EFRSL

(Gmac Offset: 0x1E8) PTP Event Frame Received Seconds Low Register

Definition at line 151 of file component/gmac.h.

◆ GMAC_EFTN

__I uint32_t Gmac::GMAC_EFTN

(Gmac Offset: 0x1E4) PTP Event Frame Transmitted Nanoseconds Register

Definition at line 150 of file component/gmac.h.

◆ GMAC_EFTSH

__I uint32_t Gmac::GMAC_EFTSH

(Gmac Offset: 0x0E8) PTP Event Frame Transmitted Seconds High Register

Definition at line 90 of file component/gmac.h.

◆ GMAC_EFTSL

__I uint32_t Gmac::GMAC_EFTSL

(Gmac Offset: 0x1E0) PTP Event Frame Transmitted Seconds Low Register

Definition at line 149 of file component/gmac.h.

◆ GMAC_FCSE

__I uint32_t Gmac::GMAC_FCSE

(Gmac Offset: 0x190) Frame Check Sequence Errors Register

Definition at line 132 of file component/gmac.h.

◆ GMAC_FR

__I uint32_t Gmac::GMAC_FR

(Gmac Offset: 0x158) Frames Received Register

Definition at line 118 of file component/gmac.h.

◆ GMAC_FT

__I uint32_t Gmac::GMAC_FT

(Gmac Offset: 0x108) Frames Transmitted Register

Definition at line 98 of file component/gmac.h.

◆ GMAC_GTBFT1518

__I uint32_t Gmac::GMAC_GTBFT1518

(Gmac Offset: 0x130) Greater Than 1518 Byte Frames Transmitted Register

Definition at line 108 of file component/gmac.h.

◆ GMAC_HRB

__IO uint32_t Gmac::GMAC_HRB

(Gmac Offset: 0x080) Hash Register Bottom

Definition at line 73 of file component/gmac.h.

◆ GMAC_HRT

__IO uint32_t Gmac::GMAC_HRT

(Gmac Offset: 0x084) Hash Register Top

Definition at line 74 of file component/gmac.h.

◆ GMAC_IDR

__O uint32_t Gmac::GMAC_IDR

(Gmac Offset: 0x02C) Interrupt Disable Register

Definition at line 64 of file component/gmac.h.

◆ GMAC_IDRPQ

__O uint32_t Gmac::GMAC_IDRPQ[5]

(Gmac Offset: 0x61C) Interrupt Disable Register Priority Queue (index = 1)

Definition at line 181 of file component/gmac.h.

◆ GMAC_IER

__O uint32_t Gmac::GMAC_IER

(Gmac Offset: 0x028) Interrupt Enable Register

Definition at line 63 of file component/gmac.h.

◆ GMAC_IERPQ

__O uint32_t Gmac::GMAC_IERPQ[5]

(Gmac Offset: 0x5FC) Interrupt Enable Register Priority Queue (index = 1)

Definition at line 179 of file component/gmac.h.

◆ GMAC_IHCE

__I uint32_t Gmac::GMAC_IHCE

(Gmac Offset: 0x1A8) IP Header Checksum Errors Register

Definition at line 138 of file component/gmac.h.

◆ GMAC_IMR

__IO uint32_t Gmac::GMAC_IMR

(Gmac Offset: 0x030) Interrupt Mask Register

Definition at line 65 of file component/gmac.h.

◆ GMAC_IMRPQ

__IO uint32_t Gmac::GMAC_IMRPQ[5]

(Gmac Offset: 0x63C) Interrupt Mask Register Priority Queue (index = 1)

Definition at line 183 of file component/gmac.h.

◆ GMAC_IPGS

__IO uint32_t Gmac::GMAC_IPGS

(Gmac Offset: 0x0BC) IPG Stretch Register

Definition at line 81 of file component/gmac.h.

◆ GMAC_ISR

__I uint32_t Gmac::GMAC_ISR

(Gmac Offset: 0x024) Interrupt Status Register

Definition at line 62 of file component/gmac.h.

◆ GMAC_ISRPQ

__I uint32_t Gmac::GMAC_ISRPQ[5]

(Gmac Offset: 0x400) Interrupt Status Register Priority Queue (index = 1)

Definition at line 163 of file component/gmac.h.

◆ GMAC_JR

__I uint32_t Gmac::GMAC_JR

(Gmac Offset: 0x18C) Jabbers Received Register

Definition at line 131 of file component/gmac.h.

◆ GMAC_LC

__I uint32_t Gmac::GMAC_LC

(Gmac Offset: 0x144) Late Collisions Register

Definition at line 113 of file component/gmac.h.

◆ GMAC_LFFE

__I uint32_t Gmac::GMAC_LFFE

(Gmac Offset: 0x194) Length Field Frame Errors Register

Definition at line 133 of file component/gmac.h.

◆ GMAC_MAN

__IO uint32_t Gmac::GMAC_MAN

(Gmac Offset: 0x034) PHY Maintenance Register

Definition at line 66 of file component/gmac.h.

◆ GMAC_MCF

__I uint32_t Gmac::GMAC_MCF

(Gmac Offset: 0x13C) Multiple Collision Frames Register

Definition at line 111 of file component/gmac.h.

◆ GMAC_MFR

__I uint32_t Gmac::GMAC_MFR

(Gmac Offset: 0x160) Multicast Frames Received Register

Definition at line 120 of file component/gmac.h.

◆ GMAC_MFT

__I uint32_t Gmac::GMAC_MFT

(Gmac Offset: 0x110) Multicast Frames Transmitted Register

Definition at line 100 of file component/gmac.h.

◆ GMAC_MID

__I uint32_t Gmac::GMAC_MID

(Gmac Offset: 0x0FC) Module ID Register

Definition at line 95 of file component/gmac.h.

◆ GMAC_NCFGR

__IO uint32_t Gmac::GMAC_NCFGR

(Gmac Offset: 0x004) Network Configuration Register

Definition at line 54 of file component/gmac.h.

◆ GMAC_NCR

__IO uint32_t Gmac::GMAC_NCR

(Gmac Offset: 0x000) Network Control Register

Definition at line 53 of file component/gmac.h.

◆ GMAC_NSC

__IO uint32_t Gmac::GMAC_NSC

(Gmac Offset: 0x0DC) 1588 Timer Nanosecond Comparison Register

Definition at line 87 of file component/gmac.h.

◆ GMAC_NSR

__I uint32_t Gmac::GMAC_NSR

(Gmac Offset: 0x008) Network Status Register

Definition at line 55 of file component/gmac.h.

◆ GMAC_OFR

__I uint32_t Gmac::GMAC_OFR

(Gmac Offset: 0x188) Oversize Frames Received Register

Definition at line 130 of file component/gmac.h.

◆ GMAC_ORHI

__I uint32_t Gmac::GMAC_ORHI

(Gmac Offset: 0x154) Octets Received High Received Register

Definition at line 117 of file component/gmac.h.

◆ GMAC_ORLO

__I uint32_t Gmac::GMAC_ORLO

(Gmac Offset: 0x150) Octets Received Low Received Register

Definition at line 116 of file component/gmac.h.

◆ GMAC_OTHI

__I uint32_t Gmac::GMAC_OTHI

(Gmac Offset: 0x104) Octets Transmitted High Register

Definition at line 97 of file component/gmac.h.

◆ GMAC_OTLO

__I uint32_t Gmac::GMAC_OTLO

(Gmac Offset: 0x100) Octets Transmitted Low Register

Definition at line 96 of file component/gmac.h.

◆ GMAC_PEFRN

__I uint32_t Gmac::GMAC_PEFRN

(Gmac Offset: 0x1FC) PTP Peer Event Frame Received Nanoseconds Register

Definition at line 156 of file component/gmac.h.

◆ GMAC_PEFRSH

__I uint32_t Gmac::GMAC_PEFRSH

(Gmac Offset: 0x0F4) PTP Peer Event Frame Received Seconds High Register

Definition at line 93 of file component/gmac.h.

◆ GMAC_PEFRSL

__I uint32_t Gmac::GMAC_PEFRSL

(Gmac Offset: 0x1F8) PTP Peer Event Frame Received Seconds Low Register

Definition at line 155 of file component/gmac.h.

◆ GMAC_PEFTN

__I uint32_t Gmac::GMAC_PEFTN

(Gmac Offset: 0x1F4) PTP Peer Event Frame Transmitted Nanoseconds Register

Definition at line 154 of file component/gmac.h.

◆ GMAC_PEFTSH

__I uint32_t Gmac::GMAC_PEFTSH

(Gmac Offset: 0x0F0) PTP Peer Event Frame Transmitted Seconds High Register

Definition at line 92 of file component/gmac.h.

◆ GMAC_PEFTSL

__I uint32_t Gmac::GMAC_PEFTSL

(Gmac Offset: 0x1F0) PTP Peer Event Frame Transmitted Seconds Low Register

Definition at line 153 of file component/gmac.h.

◆ GMAC_PFR

__I uint32_t Gmac::GMAC_PFR

(Gmac Offset: 0x164) Pause Frames Received Register

Definition at line 121 of file component/gmac.h.

◆ GMAC_PFT

__I uint32_t Gmac::GMAC_PFT

(Gmac Offset: 0x114) Pause Frames Transmitted Register

Definition at line 101 of file component/gmac.h.

◆ GMAC_RBQB

__IO uint32_t Gmac::GMAC_RBQB

(Gmac Offset: 0x018) Receive Buffer Queue Base Address Register

Definition at line 59 of file component/gmac.h.

◆ GMAC_RBQBAPQ

__IO uint32_t Gmac::GMAC_RBQBAPQ[5]

(Gmac Offset: 0x480) Receive Buffer Queue Base Address Register Priority Queue (index = 1)

Definition at line 167 of file component/gmac.h.

◆ GMAC_RBSRPQ

__IO uint32_t Gmac::GMAC_RBSRPQ[5]

(Gmac Offset: 0x4A0) Receive Buffer Size Register Priority Queue (index = 1)

Definition at line 169 of file component/gmac.h.

◆ GMAC_RJFML

__IO uint32_t Gmac::GMAC_RJFML

(Gmac Offset: 0x048) RX Jumbo Frame Max Length Register

Definition at line 71 of file component/gmac.h.

◆ GMAC_ROE

__I uint32_t Gmac::GMAC_ROE

(Gmac Offset: 0x1A4) Receive Overrun Register

Definition at line 137 of file component/gmac.h.

◆ GMAC_RPQ

__I uint32_t Gmac::GMAC_RPQ

(Gmac Offset: 0x038) Received Pause Quantum Register

Definition at line 67 of file component/gmac.h.

◆ GMAC_RPSF

__IO uint32_t Gmac::GMAC_RPSF

(Gmac Offset: 0x044) RX Partial Store and Forward Register

Definition at line 70 of file component/gmac.h.

◆ GMAC_RRE

__I uint32_t Gmac::GMAC_RRE

(Gmac Offset: 0x1A0) Receive Resource Errors Register

Definition at line 136 of file component/gmac.h.

◆ GMAC_RSE

__I uint32_t Gmac::GMAC_RSE

(Gmac Offset: 0x198) Receive Symbol Errors Register

Definition at line 134 of file component/gmac.h.

◆ GMAC_RSR

__IO uint32_t Gmac::GMAC_RSR

(Gmac Offset: 0x020) Receive Status Register

Definition at line 61 of file component/gmac.h.

◆ GMAC_RXLPI

__I uint32_t Gmac::GMAC_RXLPI

(Gmac Offset: 0x270) Received LPI Transitions

Definition at line 158 of file component/gmac.h.

◆ GMAC_RXLPITIME

__I uint32_t Gmac::GMAC_RXLPITIME

(Gmac Offset: 0x274) Received LPI Time

Definition at line 159 of file component/gmac.h.

◆ GMAC_SA

GmacSa Gmac::GMAC_SA[GMACSA_NUMBER]

(Gmac Offset: 0x088) 1 .. 4

Definition at line 75 of file component/gmac.h.

◆ GMAC_SAMB1

__IO uint32_t Gmac::GMAC_SAMB1

(Gmac Offset: 0x0C8) Specific Address 1 Mask Bottom Register

Definition at line 84 of file component/gmac.h.

◆ GMAC_SAMT1

__IO uint32_t Gmac::GMAC_SAMT1

(Gmac Offset: 0x0CC) Specific Address 1 Mask Top Register

Definition at line 85 of file component/gmac.h.

◆ GMAC_SCF

__I uint32_t Gmac::GMAC_SCF

(Gmac Offset: 0x138) Single Collision Frames Register

Definition at line 110 of file component/gmac.h.

◆ GMAC_SCH

__IO uint32_t Gmac::GMAC_SCH

(Gmac Offset: 0x0E4) 1588 Timer Second Comparison High Register

Definition at line 89 of file component/gmac.h.

◆ GMAC_SCL

__IO uint32_t Gmac::GMAC_SCL

(Gmac Offset: 0x0E0) 1588 Timer Second Comparison Low Register

Definition at line 88 of file component/gmac.h.

◆ GMAC_ST1RPQ

__IO uint32_t Gmac::GMAC_ST1RPQ[4]

(Gmac Offset: 0x500) Screening Type 1 Register Priority Queue (index = 0)

Definition at line 175 of file component/gmac.h.

◆ GMAC_ST2CW00

__IO uint32_t Gmac::GMAC_ST2CW00

(Gmac Offset: 0x700) Screening Type 2 Compare Word 0 Register (index = 0)

Definition at line 187 of file component/gmac.h.

◆ GMAC_ST2CW01

__IO uint32_t Gmac::GMAC_ST2CW01

(Gmac Offset: 0x708) Screening Type 2 Compare Word 0 Register (index = 1)

Definition at line 189 of file component/gmac.h.

◆ GMAC_ST2CW010

__IO uint32_t Gmac::GMAC_ST2CW010

(Gmac Offset: 0x750) Screening Type 2 Compare Word 0 Register (index = 10)

Definition at line 207 of file component/gmac.h.

◆ GMAC_ST2CW011

__IO uint32_t Gmac::GMAC_ST2CW011

(Gmac Offset: 0x758) Screening Type 2 Compare Word 0 Register (index = 11)

Definition at line 209 of file component/gmac.h.

◆ GMAC_ST2CW012

__IO uint32_t Gmac::GMAC_ST2CW012

(Gmac Offset: 0x760) Screening Type 2 Compare Word 0 Register (index = 12)

Definition at line 211 of file component/gmac.h.

◆ GMAC_ST2CW013

__IO uint32_t Gmac::GMAC_ST2CW013

(Gmac Offset: 0x768) Screening Type 2 Compare Word 0 Register (index = 13)

Definition at line 213 of file component/gmac.h.

◆ GMAC_ST2CW014

__IO uint32_t Gmac::GMAC_ST2CW014

(Gmac Offset: 0x770) Screening Type 2 Compare Word 0 Register (index = 14)

Definition at line 215 of file component/gmac.h.

◆ GMAC_ST2CW015

__IO uint32_t Gmac::GMAC_ST2CW015

(Gmac Offset: 0x778) Screening Type 2 Compare Word 0 Register (index = 15)

Definition at line 217 of file component/gmac.h.

◆ GMAC_ST2CW016

__IO uint32_t Gmac::GMAC_ST2CW016

(Gmac Offset: 0x780) Screening Type 2 Compare Word 0 Register (index = 16)

Definition at line 219 of file component/gmac.h.

◆ GMAC_ST2CW017

__IO uint32_t Gmac::GMAC_ST2CW017

(Gmac Offset: 0x788) Screening Type 2 Compare Word 0 Register (index = 17)

Definition at line 221 of file component/gmac.h.

◆ GMAC_ST2CW018

__IO uint32_t Gmac::GMAC_ST2CW018

(Gmac Offset: 0x790) Screening Type 2 Compare Word 0 Register (index = 18)

Definition at line 223 of file component/gmac.h.

◆ GMAC_ST2CW019

__IO uint32_t Gmac::GMAC_ST2CW019

(Gmac Offset: 0x798) Screening Type 2 Compare Word 0 Register (index = 19)

Definition at line 225 of file component/gmac.h.

◆ GMAC_ST2CW02

__IO uint32_t Gmac::GMAC_ST2CW02

(Gmac Offset: 0x710) Screening Type 2 Compare Word 0 Register (index = 2)

Definition at line 191 of file component/gmac.h.

◆ GMAC_ST2CW020

__IO uint32_t Gmac::GMAC_ST2CW020

(Gmac Offset: 0x7A0) Screening Type 2 Compare Word 0 Register (index = 20)

Definition at line 227 of file component/gmac.h.

◆ GMAC_ST2CW021

__IO uint32_t Gmac::GMAC_ST2CW021

(Gmac Offset: 0x7A8) Screening Type 2 Compare Word 0 Register (index = 21)

Definition at line 229 of file component/gmac.h.

◆ GMAC_ST2CW022

__IO uint32_t Gmac::GMAC_ST2CW022

(Gmac Offset: 0x7B0) Screening Type 2 Compare Word 0 Register (index = 22)

Definition at line 231 of file component/gmac.h.

◆ GMAC_ST2CW023

__IO uint32_t Gmac::GMAC_ST2CW023

(Gmac Offset: 0x7B8) Screening Type 2 Compare Word 0 Register (index = 23)

Definition at line 233 of file component/gmac.h.

◆ GMAC_ST2CW03

__IO uint32_t Gmac::GMAC_ST2CW03

(Gmac Offset: 0x718) Screening Type 2 Compare Word 0 Register (index = 3)

Definition at line 193 of file component/gmac.h.

◆ GMAC_ST2CW04

__IO uint32_t Gmac::GMAC_ST2CW04

(Gmac Offset: 0x720) Screening Type 2 Compare Word 0 Register (index = 4)

Definition at line 195 of file component/gmac.h.

◆ GMAC_ST2CW05

__IO uint32_t Gmac::GMAC_ST2CW05

(Gmac Offset: 0x728) Screening Type 2 Compare Word 0 Register (index = 5)

Definition at line 197 of file component/gmac.h.

◆ GMAC_ST2CW06

__IO uint32_t Gmac::GMAC_ST2CW06

(Gmac Offset: 0x730) Screening Type 2 Compare Word 0 Register (index = 6)

Definition at line 199 of file component/gmac.h.

◆ GMAC_ST2CW07

__IO uint32_t Gmac::GMAC_ST2CW07

(Gmac Offset: 0x738) Screening Type 2 Compare Word 0 Register (index = 7)

Definition at line 201 of file component/gmac.h.

◆ GMAC_ST2CW08

__IO uint32_t Gmac::GMAC_ST2CW08

(Gmac Offset: 0x740) Screening Type 2 Compare Word 0 Register (index = 8)

Definition at line 203 of file component/gmac.h.

◆ GMAC_ST2CW09

__IO uint32_t Gmac::GMAC_ST2CW09

(Gmac Offset: 0x748) Screening Type 2 Compare Word 0 Register (index = 9)

Definition at line 205 of file component/gmac.h.

◆ GMAC_ST2CW10

__IO uint32_t Gmac::GMAC_ST2CW10

(Gmac Offset: 0x704) Screening Type 2 Compare Word 1 Register (index = 0)

Definition at line 188 of file component/gmac.h.

◆ GMAC_ST2CW11

__IO uint32_t Gmac::GMAC_ST2CW11

(Gmac Offset: 0x70C) Screening Type 2 Compare Word 1 Register (index = 1)

Definition at line 190 of file component/gmac.h.

◆ GMAC_ST2CW110

__IO uint32_t Gmac::GMAC_ST2CW110

(Gmac Offset: 0x754) Screening Type 2 Compare Word 1 Register (index = 10)

Definition at line 208 of file component/gmac.h.

◆ GMAC_ST2CW111

__IO uint32_t Gmac::GMAC_ST2CW111

(Gmac Offset: 0x75C) Screening Type 2 Compare Word 1 Register (index = 11)

Definition at line 210 of file component/gmac.h.

◆ GMAC_ST2CW112

__IO uint32_t Gmac::GMAC_ST2CW112

(Gmac Offset: 0x764) Screening Type 2 Compare Word 1 Register (index = 12)

Definition at line 212 of file component/gmac.h.

◆ GMAC_ST2CW113

__IO uint32_t Gmac::GMAC_ST2CW113

(Gmac Offset: 0x76C) Screening Type 2 Compare Word 1 Register (index = 13)

Definition at line 214 of file component/gmac.h.

◆ GMAC_ST2CW114

__IO uint32_t Gmac::GMAC_ST2CW114

(Gmac Offset: 0x774) Screening Type 2 Compare Word 1 Register (index = 14)

Definition at line 216 of file component/gmac.h.

◆ GMAC_ST2CW115

__IO uint32_t Gmac::GMAC_ST2CW115

(Gmac Offset: 0x77C) Screening Type 2 Compare Word 1 Register (index = 15)

Definition at line 218 of file component/gmac.h.

◆ GMAC_ST2CW116

__IO uint32_t Gmac::GMAC_ST2CW116

(Gmac Offset: 0x784) Screening Type 2 Compare Word 1 Register (index = 16)

Definition at line 220 of file component/gmac.h.

◆ GMAC_ST2CW117

__IO uint32_t Gmac::GMAC_ST2CW117

(Gmac Offset: 0x78C) Screening Type 2 Compare Word 1 Register (index = 17)

Definition at line 222 of file component/gmac.h.

◆ GMAC_ST2CW118

__IO uint32_t Gmac::GMAC_ST2CW118

(Gmac Offset: 0x794) Screening Type 2 Compare Word 1 Register (index = 18)

Definition at line 224 of file component/gmac.h.

◆ GMAC_ST2CW119

__IO uint32_t Gmac::GMAC_ST2CW119

(Gmac Offset: 0x79C) Screening Type 2 Compare Word 1 Register (index = 19)

Definition at line 226 of file component/gmac.h.

◆ GMAC_ST2CW12

__IO uint32_t Gmac::GMAC_ST2CW12

(Gmac Offset: 0x714) Screening Type 2 Compare Word 1 Register (index = 2)

Definition at line 192 of file component/gmac.h.

◆ GMAC_ST2CW120

__IO uint32_t Gmac::GMAC_ST2CW120

(Gmac Offset: 0x7A4) Screening Type 2 Compare Word 1 Register (index = 20)

Definition at line 228 of file component/gmac.h.

◆ GMAC_ST2CW121

__IO uint32_t Gmac::GMAC_ST2CW121

(Gmac Offset: 0x7AC) Screening Type 2 Compare Word 1 Register (index = 21)

Definition at line 230 of file component/gmac.h.

◆ GMAC_ST2CW122

__IO uint32_t Gmac::GMAC_ST2CW122

(Gmac Offset: 0x7B4) Screening Type 2 Compare Word 1 Register (index = 22)

Definition at line 232 of file component/gmac.h.

◆ GMAC_ST2CW123

__IO uint32_t Gmac::GMAC_ST2CW123

(Gmac Offset: 0x7BC) Screening Type 2 Compare Word 1 Register (index = 23)

Definition at line 234 of file component/gmac.h.

◆ GMAC_ST2CW13

__IO uint32_t Gmac::GMAC_ST2CW13

(Gmac Offset: 0x71C) Screening Type 2 Compare Word 1 Register (index = 3)

Definition at line 194 of file component/gmac.h.

◆ GMAC_ST2CW14

__IO uint32_t Gmac::GMAC_ST2CW14

(Gmac Offset: 0x724) Screening Type 2 Compare Word 1 Register (index = 4)

Definition at line 196 of file component/gmac.h.

◆ GMAC_ST2CW15

__IO uint32_t Gmac::GMAC_ST2CW15

(Gmac Offset: 0x72C) Screening Type 2 Compare Word 1 Register (index = 5)

Definition at line 198 of file component/gmac.h.

◆ GMAC_ST2CW16

__IO uint32_t Gmac::GMAC_ST2CW16

(Gmac Offset: 0x734) Screening Type 2 Compare Word 1 Register (index = 6)

Definition at line 200 of file component/gmac.h.

◆ GMAC_ST2CW17

__IO uint32_t Gmac::GMAC_ST2CW17

(Gmac Offset: 0x73C) Screening Type 2 Compare Word 1 Register (index = 7)

Definition at line 202 of file component/gmac.h.

◆ GMAC_ST2CW18

__IO uint32_t Gmac::GMAC_ST2CW18

(Gmac Offset: 0x744) Screening Type 2 Compare Word 1 Register (index = 8)

Definition at line 204 of file component/gmac.h.

◆ GMAC_ST2CW19

__IO uint32_t Gmac::GMAC_ST2CW19

(Gmac Offset: 0x74C) Screening Type 2 Compare Word 1 Register (index = 9)

Definition at line 206 of file component/gmac.h.

◆ GMAC_ST2ER

__IO uint32_t Gmac::GMAC_ST2ER[4]

(Gmac Offset: 0x6E0) Screening Type 2 Ethertype Register (index = 0)

Definition at line 185 of file component/gmac.h.

◆ GMAC_ST2RPQ

__IO uint32_t Gmac::GMAC_ST2RPQ[8]

(Gmac Offset: 0x540) Screening Type 2 Register Priority Queue (index = 0)

Definition at line 177 of file component/gmac.h.

◆ GMAC_SVLAN

__IO uint32_t Gmac::GMAC_SVLAN

(Gmac Offset: 0x0C0) Stacked VLAN Register

Definition at line 82 of file component/gmac.h.

◆ GMAC_TA

__O uint32_t Gmac::GMAC_TA

(Gmac Offset: 0x1D8) 1588 Timer Adjust Register

Definition at line 147 of file component/gmac.h.

◆ GMAC_TBFR1023

__I uint32_t Gmac::GMAC_TBFR1023

(Gmac Offset: 0x178) 512 to 1023 Byte Frames Received Register

Definition at line 126 of file component/gmac.h.

◆ GMAC_TBFR127

__I uint32_t Gmac::GMAC_TBFR127

(Gmac Offset: 0x16C) 65 to 127 Byte Frames Received Register

Definition at line 123 of file component/gmac.h.

◆ GMAC_TBFR1518

__I uint32_t Gmac::GMAC_TBFR1518

(Gmac Offset: 0x17C) 1024 to 1518 Byte Frames Received Register

Definition at line 127 of file component/gmac.h.

◆ GMAC_TBFR255

__I uint32_t Gmac::GMAC_TBFR255

(Gmac Offset: 0x170) 128 to 255 Byte Frames Received Register

Definition at line 124 of file component/gmac.h.

◆ GMAC_TBFR511

__I uint32_t Gmac::GMAC_TBFR511

(Gmac Offset: 0x174) 256 to 511 Byte Frames Received Register

Definition at line 125 of file component/gmac.h.

◆ GMAC_TBFT1023

__I uint32_t Gmac::GMAC_TBFT1023

(Gmac Offset: 0x128) 512 to 1023 Byte Frames Transmitted Register

Definition at line 106 of file component/gmac.h.

◆ GMAC_TBFT127

__I uint32_t Gmac::GMAC_TBFT127

(Gmac Offset: 0x11C) 65 to 127 Byte Frames Transmitted Register

Definition at line 103 of file component/gmac.h.

◆ GMAC_TBFT1518

__I uint32_t Gmac::GMAC_TBFT1518

(Gmac Offset: 0x12C) 1024 to 1518 Byte Frames Transmitted Register

Definition at line 107 of file component/gmac.h.

◆ GMAC_TBFT255

__I uint32_t Gmac::GMAC_TBFT255

(Gmac Offset: 0x120) 128 to 255 Byte Frames Transmitted Register

Definition at line 104 of file component/gmac.h.

◆ GMAC_TBFT511

__I uint32_t Gmac::GMAC_TBFT511

(Gmac Offset: 0x124) 256 to 511 Byte Frames Transmitted Register

Definition at line 105 of file component/gmac.h.

◆ GMAC_TBQB

__IO uint32_t Gmac::GMAC_TBQB

(Gmac Offset: 0x01C) Transmit Buffer Queue Base Address Register

Definition at line 60 of file component/gmac.h.

◆ GMAC_TBQBAPQ

__IO uint32_t Gmac::GMAC_TBQBAPQ[5]

(Gmac Offset: 0x440) Transmit Buffer Queue Base Address Register Priority Queue (index = 1)

Definition at line 165 of file component/gmac.h.

◆ GMAC_TCE

__I uint32_t Gmac::GMAC_TCE

(Gmac Offset: 0x1AC) TCP Checksum Errors Register

Definition at line 139 of file component/gmac.h.

◆ GMAC_TI

__IO uint32_t Gmac::GMAC_TI

(Gmac Offset: 0x1DC) 1588 Timer Increment Register

Definition at line 148 of file component/gmac.h.

◆ GMAC_TIDM1

__IO uint32_t Gmac::GMAC_TIDM1

(Gmac Offset: 0x0A8) Type ID Match 1 Register

Definition at line 76 of file component/gmac.h.

◆ GMAC_TIDM2

__IO uint32_t Gmac::GMAC_TIDM2

(Gmac Offset: 0x0AC) Type ID Match 2 Register

Definition at line 77 of file component/gmac.h.

◆ GMAC_TIDM3

__IO uint32_t Gmac::GMAC_TIDM3

(Gmac Offset: 0x0B0) Type ID Match 3 Register

Definition at line 78 of file component/gmac.h.

◆ GMAC_TIDM4

__IO uint32_t Gmac::GMAC_TIDM4

(Gmac Offset: 0x0B4) Type ID Match 4 Register

Definition at line 79 of file component/gmac.h.

◆ GMAC_TISUBN

__IO uint32_t Gmac::GMAC_TISUBN

(Gmac Offset: 0x1BC) 1588 Timer Increment Sub-nanoseconds Register

Definition at line 142 of file component/gmac.h.

◆ GMAC_TMXBFR

__I uint32_t Gmac::GMAC_TMXBFR

(Gmac Offset: 0x180) 1519 to Maximum Byte Frames Received Register

Definition at line 128 of file component/gmac.h.

◆ GMAC_TN

__IO uint32_t Gmac::GMAC_TN

(Gmac Offset: 0x1D4) 1588 Timer Nanoseconds Register

Definition at line 146 of file component/gmac.h.

◆ GMAC_TPFCP

__IO uint32_t Gmac::GMAC_TPFCP

(Gmac Offset: 0x0C4) Transmit PFC Pause Register

Definition at line 83 of file component/gmac.h.

◆ GMAC_TPQ

__IO uint32_t Gmac::GMAC_TPQ

(Gmac Offset: 0x03C) Transmit Pause Quantum Register

Definition at line 68 of file component/gmac.h.

◆ GMAC_TPSF

__IO uint32_t Gmac::GMAC_TPSF

(Gmac Offset: 0x040) TX Partial Store and Forward Register

Definition at line 69 of file component/gmac.h.

◆ GMAC_TSH

__IO uint32_t Gmac::GMAC_TSH

(Gmac Offset: 0x1C0) 1588 Timer Seconds High Register

Definition at line 143 of file component/gmac.h.

◆ GMAC_TSL

__IO uint32_t Gmac::GMAC_TSL

(Gmac Offset: 0x1D0) 1588 Timer Seconds Low Register

Definition at line 145 of file component/gmac.h.

◆ GMAC_TSR

__IO uint32_t Gmac::GMAC_TSR

(Gmac Offset: 0x014) Transmit Status Register

Definition at line 58 of file component/gmac.h.

◆ GMAC_TUR

__I uint32_t Gmac::GMAC_TUR

(Gmac Offset: 0x134) Transmit Underruns Register

Definition at line 109 of file component/gmac.h.

◆ GMAC_TXLPI

__I uint32_t Gmac::GMAC_TXLPI

(Gmac Offset: 0x278) Transmit LPI Transitions

Definition at line 160 of file component/gmac.h.

◆ GMAC_TXLPITIME

__I uint32_t Gmac::GMAC_TXLPITIME

(Gmac Offset: 0x27C) Transmit LPI Time

Definition at line 161 of file component/gmac.h.

◆ GMAC_UCE

__I uint32_t Gmac::GMAC_UCE

(Gmac Offset: 0x1B0) UDP Checksum Errors Register

Definition at line 140 of file component/gmac.h.

◆ GMAC_UFR

__I uint32_t Gmac::GMAC_UFR

(Gmac Offset: 0x184) Undersize Frames Received Register

Definition at line 129 of file component/gmac.h.

◆ GMAC_UR

__IO uint32_t Gmac::GMAC_UR

(Gmac Offset: 0x00C) User Register

Definition at line 56 of file component/gmac.h.

◆ GMAC_WOL

__IO uint32_t Gmac::GMAC_WOL

(Gmac Offset: 0x0B8) Wake on LAN Register

Definition at line 80 of file component/gmac.h.

◆ Reserved1

__I uint32_t Gmac::Reserved1[13]

Definition at line 72 of file component/gmac.h.

◆ Reserved10

__I uint32_t Gmac::Reserved10[3]

Definition at line 168 of file component/gmac.h.

◆ Reserved11

__I uint32_t Gmac::Reserved11[2]

Definition at line 170 of file component/gmac.h.

◆ Reserved12

__I uint32_t Gmac::Reserved12[14]

Definition at line 174 of file component/gmac.h.

◆ Reserved13

__I uint32_t Gmac::Reserved13[12]

Definition at line 176 of file component/gmac.h.

◆ Reserved14

__I uint32_t Gmac::Reserved14[39]

Definition at line 178 of file component/gmac.h.

◆ Reserved15

__I uint32_t Gmac::Reserved15[3]

Definition at line 180 of file component/gmac.h.

◆ Reserved16

__I uint32_t Gmac::Reserved16[3]

Definition at line 182 of file component/gmac.h.

◆ Reserved17

__I uint32_t Gmac::Reserved17[36]

Definition at line 184 of file component/gmac.h.

◆ Reserved18

__I uint32_t Gmac::Reserved18[4]

Definition at line 186 of file component/gmac.h.

◆ Reserved2

__I uint32_t Gmac::Reserved2[3]

Definition at line 86 of file component/gmac.h.

◆ Reserved3

__I uint32_t Gmac::Reserved3[1]

Definition at line 94 of file component/gmac.h.

◆ Reserved4

__I uint32_t Gmac::Reserved4[2]

Definition at line 141 of file component/gmac.h.

◆ Reserved5

__I uint32_t Gmac::Reserved5[3]

Definition at line 144 of file component/gmac.h.

◆ Reserved6

__I uint32_t Gmac::Reserved6[28]

Definition at line 157 of file component/gmac.h.

◆ Reserved7

__I uint32_t Gmac::Reserved7[96]

Definition at line 162 of file component/gmac.h.

◆ Reserved8

__I uint32_t Gmac::Reserved8[11]

Definition at line 164 of file component/gmac.h.

◆ Reserved9

__I uint32_t Gmac::Reserved9[11]

Definition at line 166 of file component/gmac.h.


The documentation for this struct was generated from the following file:


inertial_sense_ros
Author(s):
autogenerated on Sat Sep 19 2020 03:19:09