45 #define MAX_INTERRUPT_SOURCES 7 57 void (*
handler) (
const uint32_t,
const uint32_t);
67 #if (SAM3S || SAM4S || SAM4E) 69 static void (*pio_capture_handler)(
Pio *) =
NULL;
70 extern uint32_t pio_capture_enable_flag;
110 #if (SAM3S || SAM4S || SAM4E) 111 if (pio_capture_enable_flag) {
112 if (pio_capture_handler) {
113 pio_capture_handler(p_pio);
133 uint32_t ul_attr,
void (*p_handler) (uint32_t, uint32_t))
144 if (pSource->
id == ul_id && pSource->
mask == ul_mask) {
151 pSource->
mask = ul_mask;
152 pSource->
attr = ul_attr;
164 #if (SAM3S || SAM4S || SAM4E) 174 void pio_capture_handler_set(
void (*p_handler)(
Pio *))
176 pio_capture_handler = p_handler;
193 void (*p_handler) (uint32_t, uint32_t))
199 return pio_handler_set(p_pio, group_id, group_mask, ul_flag, p_handler);
261 void PIOF_Handler(
void)
276 uint32_t bitmask = 0;
void pio_configure_interrupt(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_attr)
Configure the given interrupt source. Interrupt can be configured to trigger on rising edge...
#define MAX_INTERRUPT_SOURCES
#define PIOA
(PIOA ) Base Address
static uint32_t gs_ul_nb_sources
void pio_handler_process(Pio *p_pio, uint32_t ul_id)
Process an interrupt request on the given PIO controller.
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
Set Interrupt Priority.
#define ID_PIOB
Parallel I/O Controller B (PIOB)
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
Disable External Interrupt.
Parallel Input/Output (PIO) Controller driver for SAM.
uint32_t pio_get_pin_group_id(uint32_t ul_pin)
Return GPIO port peripheral ID for a GPIO pin.
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
void pio_enable_interrupt(Pio *p_pio, const uint32_t ul_mask)
Enable the given interrupt source. The PIO must be configured as an NVIC interrupt source as well...
void pio_disable_interrupt(Pio *p_pio, const uint32_t ul_mask)
Disable a given interrupt source, with no added side effects.
uint32_t pio_handler_set_pin(uint32_t ul_pin, uint32_t ul_flag, void(*p_handler)(uint32_t, uint32_t))
#define ID_PIOA
Parallel I/O Controller A (PIOA)
__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
Clear Pending Interrupt.
#define PIOD
(PIOD ) Base Address
Pio * pio_get_pin_group(uint32_t ul_pin)
Return GPIO port for a GPIO pin.
uint32_t pio_get_interrupt_status(const Pio *p_pio)
Read and clear PIO interrupt status.
Parallel Input/Output (PIO) interrupt handler for SAM.
void pio_handler_set_priority(Pio *p_pio, IRQn_Type ul_irqn, uint32_t ul_priority)
Initialize PIO interrupt management logic.
#define ID_PIOD
Parallel I/O Controller D (PIOD)
#define PIOB
(PIOB ) Base Address
#define ID_PIOE
Parallel I/O Controller E (PIOE)
void(* handler)(const uint32_t, const uint32_t)
static struct s_interrupt_source gs_interrupt_sources[MAX_INTERRUPT_SOURCES]
#define ID_PIOC
Parallel I/O Controller C (PIOC)
#define PIOC
(PIOC ) Base Address
uint32_t pio_get_interrupt_mask(const Pio *p_pio)
Read PIO interrupt mask.
#define PIOE
(PIOE ) Base Address
uint32_t pio_get_pin_group_mask(uint32_t ul_pin)
Return GPIO port pin mask for a GPIO pin.
uint32_t pio_handler_set(Pio *p_pio, uint32_t ul_id, uint32_t ul_mask, uint32_t ul_attr, void(*p_handler)(uint32_t, uint32_t))
Set an interrupt handler for the provided pins. The provided handler will be called with the triggeri...