78 #define CLEAR_HC_INT(HC_REGS, intr) \ 80 USB_OTG_HCINTn_TypeDef hcint_clear; \ 81 hcint_clear.d32 = 0; \ 82 hcint_clear.b.intr = 1; \ 83 USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\ 86 #define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \ 87 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \ 88 INTMSK.b.chhltd = 0; \ 89 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);} 91 #define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \ 92 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \ 93 INTMSK.b.chhltd = 1; \ 94 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);} 96 #define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \ 97 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \ 99 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);} 101 #define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \ 102 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \ 104 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);} 132 #endif //__HCD_INT_H__
USBH_HCD_INT_cb_TypeDef * USBH_HCD_INT_fops
uint8_t(* DevPortEnabled)(USB_OTG_CORE_HANDLE *pdev)
uint8_t(* SOF)(USB_OTG_CORE_HANDLE *pdev)
void Disconnect_Callback_Handler(USB_OTG_CORE_HANDLE *pdev)
struct _USBH_HCD_INT USBH_HCD_INT_cb_TypeDef
uint8_t(* DevDisconnected)(USB_OTG_CORE_HANDLE *pdev)
void ConnectCallback_Handler(USB_OTG_CORE_HANDLE *pdev)
uint8_t(* DevConnected)(USB_OTG_CORE_HANDLE *pdev)
uint8_t(* DevPortDisabled)(USB_OTG_CORE_HANDLE *pdev)
uint32_t USBH_OTG_ISR_Handler(USB_OTG_CORE_HANDLE *pdev)
HOST_Handle_ISR This function handles all USB Host Interrupts.
void Overcurrent_Callback_Handler(USB_OTG_CORE_HANDLE *pdev)