Structure type to access the System Control and ID Register not in the SCB. More...
#include <core_cm3.h>
Public Attributes | |
__IO uint32_t | ACTLR |
__I uint32_t | ICTR |
uint32_t | RESERVED0 [1] |
uint32_t | RESERVED1 [1] |
Structure type to access the System Control and ID Register not in the SCB.
Definition at line 573 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
__IO uint32_t SCnSCB_Type::ACTLR |
Offset: 0x008 (R/W) Auxiliary Control Register
Definition at line 616 of file core_cm4.h.
__I uint32_t SCnSCB_Type::ICTR |
Offset: 0x004 (R/ ) Interrupt Controller Type Register
Definition at line 576 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
uint32_t SCnSCB_Type::RESERVED0 |
Definition at line 575 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
uint32_t SCnSCB_Type::RESERVED1 |
Definition at line 580 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.