Collaboration diagram for SYSCFG_Lock_Config:
|
Macros | |
| #define | IS_SYSCFG_LOCK_CONFIG(CONFIG) |
| #define | SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK |
| #define | SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK |
| #define | SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK |
Detailed Description
Macro Definition Documentation
| #define IS_SYSCFG_LOCK_CONFIG | ( | CONFIG | ) |
Value:
(((CONFIG) == SYSCFG_Break_PVD) || \
((CONFIG) == SYSCFG_Break_SRAMParity) || \
((CONFIG) == SYSCFG_Break_Lockup))
Definition at line 268 of file stm32f30x_syscfg.h.
| #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK |
Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/8/15/16/17
Definition at line 266 of file stm32f30x_syscfg.h.
| #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK |
Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVD_EN and PVDSEL[2:0] bits of the Power Control Interface
Definition at line 264 of file stm32f30x_syscfg.h.
| #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK |
Enables and locks the SRAM_PARITY error signal with Break Input of TIM1/8/15/16/17
Definition at line 265 of file stm32f30x_syscfg.h.