Functions
Interrupts and flags management functions
STM32F4xx_StdPeriph_Driver | STM32F10x_StdPeriph_Driver | STM32F30x_StdPeriph_Driver » RCC » RCC_Private_Functions

Interrupts and flags management functions. More...

Collaboration diagram for Interrupts and flags management functions:

Functions

void RCC_ClearFlag (void)
 Clears the RCC reset flags. The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST. More...
 
void RCC_ClearITPendingBit (uint8_t RCC_IT)
 Clears the RCC's interrupt pending bits. More...
 
FlagStatus RCC_GetFlagStatus (uint8_t RCC_FLAG)
 Checks whether the specified RCC flag is set or not. More...
 
ITStatus RCC_GetITStatus (uint8_t RCC_IT)
 Checks whether the specified RCC interrupt has occurred or not. More...
 
void RCC_ITConfig (uint8_t RCC_IT, FunctionalState NewState)
 Enables or disables the specified RCC interrupts. More...
 

Detailed Description

Interrupts and flags management functions. 

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                ##### Interrupts and flags management functions #####
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Function Documentation

void RCC_ClearFlag ( void  )

Clears the RCC reset flags. The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST.

Clears the RCC reset flags. The reset flags are: RCC_FLAG_OBLRST, RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST.

Parameters
None
Return values
None

Definition at line 2870 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.c.

void RCC_ClearITPendingBit ( uint8_t  RCC_IT)

Clears the RCC's interrupt pending bits.

Parameters
RCC_ITspecifies the interrupt pending bit to clear. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLLI2SRDY: PLLI2S ready interrupt
  • RCC_IT_PLLSAIRDY: PLLSAI ready interrupt (only for STM32F42xxx/43xxx/446xx/469xx/479xx devices)
  • RCC_IT_CSS: Clock Security System interrupt
Return values
None
Parameters
RCC_ITspecifies the interrupt pending bit to clear. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLLI2SRDY: PLLI2S ready interrupt
  • RCC_IT_CSS: Clock Security System interrupt
Return values
None
Parameters
RCC_ITspecifies the interrupt pending bit to clear. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: PLL ready interrupt
  • RCC_IT_CSS: Clock Security System interrupt
Return values
None

Definition at line 2924 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.c.

FlagStatus RCC_GetFlagStatus ( uint8_t  RCC_FLAG)

Checks whether the specified RCC flag is set or not.

Parameters
RCC_FLAGspecifies the flag to check. This parameter can be one of the following values:
  • RCC_FLAG_HSIRDY: HSI oscillator clock ready
  • RCC_FLAG_HSERDY: HSE oscillator clock ready
  • RCC_FLAG_PLLRDY: main PLL clock ready
  • RCC_FLAG_PLLI2SRDY: PLLI2S clock ready
  • RCC_FLAG_PLLSAIRDY: PLLSAI clock ready (only for STM32F42xxx/43xxx/446xx/469xx/479xx devices)
  • RCC_FLAG_LSERDY: LSE oscillator clock ready
  • RCC_FLAG_LSIRDY: LSI oscillator clock ready
  • RCC_FLAG_BORRST: POR/PDR or BOR reset
  • RCC_FLAG_PINRST: Pin reset
  • RCC_FLAG_PORRST: POR/PDR reset
  • RCC_FLAG_SFTRST: Software reset
  • RCC_FLAG_IWDGRST: Independent Watchdog reset
  • RCC_FLAG_WWDGRST: Window Watchdog reset
  • RCC_FLAG_LPWRRST: Low Power reset
Return values
Thenew state of RCC_FLAG (SET or RESET).
Parameters
RCC_FLAGspecifies the flag to check. This parameter can be one of the following values:
  • RCC_FLAG_HSIRDY: HSI oscillator clock ready
  • RCC_FLAG_HSERDY: HSE oscillator clock ready
  • RCC_FLAG_PLLRDY: main PLL clock ready
  • RCC_FLAG_PLLI2SRDY: PLLI2S clock ready
  • RCC_FLAG_LSERDY: LSE oscillator clock ready
  • RCC_FLAG_LSIRDY: LSI oscillator clock ready
  • RCC_FLAG_BORRST: POR/PDR or BOR reset
  • RCC_FLAG_PINRST: Pin reset
  • RCC_FLAG_PORRST: POR/PDR reset
  • RCC_FLAG_SFTRST: Software reset
  • RCC_FLAG_IWDGRST: Independent Watchdog reset
  • RCC_FLAG_WWDGRST: Window Watchdog reset
  • RCC_FLAG_LPWRRST: Low Power reset
Return values
Thenew state of RCC_FLAG (SET or RESET).
Parameters
RCC_FLAGspecifies the flag to check. This parameter can be one of the following values:
  • RCC_FLAG_HSIRDY: HSI oscillator clock ready
  • RCC_FLAG_HSERDY: HSE oscillator clock ready
  • RCC_FLAG_PLLRDY: PLL clock ready
  • RCC_FLAG_MCOF: MCO Flag
  • RCC_FLAG_LSERDY: LSE oscillator clock ready
  • RCC_FLAG_LSIRDY: LSI oscillator clock ready
  • RCC_FLAG_OBLRST: Option Byte Loader (OBL) reset
  • RCC_FLAG_PINRST: Pin reset
  • RCC_FLAG_PORRST: POR/PDR reset
  • RCC_FLAG_SFTRST: Software reset
  • RCC_FLAG_IWDGRST: Independent Watchdog reset
  • RCC_FLAG_WWDGRST: Window Watchdog reset
  • RCC_FLAG_LPWRRST: Low Power reset
Return values
Thenew state of RCC_FLAG (SET or RESET).

Definition at line 2825 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.c.

ITStatus RCC_GetITStatus ( uint8_t  RCC_IT)

Checks whether the specified RCC interrupt has occurred or not.

Parameters
RCC_ITspecifies the RCC interrupt source to check. This parameter can be one of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLLI2SRDY: PLLI2S ready interrupt
  • RCC_IT_PLLSAIRDY: PLLSAI clock ready interrupt (only for STM32F42xxx/43xxx/446xx/469xx/479xx devices)
  • RCC_IT_CSS: Clock Security System interrupt
Return values
Thenew state of RCC_IT (SET or RESET).
Parameters
RCC_ITspecifies the RCC interrupt source to check. This parameter can be one of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLLI2SRDY: PLLI2S ready interrupt
  • RCC_IT_CSS: Clock Security System interrupt
Return values
Thenew state of RCC_IT (SET or RESET).
Parameters
RCC_ITspecifies the RCC interrupt source to check. This parameter can be one of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: PLL ready interrupt
  • RCC_IT_CSS: Clock Security System interrupt
Return values
Thenew state of RCC_IT (SET or RESET).

Definition at line 2890 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.c.

void RCC_ITConfig ( uint8_t  RCC_IT,
FunctionalState  NewState 
)

Enables or disables the specified RCC interrupts.

Parameters
RCC_ITspecifies the RCC interrupt sources to be enabled or disabled. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLLI2SRDY: PLLI2S ready interrupt
  • RCC_IT_PLLSAIRDY: PLLSAI ready interrupt (only for STM32F42xxx/43xxx/446xx/469xx/479xx devices)
NewStatenew state of the specified RCC interrupts. This parameter can be: ENABLE or DISABLE.
Return values
None
Parameters
RCC_ITspecifies the RCC interrupt sources to be enabled or disabled. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: main PLL ready interrupt
  • RCC_IT_PLLI2SRDY: PLLI2S ready interrupt
NewStatenew state of the specified RCC interrupts. This parameter can be: ENABLE or DISABLE.
Return values
None
Note
The CSS interrupt doesn't have an enable bit; once the CSS is enabled and if the HSE clock fails, the CSS interrupt occurs and an NMI is automatically generated. The NMI will be executed indefinitely, and since NMI has higher priority than any other IRQ (and main program) the application will be stacked in the NMI ISR unless the CSS interrupt pending bit is cleared.
Parameters
RCC_ITspecifies the RCC interrupt sources to be enabled or disabled. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: PLL ready interrupt
NewStatenew state of the specified RCC interrupts. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 2788 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.c.


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Wed Jul 3 2019 19:59:28