Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0 header file. More...
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Classes | |
| struct | CoreDebug_Type |
| Structure type to access the Core Debug Register (CoreDebug). More... | |
Macros | |
| #define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
| #define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
| #define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
| #define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
| #define | CoreDebug_DCRSR_REGSEL_Pos 0 |
| #define | CoreDebug_DCRSR_REGSEL_Pos 0 |
| #define | CoreDebug_DCRSR_REGSEL_Pos 0 |
| #define | CoreDebug_DCRSR_REGSEL_Pos 0 |
| #define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
| #define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
| #define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
| #define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
| #define | CoreDebug_DCRSR_REGWnR_Pos 16 |
| #define | CoreDebug_DCRSR_REGWnR_Pos 16 |
| #define | CoreDebug_DCRSR_REGWnR_Pos 16 |
| #define | CoreDebug_DCRSR_REGWnR_Pos 16 |
| #define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
| #define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
| #define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
| #define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
| #define | CoreDebug_DEMCR_MON_EN_Pos 16 |
| #define | CoreDebug_DEMCR_MON_EN_Pos 16 |
| #define | CoreDebug_DEMCR_MON_EN_Pos 16 |
| #define | CoreDebug_DEMCR_MON_EN_Pos 16 |
| #define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
| #define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
| #define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
| #define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
| #define | CoreDebug_DEMCR_MON_PEND_Pos 17 |
| #define | CoreDebug_DEMCR_MON_PEND_Pos 17 |
| #define | CoreDebug_DEMCR_MON_PEND_Pos 17 |
| #define | CoreDebug_DEMCR_MON_PEND_Pos 17 |
| #define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
| #define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
| #define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
| #define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
| #define | CoreDebug_DEMCR_MON_REQ_Pos 19 |
| #define | CoreDebug_DEMCR_MON_REQ_Pos 19 |
| #define | CoreDebug_DEMCR_MON_REQ_Pos 19 |
| #define | CoreDebug_DEMCR_MON_REQ_Pos 19 |
| #define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
| #define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
| #define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
| #define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
| #define | CoreDebug_DEMCR_MON_STEP_Pos 18 |
| #define | CoreDebug_DEMCR_MON_STEP_Pos 18 |
| #define | CoreDebug_DEMCR_MON_STEP_Pos 18 |
| #define | CoreDebug_DEMCR_MON_STEP_Pos 18 |
| #define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
| #define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
| #define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
| #define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
| #define | CoreDebug_DEMCR_TRCENA_Pos 24 |
| #define | CoreDebug_DEMCR_TRCENA_Pos 24 |
| #define | CoreDebug_DEMCR_TRCENA_Pos 24 |
| #define | CoreDebug_DEMCR_TRCENA_Pos 24 |
| #define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
| #define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
| #define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
| #define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
| #define | CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
| #define | CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
| #define | CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
| #define | CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
| #define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
| #define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
| #define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
| #define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
| #define | CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
| #define | CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
| #define | CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
| #define | CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
| #define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
| #define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
| #define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
| #define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
| #define | CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
| #define | CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
| #define | CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
| #define | CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
| #define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
| #define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
| #define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
| #define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
| #define | CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
| #define | CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
| #define | CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
| #define | CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
| #define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
| #define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
| #define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
| #define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
| #define | CoreDebug_DEMCR_VC_INTERR_Pos 9 |
| #define | CoreDebug_DEMCR_VC_INTERR_Pos 9 |
| #define | CoreDebug_DEMCR_VC_INTERR_Pos 9 |
| #define | CoreDebug_DEMCR_VC_INTERR_Pos 9 |
| #define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
| #define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
| #define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
| #define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
| #define | CoreDebug_DEMCR_VC_MMERR_Pos 4 |
| #define | CoreDebug_DEMCR_VC_MMERR_Pos 4 |
| #define | CoreDebug_DEMCR_VC_MMERR_Pos 4 |
| #define | CoreDebug_DEMCR_VC_MMERR_Pos 4 |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
| #define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
| #define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
| #define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
| #define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
| #define | CoreDebug_DEMCR_VC_STATERR_Pos 7 |
| #define | CoreDebug_DEMCR_VC_STATERR_Pos 7 |
| #define | CoreDebug_DEMCR_VC_STATERR_Pos 7 |
| #define | CoreDebug_DEMCR_VC_STATERR_Pos 7 |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
| #define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
| #define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
| #define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
| #define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
| #define | CoreDebug_DHCSR_C_HALT_Pos 1 |
| #define | CoreDebug_DHCSR_C_HALT_Pos 1 |
| #define | CoreDebug_DHCSR_C_HALT_Pos 1 |
| #define | CoreDebug_DHCSR_C_HALT_Pos 1 |
| #define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
| #define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
| #define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
| #define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
| #define | CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
| #define | CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
| #define | CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
| #define | CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
| #define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
| #define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
| #define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
| #define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
| #define | CoreDebug_DHCSR_C_STEP_Pos 2 |
| #define | CoreDebug_DHCSR_C_STEP_Pos 2 |
| #define | CoreDebug_DHCSR_C_STEP_Pos 2 |
| #define | CoreDebug_DHCSR_C_STEP_Pos 2 |
| #define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
| #define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
| #define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
| #define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
| #define | CoreDebug_DHCSR_DBGKEY_Pos 16 |
| #define | CoreDebug_DHCSR_DBGKEY_Pos 16 |
| #define | CoreDebug_DHCSR_DBGKEY_Pos 16 |
| #define | CoreDebug_DHCSR_DBGKEY_Pos 16 |
| #define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
| #define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
| #define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
| #define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
| #define | CoreDebug_DHCSR_S_HALT_Pos 17 |
| #define | CoreDebug_DHCSR_S_HALT_Pos 17 |
| #define | CoreDebug_DHCSR_S_HALT_Pos 17 |
| #define | CoreDebug_DHCSR_S_HALT_Pos 17 |
| #define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
| #define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
| #define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
| #define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
| #define | CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
| #define | CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
| #define | CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
| #define | CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
| #define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
| #define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
| #define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
| #define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
| #define | CoreDebug_DHCSR_S_REGRDY_Pos 16 |
| #define | CoreDebug_DHCSR_S_REGRDY_Pos 16 |
| #define | CoreDebug_DHCSR_S_REGRDY_Pos 16 |
| #define | CoreDebug_DHCSR_S_REGRDY_Pos 16 |
| #define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
| #define | CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
| #define | CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
| #define | CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
| #define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
| #define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
| #define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
| #define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
| #define | CoreDebug_DHCSR_S_SLEEP_Pos 18 |
| #define | CoreDebug_DHCSR_S_SLEEP_Pos 18 |
| #define | CoreDebug_DHCSR_S_SLEEP_Pos 18 |
| #define | CoreDebug_DHCSR_S_SLEEP_Pos 18 |
Detailed Description
Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0 header file.
SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0 header file.
Type definitions for the Core Debug Registers.
Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0 header file.
Macro Definition Documentation
| #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1182 of file core_sc300.h.
| #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1202 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1348 of file core_cm4.h.
| #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1535 of file core_cm7.h.
| #define CoreDebug_DCRSR_REGSEL_Pos 0 |
CoreDebug DCRSR: REGSEL Position
Definition at line 1181 of file core_sc300.h.
| #define CoreDebug_DCRSR_REGSEL_Pos 0 |
CoreDebug DCRSR: REGSEL Position
Definition at line 1201 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DCRSR_REGSEL_Pos 0 |
CoreDebug DCRSR: REGSEL Position
Definition at line 1347 of file core_cm4.h.
| #define CoreDebug_DCRSR_REGSEL_Pos 0 |
CoreDebug DCRSR: REGSEL Position
Definition at line 1534 of file core_cm7.h.
| #define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1179 of file core_sc300.h.
| #define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1199 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1345 of file core_cm4.h.
| #define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1532 of file core_cm7.h.
| #define CoreDebug_DCRSR_REGWnR_Pos 16 |
CoreDebug DCRSR: REGWnR Position
Definition at line 1178 of file core_sc300.h.
| #define CoreDebug_DCRSR_REGWnR_Pos 16 |
CoreDebug DCRSR: REGWnR Position
Definition at line 1198 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DCRSR_REGWnR_Pos 16 |
CoreDebug DCRSR: REGWnR Position
Definition at line 1344 of file core_cm4.h.
| #define CoreDebug_DCRSR_REGWnR_Pos 16 |
CoreDebug DCRSR: REGWnR Position
Definition at line 1531 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1198 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1218 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1364 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1551 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_EN_Pos 16 |
CoreDebug DEMCR: MON_EN Position
Definition at line 1197 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_EN_Pos 16 |
CoreDebug DEMCR: MON_EN Position
Definition at line 1217 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_EN_Pos 16 |
CoreDebug DEMCR: MON_EN Position
Definition at line 1363 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_EN_Pos 16 |
CoreDebug DEMCR: MON_EN Position
Definition at line 1550 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1195 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1215 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1361 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1548 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_PEND_Pos 17 |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1194 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_PEND_Pos 17 |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1214 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_PEND_Pos 17 |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1360 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_PEND_Pos 17 |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1547 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1189 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1209 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1355 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1542 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_REQ_Pos 19 |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1188 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_REQ_Pos 19 |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1208 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_REQ_Pos 19 |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1354 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_REQ_Pos 19 |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1541 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1192 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1212 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1358 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1545 of file core_cm7.h.
| #define CoreDebug_DEMCR_MON_STEP_Pos 18 |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1191 of file core_sc300.h.
| #define CoreDebug_DEMCR_MON_STEP_Pos 18 |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1211 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_MON_STEP_Pos 18 |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1357 of file core_cm4.h.
| #define CoreDebug_DEMCR_MON_STEP_Pos 18 |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1544 of file core_cm7.h.
| #define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1186 of file core_sc300.h.
| #define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1206 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1352 of file core_cm4.h.
| #define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1539 of file core_cm7.h.
| #define CoreDebug_DEMCR_TRCENA_Pos 24 |
CoreDebug DEMCR: TRCENA Position
Definition at line 1185 of file core_sc300.h.
| #define CoreDebug_DEMCR_TRCENA_Pos 24 |
CoreDebug DEMCR: TRCENA Position
Definition at line 1205 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_TRCENA_Pos 24 |
CoreDebug DEMCR: TRCENA Position
Definition at line 1351 of file core_cm4.h.
| #define CoreDebug_DEMCR_TRCENA_Pos 24 |
CoreDebug DEMCR: TRCENA Position
Definition at line 1538 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1207 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1227 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1373 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1560 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1206 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1226 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1372 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1559 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1213 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1233 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1379 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1566 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1212 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1232 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1378 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1565 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1222 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1242 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1388 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1575 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1221 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1241 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1387 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1574 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1201 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1221 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1367 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1554 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1200 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1220 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1366 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1553 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1204 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1224 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1370 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1557 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_INTERR_Pos 9 |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1203 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_INTERR_Pos 9 |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1223 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_INTERR_Pos 9 |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1369 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_INTERR_Pos 9 |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1556 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1219 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1239 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1385 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1572 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_MMERR_Pos 4 |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1218 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_MMERR_Pos 4 |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1238 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_MMERR_Pos 4 |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1384 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_MMERR_Pos 4 |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1571 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1216 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1236 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1382 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1569 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1215 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1235 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1381 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1568 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1210 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1230 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1376 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1563 of file core_cm7.h.
| #define CoreDebug_DEMCR_VC_STATERR_Pos 7 |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1209 of file core_sc300.h.
| #define CoreDebug_DEMCR_VC_STATERR_Pos 7 |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1229 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DEMCR_VC_STATERR_Pos 7 |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1375 of file core_cm4.h.
| #define CoreDebug_DEMCR_VC_STATERR_Pos 7 |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1562 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1175 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1195 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1341 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1528 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1174 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1194 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1340 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1527 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1172 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1192 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1338 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1525 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_HALT_Pos 1 |
CoreDebug DHCSR: C_HALT Position
Definition at line 1171 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_HALT_Pos 1 |
CoreDebug DHCSR: C_HALT Position
Definition at line 1191 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_HALT_Pos 1 |
CoreDebug DHCSR: C_HALT Position
Definition at line 1337 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_HALT_Pos 1 |
CoreDebug DHCSR: C_HALT Position
Definition at line 1524 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1166 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1186 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1332 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1519 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1165 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1185 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1331 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1518 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1163 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1183 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1329 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1516 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1162 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1182 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1328 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1515 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1169 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1189 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1335 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1522 of file core_cm7.h.
| #define CoreDebug_DHCSR_C_STEP_Pos 2 |
CoreDebug DHCSR: C_STEP Position
Definition at line 1168 of file core_sc300.h.
| #define CoreDebug_DHCSR_C_STEP_Pos 2 |
CoreDebug DHCSR: C_STEP Position
Definition at line 1188 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_C_STEP_Pos 2 |
CoreDebug DHCSR: C_STEP Position
Definition at line 1334 of file core_cm4.h.
| #define CoreDebug_DHCSR_C_STEP_Pos 2 |
CoreDebug DHCSR: C_STEP Position
Definition at line 1521 of file core_cm7.h.
| #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1142 of file core_sc300.h.
| #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1162 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1308 of file core_cm4.h.
| #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1495 of file core_cm7.h.
| #define CoreDebug_DHCSR_DBGKEY_Pos 16 |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1141 of file core_sc300.h.
| #define CoreDebug_DHCSR_DBGKEY_Pos 16 |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1161 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_DBGKEY_Pos 16 |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1307 of file core_cm4.h.
| #define CoreDebug_DHCSR_DBGKEY_Pos 16 |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1494 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1157 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1177 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1323 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1510 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_HALT_Pos 17 |
CoreDebug DHCSR: S_HALT Position
Definition at line 1156 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_HALT_Pos 17 |
CoreDebug DHCSR: S_HALT Position
Definition at line 1176 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_HALT_Pos 17 |
CoreDebug DHCSR: S_HALT Position
Definition at line 1322 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_HALT_Pos 17 |
CoreDebug DHCSR: S_HALT Position
Definition at line 1509 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1151 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1171 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1317 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1504 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1150 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1170 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1316 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1503 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1160 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1180 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1326 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1513 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_REGRDY_Pos 16 |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1159 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_REGRDY_Pos 16 |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1179 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_REGRDY_Pos 16 |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1325 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_REGRDY_Pos 16 |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1512 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1145 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1165 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1311 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1498 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1144 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1164 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1310 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1497 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1148 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1168 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1314 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1501 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1147 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1167 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1313 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1500 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1154 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1174 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1320 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1507 of file core_cm7.h.
| #define CoreDebug_DHCSR_S_SLEEP_Pos 18 |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1153 of file core_sc300.h.
| #define CoreDebug_DHCSR_S_SLEEP_Pos 18 |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1173 of file airbourne/airbourne/lib/CMSIS/CM4/CoreSupport/core_cm3.h.
| #define CoreDebug_DHCSR_S_SLEEP_Pos 18 |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1319 of file core_cm4.h.
| #define CoreDebug_DHCSR_S_SLEEP_Pos 18 |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1506 of file core_cm7.h.