|
Classes | |
| struct | ITM_Type |
| Structure type to access the Instrumentation Trace Macrocell Register (ITM). More... | |
Macros | |
| #define | ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) |
| #define | ITM_IMCR_INTEGRATION_Pos 0 |
| #define | ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) |
| #define | ITM_IRR_ATREADYM_Pos 0 |
| #define | ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) |
| #define | ITM_IWR_ATVALIDM_Pos 0 |
| #define | ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) |
| #define | ITM_LSR_Access_Pos 1 |
| #define | ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) |
| #define | ITM_LSR_ByteAcc_Pos 2 |
| #define | ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) |
| #define | ITM_LSR_Present_Pos 0 |
| #define | ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) |
| #define | ITM_TCR_ATBID_Pos 16 |
| #define | ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) |
| #define | ITM_TCR_BUSY_Pos 23 |
| #define | ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) |
| #define | ITM_TCR_DWTENA_Pos 3 |
| #define | ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) |
| #define | ITM_TCR_ITMENA_Pos 0 |
| #define | ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) |
| #define | ITM_TCR_SWOENA_Pos 4 |
| #define | ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) |
| #define | ITM_TCR_SYNCENA_Pos 2 |
| #define | ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) |
| #define | ITM_TCR_TSENA_Pos 1 |
| #define | ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) |
| #define | ITM_TCR_TSPrescale_Pos 8 |
| #define | ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) |
| #define | ITM_TPR_PRIVMASK_Pos 0 |
Detailed Description
memory mapped structure for Instrumentation Trace Macrocell (ITM)
Macro Definition Documentation
| #define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) |
ITM IMCR: INTEGRATION Mask
Definition at line 487 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_IMCR_INTEGRATION_Pos 0 |
ITM IMCR: INTEGRATION Position
Definition at line 486 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) |
ITM IRR: ATREADYM Mask
Definition at line 483 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_IRR_ATREADYM_Pos 0 |
ITM IRR: ATREADYM Position
Definition at line 482 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) |
ITM IWR: ATVALIDM Mask
Definition at line 479 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_IWR_ATVALIDM_Pos 0 |
ITM IWR: ATVALIDM Position
Definition at line 478 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 494 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_LSR_Access_Pos 1 |
ITM LSR: Access Position
Definition at line 493 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 491 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_LSR_ByteAcc_Pos 2 |
ITM LSR: ByteAcc Position
Definition at line 490 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) |
ITM LSR: Present Mask
Definition at line 497 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_LSR_Present_Pos 0 |
ITM LSR: Present Position
Definition at line 496 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) |
ITM TCR: ATBID Mask
Definition at line 457 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_ATBID_Pos 16 |
ITM TCR: ATBID Position
Definition at line 456 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 454 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_BUSY_Pos 23 |
ITM TCR: BUSY Position
Definition at line 453 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 466 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_DWTENA_Pos 3 |
ITM TCR: DWTENA Position
Definition at line 465 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) |
ITM TCR: ITM Enable bit Mask
Definition at line 475 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_ITMENA_Pos 0 |
ITM TCR: ITM Enable bit Position
Definition at line 474 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 463 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_SWOENA_Pos 4 |
ITM TCR: SWOENA Position
Definition at line 462 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 469 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_SYNCENA_Pos 2 |
ITM TCR: SYNCENA Position
Definition at line 468 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 472 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_TSENA_Pos 1 |
ITM TCR: TSENA Position
Definition at line 471 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 460 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TCR_TSPrescale_Pos 8 |
ITM TCR: TSPrescale Position
Definition at line 459 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) |
ITM TPR: PRIVMASK Mask
Definition at line 450 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.
| #define ITM_TPR_PRIVMASK_Pos 0 |
ITM TPR: PRIVMASK Position
Definition at line 449 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.