Functions
CMSIS CM3 Core Function Interface
Collaboration diagram for CMSIS CM3 Core Function Interface:

Functions

static __INLINE void NVIC_ClearPendingIRQ (IRQn_Type IRQn)
 Clear the pending bit for an external interrupt. More...
 
static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
 Decode the priority of an interrupt. More...
 
static __INLINE void NVIC_DisableIRQ (IRQn_Type IRQn)
 Disable the interrupt line for external interrupt specified. More...
 
static __INLINE void NVIC_EnableIRQ (IRQn_Type IRQn)
 Enable Interrupt in NVIC Interrupt Controller. More...
 
static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 Encode the priority for an interrupt. More...
 
static __INLINE uint32_t NVIC_GetActive (IRQn_Type IRQn)
 Read the active bit for an external interrupt. More...
 
static __INLINE uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn)
 Read the interrupt pending bit for a device specific interrupt source. More...
 
static __INLINE uint32_t NVIC_GetPriority (IRQn_Type IRQn)
 Read the priority for an interrupt. More...
 
static __INLINE uint32_t NVIC_GetPriorityGrouping (void)
 Get the Priority Grouping from NVIC Interrupt Controller. More...
 
static __INLINE void NVIC_SetPendingIRQ (IRQn_Type IRQn)
 Set the pending bit for an external interrupt. More...
 
static __INLINE void NVIC_SetPriority (IRQn_Type IRQn, uint32_t priority)
 Set the priority for an interrupt. More...
 
static __INLINE void NVIC_SetPriorityGrouping (uint32_t PriorityGroup)
 Set the Priority Grouping in NVIC Interrupt Controller. More...
 
static __INLINE void NVIC_SystemReset (void)
 Initiate a system reset request. More...
 
static __INLINE uint32_t SysTick_Config (uint32_t ticks)
 Initialize and start the SysTick counter and its interrupt. More...
 

Detailed Description

Core Function Interface containing:

Function Documentation

static __INLINE void NVIC_ClearPendingIRQ ( IRQn_Type  IRQn)
static

Clear the pending bit for an external interrupt.

Parameters
IRQnThe number of the interrupt for clear pending

Clear the pending bit for the specified interrupt. The interrupt number cannot be a negative value.

Definition at line 1557 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_DecodePriority ( uint32_t  Priority,
uint32_t  PriorityGroup,
uint32_t *  pPreemptPriority,
uint32_t *  pSubPriority 
)
static

Decode the priority of an interrupt.

Parameters
PriorityThe priority for the interrupt
PriorityGroupThe used priority group
pPreemptPriorityThe preemptive priority value (starting from 0)
pSubPriorityThe sub priority value (starting from 0)

Decode an interrupt priority value with the given priority group to preemptive priority value and sub priority value. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.

The priority value can be retrieved with NVIC_GetPriority(...) function

Definition at line 1667 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_DisableIRQ ( IRQn_Type  IRQn)
static

Disable the interrupt line for external interrupt specified.

Parameters
IRQnThe positive number of the external interrupt to disable

Disable a device specific interupt in the NVIC interrupt controller. The interrupt number cannot be a negative value.

Definition at line 1517 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_EnableIRQ ( IRQn_Type  IRQn)
static

Enable Interrupt in NVIC Interrupt Controller.

Parameters
IRQnThe positive number of the external interrupt to enable

Enable a device specific interupt in the NVIC interrupt controller. The interrupt number cannot be a negative value.

Definition at line 1504 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE uint32_t NVIC_EncodePriority ( uint32_t  PriorityGroup,
uint32_t  PreemptPriority,
uint32_t  SubPriority 
)
static

Encode the priority for an interrupt.

Parameters
PriorityGroupThe used priority group
PreemptPriorityThe preemptive priority value (starting from 0)
SubPriorityThe sub priority value (starting from 0)
Returns
The encoded priority for the interrupt

Encode the priority for an interrupt with the given priority group, preemptive priority value and sub priority value. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.

The returned priority value can be used for NVIC_SetPriority(...) function

Definition at line 1636 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE uint32_t NVIC_GetActive ( IRQn_Type  IRQn)
static

Read the active bit for an external interrupt.

Parameters
IRQnThe number of the interrupt for read active bit
Returns
1 = interrupt active, 0 = interrupt not active

Read the active register in NVIC and returns 1 if its status is active, otherwise it returns 0.

Definition at line 1571 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE uint32_t NVIC_GetPendingIRQ ( IRQn_Type  IRQn)
static

Read the interrupt pending bit for a device specific interrupt source.

Parameters
IRQnThe number of the device specifc interrupt
Returns
1 = interrupt pending, 0 = interrupt not pending

Read the pending register in NVIC and return 1 if its status is pending, otherwise it returns 0

Definition at line 1531 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE uint32_t NVIC_GetPriority ( IRQn_Type  IRQn)
static

Read the priority for an interrupt.

Parameters
IRQnThe number of the interrupt for get priority
Returns
The priority for the interrupt

Read the priority for the specified interrupt. The interrupt number can be positive to specify an external (device specific) interrupt, or negative to specify an internal (core) interrupt.

The returned priority value is automatically aligned to the implemented priority bits of the microcontroller.

Note: The priority cannot be set for every core interrupt.

Definition at line 1611 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE uint32_t NVIC_GetPriorityGrouping ( void  )
static

Get the Priority Grouping from NVIC Interrupt Controller.

Returns
priority grouping field

Get the priority grouping from NVIC Interrupt Controller. priority grouping is SCB->AIRCR [10:8] PRIGROUP field.

Definition at line 1491 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_SetPendingIRQ ( IRQn_Type  IRQn)
static

Set the pending bit for an external interrupt.

Parameters
IRQnThe number of the interrupt for set pending

Set the pending bit for the specified interrupt. The interrupt number cannot be a negative value.

Definition at line 1544 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_SetPriority ( IRQn_Type  IRQn,
uint32_t  priority 
)
static

Set the priority for an interrupt.

Parameters
IRQnThe number of the interrupt for set priority
priorityThe priority to set

Set the priority for the specified interrupt. The interrupt number can be positive to specify an external (device specific) interrupt, or negative to specify an internal (core) interrupt.

Note: The priority cannot be set for every core interrupt.

Definition at line 1588 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_SetPriorityGrouping ( uint32_t  PriorityGroup)
static

Set the Priority Grouping in NVIC Interrupt Controller.

Parameters
PriorityGroupis priority grouping field

Set the priority grouping field using the required unlock sequence. The parameter priority_grouping is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.

Definition at line 1470 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE void NVIC_SystemReset ( void  )
static

Initiate a system reset request.

Initiate a system reset request to reset the MCU

Definition at line 1721 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.

static __INLINE uint32_t SysTick_Config ( uint32_t  ticks)
static

Initialize and start the SysTick counter and its interrupt.

Parameters
ticksnumber of ticks between two interrupts
Returns
1 = failed, 0 = successful

Initialise the system tick timer and its interrupt and start the system tick timer / counter in free running mode to generate periodical interrupts.

Definition at line 1696 of file breezy/breezystm32/lib/CMSIS/CM3/CoreSupport/core_cm3.h.



rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Wed Jul 3 2019 19:59:31