Macros
Collaboration diagram for RCC_PLL_Clock_Source:

Macros

#define IS_RCC_PLL_SOURCE(SOURCE)
 
#define IS_RCC_PLL_SOURCE(SOURCE)
 
#define IS_RCC_PLL_SOURCE(SOURCE)
 
#define IS_RCC_PLLI2S_DIVQ_VALUE(VALUE)   ((1 <= (VALUE)) && ((VALUE) <= 32))
 
#define IS_RCC_PLLI2SM_VALUE(VALUE)   ((VALUE) <= 63)
 
#define IS_RCC_PLLI2SN_VALUE(VALUE)   ((192 <= (VALUE)) && ((VALUE) <= 432))
 
#define IS_RCC_PLLI2SN_VALUE(VALUE)   ((50 <= (VALUE)) && ((VALUE) <= 432))
 
#define IS_RCC_PLLI2SQ_VALUE(VALUE)   ((2 <= (VALUE)) && ((VALUE) <= 15))
 
#define IS_RCC_PLLI2SR_VALUE(VALUE)   ((2 <= (VALUE)) && ((VALUE) <= 7))
 
#define IS_RCC_PLLI2SR_VALUE(VALUE)   ((2 <= (VALUE)) && ((VALUE) <= 7))
 
#define IS_RCC_PLLM_VALUE(VALUE)   ((VALUE) <= 63)
 
#define IS_RCC_PLLM_VALUE(VALUE)   ((VALUE) <= 63)
 
#define IS_RCC_PLLN_VALUE(VALUE)   ((192 <= (VALUE)) && ((VALUE) <= 432))
 
#define IS_RCC_PLLN_VALUE(VALUE)   ((50 <= (VALUE)) && ((VALUE) <= 432))
 
#define IS_RCC_PLLP_VALUE(VALUE)   (((VALUE) == 2) || ((VALUE) == 4) || ((VALUE) == 6) || ((VALUE) == 8))
 
#define IS_RCC_PLLP_VALUE(VALUE)   (((VALUE) == 2) || ((VALUE) == 4) || ((VALUE) == 6) || ((VALUE) == 8))
 
#define IS_RCC_PLLQ_VALUE(VALUE)   ((4 <= (VALUE)) && ((VALUE) <= 15))
 
#define IS_RCC_PLLQ_VALUE(VALUE)   ((4 <= (VALUE)) && ((VALUE) <= 15))
 
#define IS_RCC_PLLSAI_DIVQ_VALUE(VALUE)   ((1 <= (VALUE)) && ((VALUE) <= 32))
 
#define IS_RCC_PLLSAIN_VALUE(VALUE)   ((50 <= (VALUE)) && ((VALUE) <= 432))
 
#define IS_RCC_PLLSAIQ_VALUE(VALUE)   ((2 <= (VALUE)) && ((VALUE) <= 15))
 
#define IS_RCC_PLLSAIR_VALUE(VALUE)   ((2 <= (VALUE)) && ((VALUE) <= 7))
 
#define RCC_PLLSource_HSE   ((uint32_t)0x00400000)
 
#define RCC_PLLSource_HSE   ((uint32_t)0x00400000)
 
#define RCC_PLLSource_HSI   ((uint32_t)0x00000000)
 
#define RCC_PLLSource_HSI   ((uint32_t)0x00000000)
 
#define RCC_PLLSource_HSI_Div2   RCC_CFGR_PLLSRC_HSI_Div2
 
#define RCC_PLLSource_PREDIV1   RCC_CFGR_PLLSRC_PREDIV1
 

Detailed Description

Macro Definition Documentation

#define IS_RCC_PLL_SOURCE (   SOURCE)
Value:
(((SOURCE) == RCC_PLLSource_HSI) || \
((SOURCE) == RCC_PLLSource_HSE))

Definition at line 79 of file STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rcc.h.

#define IS_RCC_PLL_SOURCE (   SOURCE)
Value:
(((SOURCE) == RCC_PLLSource_HSI_Div2) || \
((SOURCE) == RCC_PLLSource_PREDIV1))
#define RCC_PLLSource_PREDIV1
Definition: stm32f30x_rcc.h:99
#define RCC_PLLSource_HSI_Div2
Definition: stm32f30x_rcc.h:98

Definition at line 101 of file stm32f30x_rcc.h.

#define IS_RCC_PLL_SOURCE (   SOURCE)
#define IS_RCC_PLLI2S_DIVQ_VALUE (   VALUE)    ((1 <= (VALUE)) && ((VALUE) <= 32))
#define IS_RCC_PLLI2SM_VALUE (   VALUE)    ((VALUE) <= 63)
#define IS_RCC_PLLI2SN_VALUE (   VALUE)    ((192 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLI2SN_VALUE (   VALUE)    ((50 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLI2SQ_VALUE (   VALUE)    ((2 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLI2SR_VALUE (   VALUE)    ((2 <= (VALUE)) && ((VALUE) <= 7))
#define IS_RCC_PLLI2SR_VALUE (   VALUE)    ((2 <= (VALUE)) && ((VALUE) <= 7))
#define IS_RCC_PLLM_VALUE (   VALUE)    ((VALUE) <= 63)
#define IS_RCC_PLLM_VALUE (   VALUE)    ((VALUE) <= 63)
#define IS_RCC_PLLN_VALUE (   VALUE)    ((192 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLN_VALUE (   VALUE)    ((50 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLP_VALUE (   VALUE)    (((VALUE) == 2) || ((VALUE) == 4) || ((VALUE) == 6) || ((VALUE) == 8))
#define IS_RCC_PLLP_VALUE (   VALUE)    (((VALUE) == 2) || ((VALUE) == 4) || ((VALUE) == 6) || ((VALUE) == 8))
#define IS_RCC_PLLQ_VALUE (   VALUE)    ((4 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLQ_VALUE (   VALUE)    ((4 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLSAI_DIVQ_VALUE (   VALUE)    ((1 <= (VALUE)) && ((VALUE) <= 32))
#define IS_RCC_PLLSAIN_VALUE (   VALUE)    ((50 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLSAIQ_VALUE (   VALUE)    ((2 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLSAIR_VALUE (   VALUE)    ((2 <= (VALUE)) && ((VALUE) <= 7))
#define RCC_PLLSource_HSE   ((uint32_t)0x00400000)
#define RCC_PLLSource_HSE   ((uint32_t)0x00400000)
#define RCC_PLLSource_HSI   ((uint32_t)0x00000000)
#define RCC_PLLSource_HSI   ((uint32_t)0x00000000)
#define RCC_PLLSource_HSI_Div2   RCC_CFGR_PLLSRC_HSI_Div2

Definition at line 98 of file stm32f30x_rcc.h.

#define RCC_PLLSource_PREDIV1   RCC_CFGR_PLLSRC_PREDIV1

Definition at line 99 of file stm32f30x_rcc.h.



rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Sat May 9 2020 03:16:56