29 #include <avr/interrupt.h> 30 #include <avr/pgmspace.h> 39 #if EXTERNAL_NUM_INTERRUPTS > 8 40 #warning There are more than 8 external interrupts. Some callbacks may not be initialized. 43 #if EXTERNAL_NUM_INTERRUPTS > 7 46 #if EXTERNAL_NUM_INTERRUPTS > 6 49 #if EXTERNAL_NUM_INTERRUPTS > 5 52 #if EXTERNAL_NUM_INTERRUPTS > 4 55 #if EXTERNAL_NUM_INTERRUPTS > 3 58 #if EXTERNAL_NUM_INTERRUPTS > 2 61 #if EXTERNAL_NUM_INTERRUPTS > 1 64 #if EXTERNAL_NUM_INTERRUPTS > 0 72 intFunc[interruptNum] = userFunc;
81 switch (interruptNum) {
82 #if defined(__AVR_ATmega32U4__) 87 EICRA = (EICRA & ~((1<<ISC00) | (1<<ISC01))) | (mode << ISC00);
91 EICRA = (EICRA & ~((1<<ISC10) | (1<<ISC11))) | (mode << ISC10);
95 EICRA = (EICRA & ~((1<<ISC20) | (1<<ISC21))) | (mode << ISC20);
99 EICRA = (EICRA & ~((1<<ISC30) | (1<<ISC31))) | (mode << ISC30);
103 EICRB = (EICRB & ~((1<<ISC60) | (1<<ISC61))) | (mode << ISC60);
106 #elif defined(EICRA) && defined(EICRB) && defined(EIMSK) 108 EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
109 EIMSK |= (1 << INT0);
112 EICRA = (EICRA & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
113 EIMSK |= (1 << INT1);
116 EICRA = (EICRA & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
117 EIMSK |= (1 << INT2);
120 EICRA = (EICRA & ~((1 << ISC30) | (1 << ISC31))) | (mode << ISC30);
121 EIMSK |= (1 << INT3);
124 EICRB = (EICRB & ~((1 << ISC40) | (1 << ISC41))) | (mode << ISC40);
125 EIMSK |= (1 << INT4);
128 EICRB = (EICRB & ~((1 << ISC50) | (1 << ISC51))) | (mode << ISC50);
129 EIMSK |= (1 << INT5);
132 EICRB = (EICRB & ~((1 << ISC60) | (1 << ISC61))) | (mode << ISC60);
133 EIMSK |= (1 << INT6);
136 EICRB = (EICRB & ~((1 << ISC70) | (1 << ISC71))) | (mode << ISC70);
137 EIMSK |= (1 << INT7);
141 #if defined(EICRA) && defined(ISC00) && defined(EIMSK) 142 EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
143 EIMSK |= (1 << INT0);
144 #elif defined(MCUCR) && defined(ISC00) && defined(GICR) 145 MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
147 #elif defined(MCUCR) && defined(ISC00) && defined(GIMSK) 148 MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
149 GIMSK |= (1 << INT0);
151 #error attachInterrupt not finished for this CPU (case 0) 156 #if defined(EICRA) && defined(ISC10) && defined(ISC11) && defined(EIMSK) 157 EICRA = (EICRA & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
158 EIMSK |= (1 << INT1);
159 #elif defined(MCUCR) && defined(ISC10) && defined(ISC11) && defined(GICR) 160 MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
162 #elif defined(MCUCR) && defined(ISC10) && defined(GIMSK) && defined(GIMSK) 163 MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
164 GIMSK |= (1 << INT1);
166 #warning attachInterrupt may need some more work for this cpu (case 1) 171 #if defined(EICRA) && defined(ISC20) && defined(ISC21) && defined(EIMSK) 172 EICRA = (EICRA & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
173 EIMSK |= (1 << INT2);
174 #elif defined(MCUCR) && defined(ISC20) && defined(ISC21) && defined(GICR) 175 MCUCR = (MCUCR & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
177 #elif defined(MCUCR) && defined(ISC20) && defined(GIMSK) && defined(GIMSK) 178 MCUCR = (MCUCR & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
179 GIMSK |= (1 << INT2);
192 switch (interruptNum) {
193 #if defined(__AVR_ATmega32U4__) 209 #elif defined(EICRA) && defined(EICRB) && defined(EIMSK) 211 EIMSK &= ~(1 << INT0);
214 EIMSK &= ~(1 << INT1);
217 EIMSK &= ~(1 << INT2);
220 EIMSK &= ~(1 << INT3);
223 EIMSK &= ~(1 << INT4);
226 EIMSK &= ~(1 << INT5);
229 EIMSK &= ~(1 << INT6);
232 EIMSK &= ~(1 << INT7);
236 #if defined(EIMSK) && defined(INT0) 237 EIMSK &= ~(1 << INT0);
238 #elif defined(GICR) && defined(ISC00) 239 GICR &= ~(1 << INT0);
240 #elif defined(GIMSK) && defined(INT0) 241 GIMSK &= ~(1 << INT0);
243 #error detachInterrupt not finished for this cpu 248 #if defined(EIMSK) && defined(INT1) 249 EIMSK &= ~(1 << INT1);
250 #elif defined(GICR) && defined(INT1) 251 GICR &= ~(1 << INT1);
252 #elif defined(GIMSK) && defined(INT1) 253 GIMSK &= ~(1 << INT1);
255 #warning detachInterrupt may need some more work for this cpu (case 1) 260 #if defined(EIMSK) && defined(INT2) 261 EIMSK &= ~(1 << INT2);
262 #elif defined(GICR) && defined(INT2) 263 GICR &= ~(1 << INT2);
264 #elif defined(GIMSK) && defined(INT2) 265 GIMSK &= ~(1 << INT2);
267 #warning detachInterrupt may need some more work for this cpu (case 2) 283 #define IMPLEMENT_ISR(vect, interrupt) \ 285 intFunc[interrupt](); \ 288 #if defined(__AVR_ATmega32U4__) 296 #elif defined(EICRA) && defined(EICRB) 312 #if defined(EICRA) && defined(ISC20) void detachInterrupt(uint8_t interruptNum)
void(* voidFuncPtr)(void)
#define IMPLEMENT_ISR(vect, interrupt)
static volatile voidFuncPtr intFunc[EXTERNAL_NUM_INTERRUPTS]
static void nothing(void)
#define EXTERNAL_NUM_INTERRUPTS
void attachInterrupt(uint8_t interruptNum, void(*userFunc)(void), int mode)