Collaboration diagram for Peripheral_declaration:

Defines
#define	ADC1 ((ADC_TypeDef *) ADC1_BASE)
#define	ADC1 ((ADC_TypeDef *) ADC1_BASE)
#define	ADC2 ((ADC_TypeDef *) ADC2_BASE)
#define	ADC2 ((ADC_TypeDef *) ADC2_BASE)
#define	ADC3 ((ADC_TypeDef *) ADC3_BASE)
#define	ADC3 ((ADC_TypeDef *) ADC3_BASE)
#define	AFIO ((AFIO_TypeDef *) AFIO_BASE)
#define	AFIO ((AFIO_TypeDef *) AFIO_BASE)
#define	BKP ((BKP_TypeDef *) BKP_BASE)
#define	BKP ((BKP_TypeDef *) BKP_BASE)
#define	CAN1 ((CAN_TypeDef *) CAN1_BASE)
#define	CAN1 ((CAN_TypeDef *) CAN1_BASE)
#define	CAN2 ((CAN_TypeDef *) CAN2_BASE)
#define	CAN2 ((CAN_TypeDef *) CAN2_BASE)
#define	CEC ((CEC_TypeDef *) CEC_BASE)
#define	CEC ((CEC_TypeDef *) CEC_BASE)
#define	CRC ((CRC_TypeDef *) CRC_BASE)
#define	CRC ((CRC_TypeDef *) CRC_BASE)
#define	DAC ((DAC_TypeDef *) DAC_BASE)
#define	DAC ((DAC_TypeDef *) DAC_BASE)
#define	DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE)
#define	DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE)
#define	DMA1 ((DMA_TypeDef *) DMA1_BASE)
#define	DMA1 ((DMA_TypeDef *) DMA1_BASE)
#define	DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE)
#define	DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE)
#define	DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
#define	DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
#define	DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE)
#define	DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE)
#define	DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE)
#define	DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE)
#define	DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
#define	DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
#define	DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE)
#define	DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE)
#define	DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
#define	DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
#define	DMA2 ((DMA_TypeDef *) DMA2_BASE)
#define	DMA2 ((DMA_TypeDef *) DMA2_BASE)
#define	DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE)
#define	DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE)
#define	DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE)
#define	DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE)
#define	DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE)
#define	DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE)
#define	DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
#define	DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
#define	DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE)
#define	DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE)
#define	ETH ((ETH_TypeDef *) ETH_BASE)
#define	ETH ((ETH_TypeDef *) ETH_BASE)
#define	EXTI ((EXTI_TypeDef *) EXTI_BASE)
#define	EXTI ((EXTI_TypeDef *) EXTI_BASE)
#define	FLASH ((FLASH_TypeDef *) FLASH_R_BASE)
#define	FLASH ((FLASH_TypeDef *) FLASH_R_BASE)
#define	FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
#define	FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
#define	FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)
#define	FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)
#define	FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE)
#define	FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE)
#define	FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE)
#define	FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE)
#define	FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE)
#define	FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE)
#define	GPIOA ((GPIO_TypeDef *) GPIOA_BASE)
#define	GPIOA ((GPIO_TypeDef *) GPIOA_BASE)
#define	GPIOB ((GPIO_TypeDef *) GPIOB_BASE)
#define	GPIOB ((GPIO_TypeDef *) GPIOB_BASE)
#define	GPIOC ((GPIO_TypeDef *) GPIOC_BASE)
#define	GPIOC ((GPIO_TypeDef *) GPIOC_BASE)
#define	GPIOD ((GPIO_TypeDef *) GPIOD_BASE)
#define	GPIOD ((GPIO_TypeDef *) GPIOD_BASE)
#define	GPIOE ((GPIO_TypeDef *) GPIOE_BASE)
#define	GPIOE ((GPIO_TypeDef *) GPIOE_BASE)
#define	GPIOF ((GPIO_TypeDef *) GPIOF_BASE)
#define	GPIOF ((GPIO_TypeDef *) GPIOF_BASE)
#define	GPIOG ((GPIO_TypeDef *) GPIOG_BASE)
#define	GPIOG ((GPIO_TypeDef *) GPIOG_BASE)
#define	I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define	I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define	I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define	I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define	IWDG ((IWDG_TypeDef *) IWDG_BASE)
#define	IWDG ((IWDG_TypeDef *) IWDG_BASE)
#define	OB ((OB_TypeDef *) OB_BASE)
#define	OB ((OB_TypeDef *) OB_BASE)
#define	PWR ((PWR_TypeDef *) PWR_BASE)
#define	PWR ((PWR_TypeDef *) PWR_BASE)
#define	RCC ((RCC_TypeDef *) RCC_BASE)
#define	RCC ((RCC_TypeDef *) RCC_BASE)
#define	RTC ((RTC_TypeDef *) RTC_BASE)
#define	RTC ((RTC_TypeDef *) RTC_BASE)
#define	SDIO ((SDIO_TypeDef *) SDIO_BASE)
#define	SDIO ((SDIO_TypeDef *) SDIO_BASE)
#define	SPI1 ((SPI_TypeDef *) SPI1_BASE)
#define	SPI1 ((SPI_TypeDef *) SPI1_BASE)
#define	SPI2 ((SPI_TypeDef *) SPI2_BASE)
#define	SPI2 ((SPI_TypeDef *) SPI2_BASE)
#define	SPI3 ((SPI_TypeDef *) SPI3_BASE)
#define	SPI3 ((SPI_TypeDef *) SPI3_BASE)
#define	TIM1 ((TIM_TypeDef *) TIM1_BASE)
#define	TIM1 ((TIM_TypeDef *) TIM1_BASE)
#define	TIM10 ((TIM_TypeDef *) TIM10_BASE)
#define	TIM10 ((TIM_TypeDef *) TIM10_BASE)
#define	TIM11 ((TIM_TypeDef *) TIM11_BASE)
#define	TIM11 ((TIM_TypeDef *) TIM11_BASE)
#define	TIM12 ((TIM_TypeDef *) TIM12_BASE)
#define	TIM12 ((TIM_TypeDef *) TIM12_BASE)
#define	TIM13 ((TIM_TypeDef *) TIM13_BASE)
#define	TIM13 ((TIM_TypeDef *) TIM13_BASE)
#define	TIM14 ((TIM_TypeDef *) TIM14_BASE)
#define	TIM14 ((TIM_TypeDef *) TIM14_BASE)
#define	TIM15 ((TIM_TypeDef *) TIM15_BASE)
#define	TIM15 ((TIM_TypeDef *) TIM15_BASE)
#define	TIM16 ((TIM_TypeDef *) TIM16_BASE)
#define	TIM16 ((TIM_TypeDef *) TIM16_BASE)
#define	TIM17 ((TIM_TypeDef *) TIM17_BASE)
#define	TIM17 ((TIM_TypeDef *) TIM17_BASE)
#define	TIM2 ((TIM_TypeDef *) TIM2_BASE)
#define	TIM2 ((TIM_TypeDef *) TIM2_BASE)
#define	TIM3 ((TIM_TypeDef *) TIM3_BASE)
#define	TIM3 ((TIM_TypeDef *) TIM3_BASE)
#define	TIM4 ((TIM_TypeDef *) TIM4_BASE)
#define	TIM4 ((TIM_TypeDef *) TIM4_BASE)
#define	TIM5 ((TIM_TypeDef *) TIM5_BASE)
#define	TIM5 ((TIM_TypeDef *) TIM5_BASE)
#define	TIM6 ((TIM_TypeDef *) TIM6_BASE)
#define	TIM6 ((TIM_TypeDef *) TIM6_BASE)
#define	TIM7 ((TIM_TypeDef *) TIM7_BASE)
#define	TIM7 ((TIM_TypeDef *) TIM7_BASE)
#define	TIM8 ((TIM_TypeDef *) TIM8_BASE)
#define	TIM8 ((TIM_TypeDef *) TIM8_BASE)
#define	TIM9 ((TIM_TypeDef *) TIM9_BASE)
#define	TIM9 ((TIM_TypeDef *) TIM9_BASE)
#define	UART4 ((USART_TypeDef *) UART4_BASE)
#define	UART4 ((USART_TypeDef *) UART4_BASE)
#define	UART5 ((USART_TypeDef *) UART5_BASE)
#define	UART5 ((USART_TypeDef *) UART5_BASE)
#define	USART1 ((USART_TypeDef *) USART1_BASE)
#define	USART1 ((USART_TypeDef *) USART1_BASE)
#define	USART2 ((USART_TypeDef *) USART2_BASE)
#define	USART2 ((USART_TypeDef *) USART2_BASE)
#define	USART3 ((USART_TypeDef *) USART3_BASE)
#define	USART3 ((USART_TypeDef *) USART3_BASE)
#define	WWDG ((WWDG_TypeDef *) WWDG_BASE)
#define	WWDG ((WWDG_TypeDef *) WWDG_BASE)