gpiogroup_11xx.h

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/*
 * @brief LPC11xx GPIO group driver for CHIP_LPC11AXX, CHIP_LPC11EXX, and
 * CHIP_LPC11UXX families only.
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2013
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */
 
#ifndef __GPIOGROUP_11XX_H_
#define __GPIOGROUP_11XX_H_
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined(CHIP_LPC11AXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11UXX)
 
typedef struct {                                        
        __IO uint32_t  CTRL;                    
        __I  uint32_t  RESERVED0[7];
        __IO uint32_t  PORT_POL[8];             
        __IO uint32_t  PORT_ENA[8];             
        uint32_t       RESERVED1[4072];
} LPC_GPIOGROUPINT_T;
 
#define GPIOGR_INT      (1 << 0)        
#define GPIOGR_COMB     (1 << 1)        
#define GPIOGR_TRIG     (1 << 2)        
STATIC INLINE void Chip_GPIOGP_ClearIntStatus(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
{
        uint32_t temp;
 
        temp = pGPIOGPINT[group].CTRL;
        pGPIOGPINT[group].CTRL = temp | GPIOGR_INT;
}
 
STATIC INLINE bool Chip_GPIOGP_GetIntStatus(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
{
        return (bool) ((pGPIOGPINT[group].CTRL & GPIOGR_INT) != 0);
}
 
STATIC INLINE void Chip_GPIOGP_SelectOrMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
{
        pGPIOGPINT[group].CTRL &= ~GPIOGR_COMB;
}
 
STATIC INLINE void Chip_GPIOGP_SelectAndMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
{
        pGPIOGPINT[group].CTRL |= GPIOGR_COMB;
}
 
STATIC INLINE void Chip_GPIOGP_SelectEdgeMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
{
        pGPIOGPINT[group].CTRL &= ~GPIOGR_TRIG;
}
 
STATIC INLINE void Chip_GPIOGP_SelectLevelMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
{
        pGPIOGPINT[group].CTRL |= GPIOGR_TRIG;
}
 
STATIC INLINE void Chip_GPIOGP_SelectLowLevel(LPC_GPIOGROUPINT_T *pGPIOGPINT,
                                                                                          uint8_t group,
                                                                                          uint8_t port,
                                                                                          uint32_t pinMask)
{
        pGPIOGPINT[group].PORT_POL[port] &= ~pinMask;
}
 
STATIC INLINE void Chip_GPIOGP_SelectHighLevel(LPC_GPIOGROUPINT_T *pGPIOGPINT,
                                                                                           uint8_t group,
                                                                                           uint8_t port,
                                                                                           uint32_t pinMask)
{
        pGPIOGPINT[group].PORT_POL[port] = pinMask;
}
 
STATIC INLINE void Chip_GPIOGP_DisableGroupPins(LPC_GPIOGROUPINT_T *pGPIOGPINT,
                                                                                                uint8_t group,
                                                                                                uint8_t port,
                                                                                                uint32_t pinMask)
{
        pGPIOGPINT[group].PORT_ENA[port] &= ~pinMask;
}
 
STATIC INLINE void Chip_GPIOGP_EnableGroupPins(LPC_GPIOGROUPINT_T *pGPIOGPINT,
                                                                                           uint8_t group,
                                                                                           uint8_t port,
                                                                                           uint32_t pinMask)
{
        pGPIOGPINT[group].PORT_ENA[port] = pinMask;
}
 
#endif /* defined(CHIP_LPC11AXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11UXX) */
 
#ifdef __cplusplus
}
#endif
 
#endif /* __GPIOGROUP_11XX_H_ */