cmsis_11cxx.h
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1 /*
2  * @brief Basic CMSIS include file for LPC11CXX
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2013
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __CMSIS_11CXX_H_
33 #define __CMSIS_11CXX_H_
34 
35 #include "lpc_types.h"
36 #include "sys_config.h"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
49 #if defined(__ARMCC_VERSION)
50 // Kill warning "#pragma push with no matching #pragma pop"
51  #pragma diag_suppress 2525
52  #pragma push
53  #pragma anon_unions
54 #elif defined(__CWCC__)
55  #pragma push
56  #pragma cpp_extensions on
57 #elif defined(__GNUC__)
58 /* anonymous unions are enabled by default */
59 #elif defined(__IAR_SYSTEMS_ICC__)
60 // #pragma push // FIXME not usable for IAR
61  #pragma language=extended
62 #else
63  #error Not supported compiler type
64 #endif
65 
66 /*
67  * ==========================================================================
68  * ---------- Interrupt Number Definition -----------------------------------
69  * ==========================================================================
70  */
71 
72 #if !defined(CHIP_LPC11CXX)
73 #error Incorrect or missing device variant (CHIP_LPC11AXX)
74 #endif
75 
80 typedef enum LPC11CXX_IRQn {
83  SVCall_IRQn = -5,
84  PendSV_IRQn = -2,
85  SysTick_IRQn = -1,
97  PIO0_10_IRQn = 10,
98  PIO0_11_IRQn = 11,
99  PIO1_0_IRQn = 12,
100  CAN_IRQn = 13,
101  SSP1_IRQn = 14,
102  I2C0_IRQn = 15,
107  SSP0_IRQn = 20,
108  UART0_IRQn = 21,
111  ADC_IRQn = 24,
112  WDT_IRQn = 25,
113  BOD_IRQn = 26,
115  EINT3_IRQn = 28,
116  EINT2_IRQn = 29,
117  EINT1_IRQn = 30,
118  EINT0_IRQn = 31,
120 
125 /*
126  * ==========================================================================
127  * ----------- Processor and Core Peripheral Section ------------------------
128  * ==========================================================================
129  */
130 
135 /* Configuration of the Cortex-M0 Processor and Core Peripherals */
136 #define __MPU_PRESENT 0
137 #define __NVIC_PRIO_BITS 2
138 #define __Vendor_SysTickConfig 0
148 #ifdef __cplusplus
149 }
150 #endif
151 
152 #endif /* __CMSIS_11CXX_H_ */
EINT2_IRQn
@ EINT2_IRQn
Definition: cmsis_11cxx.h:116
PIO0_6_IRQn
@ PIO0_6_IRQn
Definition: cmsis_11cxx.h:93
SVCall_IRQn
@ SVCall_IRQn
Definition: cmsis_11cxx.h:83
TIMER_32_1_IRQn
@ TIMER_32_1_IRQn
Definition: cmsis_11cxx.h:106
PIO0_1_IRQn
@ PIO0_1_IRQn
Definition: cmsis_11cxx.h:88
TIMER_16_0_IRQn
@ TIMER_16_0_IRQn
Definition: cmsis_11cxx.h:103
HardFault_IRQn
@ HardFault_IRQn
Definition: cmsis_11cxx.h:82
SSP0_IRQn
@ SSP0_IRQn
Definition: cmsis_11cxx.h:107
WDT_IRQn
@ WDT_IRQn
Definition: cmsis_11cxx.h:112
lpc_types.h
PendSV_IRQn
@ PendSV_IRQn
Definition: cmsis_11cxx.h:84
UART0_IRQn
@ UART0_IRQn
Definition: cmsis_11cxx.h:108
Reserved27_IRQn
@ Reserved27_IRQn
Definition: cmsis_11cxx.h:114
PIO0_8_IRQn
@ PIO0_8_IRQn
Definition: cmsis_11cxx.h:95
PIO1_0_IRQn
@ PIO1_0_IRQn
Definition: cmsis_11cxx.h:99
EINT3_IRQn
@ EINT3_IRQn
Definition: cmsis_11cxx.h:115
sys_config.h
TIMER_32_0_IRQn
@ TIMER_32_0_IRQn
Definition: cmsis_11cxx.h:105
PIO0_4_IRQn
@ PIO0_4_IRQn
Definition: cmsis_11cxx.h:91
PIO0_7_IRQn
@ PIO0_7_IRQn
Definition: cmsis_11cxx.h:94
PIO0_11_IRQn
@ PIO0_11_IRQn
Definition: cmsis_11cxx.h:98
PIO0_0_IRQn
@ PIO0_0_IRQn
Definition: cmsis_11cxx.h:87
ADC_IRQn
@ ADC_IRQn
Definition: cmsis_11cxx.h:111
LPC11CXX_IRQn_Type
enum LPC11CXX_IRQn LPC11CXX_IRQn_Type
CAN_IRQn
@ CAN_IRQn
Definition: cmsis_11cxx.h:100
EINT0_IRQn
@ EINT0_IRQn
Definition: cmsis_11cxx.h:118
PIO0_10_IRQn
@ PIO0_10_IRQn
Definition: cmsis_11cxx.h:97
PIO0_9_IRQn
@ PIO0_9_IRQn
Definition: cmsis_11cxx.h:96
SysTick_IRQn
@ SysTick_IRQn
Definition: cmsis_11cxx.h:85
EINT1_IRQn
@ EINT1_IRQn
Definition: cmsis_11cxx.h:117
BOD_IRQn
@ BOD_IRQn
Definition: cmsis_11cxx.h:113
PIO0_5_IRQn
@ PIO0_5_IRQn
Definition: cmsis_11cxx.h:92
PIO0_3_IRQn
@ PIO0_3_IRQn
Definition: cmsis_11cxx.h:90
PIO0_2_IRQn
@ PIO0_2_IRQn
Definition: cmsis_11cxx.h:89
TIMER_16_1_IRQn
@ TIMER_16_1_IRQn
Definition: cmsis_11cxx.h:104
NonMaskableInt_IRQn
@ NonMaskableInt_IRQn
Definition: cmsis_11cxx.h:81
Reserved22_IRQn
@ Reserved22_IRQn
Definition: cmsis_11cxx.h:109
SSP1_IRQn
@ SSP1_IRQn
Definition: cmsis_11cxx.h:101
I2C0_IRQn
@ I2C0_IRQn
Definition: cmsis_11cxx.h:102
Reserved23_IRQn
@ Reserved23_IRQn
Definition: cmsis_11cxx.h:110
LPC11CXX_IRQn
LPC11CXX_IRQn
Definition: cmsis_11cxx.h:80


uavcan_communicator
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autogenerated on Fri Dec 13 2024 03:10:02