wm8994_reg.h
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1 
21 /* Define to prevent recursive inclusion -------------------------------------*/
22 #ifndef WM8994_REG_H
23 #define WM8994_REG_H
24 
25 #include <cmsis_compiler.h>
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
31 /* Includes ------------------------------------------------------------------*/
48 /******************************************************************************/
49 /****************************** REGISTER MAPPING ******************************/
50 /******************************************************************************/
51 /* SW Reset */
52 #define WM8994_SW_RESET (uint16_t)0x0000
53 
54 /* Power Management */
55 #define WM8994_PWR_MANAGEMENT_1 (uint16_t)0x0001
56 #define WM8994_PWR_MANAGEMENT_2 (uint16_t)0x0002
57 #define WM8994_PWR_MANAGEMENT_3 (uint16_t)0x0003
58 #define WM8994_PWR_MANAGEMENT_4 (uint16_t)0x0004
59 #define WM8994_PWR_MANAGEMENT_5 (uint16_t)0x0005
60 #define WM8994_PWR_MANAGEMENT_6 (uint16_t)0x0006
61 
62 /* Input mixer */
63 #define WM8994_INPUT_MIXER_1 (uint16_t)0x0015
64 /* Input volume */
65 #define WM8994_LEFT_LINE_IN12_VOL (uint16_t)0x0018
66 #define WM8994_LEFT_LINE_IN34_VOL (uint16_t)0x0019
67 #define WM8994_RIGHT_LINE_IN12_VOL (uint16_t)0x001A
68 #define WM8994_RIGHT_LINE_IN34_VOL (uint16_t)0x001B
69 
70 /* L/R Output volumes */
71 #define WM8994_LEFT_OUTPUT_VOL (uint16_t)0x001C
72 #define WM8994_RIGHT_OUTPUT_VOL (uint16_t)0x001D
73 #define WM8994_LINE_OUTPUT_VOL (uint16_t)0x001E
74 #define WM8994_OUTPUT2_VOL (uint16_t)0x001F
75 
76 
77 /* L/R OPGA volumes */
78 #define WM8994_LEFT_OPGA_VOL (uint16_t)0x0020
79 #define WM8994_RIGHT_OPGA_VOL (uint16_t)0x0021
80 
81 /* SPKMIXL/R Attenuation */
82 #define WM8994_SPKMIXL_ATT (uint16_t)0x0022
83 #define WM8994_SPKMIXR_ATT (uint16_t)0x0023
84 #define WM8994_OUTPUT_MIXER (uint16_t)0x0024
85 #define WM8994_CLASS_D (uint16_t)0x0025
86 /* L/R Speakers volumes */
87 #define WM8994_SPK_LEFT_VOL (uint16_t)0x0026
88 #define WM8994_SPK_RIGHT_VOL (uint16_t)0x0027
89 
90 /* Input mixer */
91 #define WM8994_INPUT_MIXER_2 (uint16_t)0x0028
92 #define WM8994_INPUT_MIXER_3 (uint16_t)0x0029
93 #define WM8994_INPUT_MIXER_4 (uint16_t)0x002A
94 #define WM8994_INPUT_MIXER_5 (uint16_t)0x002B
95 #define WM8994_INPUT_MIXER_6 (uint16_t)0x002C
96 
97 /* Output mixer */
98 #define WM8994_OUTPUT_MIXER_1 (uint16_t)0x002D
99 #define WM8994_OUTPUT_MIXER_2 (uint16_t)0x002E
100 #define WM8994_OUTPUT_MIXER_3 (uint16_t)0x002F
101 #define WM8994_OUTPUT_MIXER_4 (uint16_t)0x0030
102 #define WM8994_OUTPUT_MIXER_5 (uint16_t)0x0031
103 #define WM8994_OUTPUT_MIXER_6 (uint16_t)0x0032
104 #define WM8994_OUTPUT2_MIXER (uint16_t)0x0033
105 #define WM8994_LINE_MIXER_1 (uint16_t)0x0034
106 #define WM8994_LINE_MIXER_2 (uint16_t)0x0035
107 #define WM8994_SPEAKER_MIXER (uint16_t)0x0036
108 #define WM8994_ADD_CONTROL (uint16_t)0x0037
109 /* Antipop */
110 #define WM8994_ANTIPOP1 (uint16_t)0x0038
111 #define WM8994_ANTIPOP2 (uint16_t)0x0039
112 #define WM8994_MICBIAS (uint16_t)0x003A
113 #define WM8994_LDO1 (uint16_t)0x003B
114 #define WM8994_LDO2 (uint16_t)0x003C
115 
116 /* Charge pump */
117 #define WM8994_CHARGE_PUMP1 (uint16_t)0x004C
118 #define WM8994_CHARGE_PUMP2 (uint16_t)0x004D
119 
120 #define WM8994_CLASS_W (uint16_t)0x0051
121 
122 #define WM8994_DC_SERVO1 (uint16_t)0x0054
123 #define WM8994_DC_SERVO2 (uint16_t)0x0055
124 #define WM8994_DC_SERVO_READBACK (uint16_t)0x0058
125 #define WM8994_DC_SERVO_WRITEVAL (uint16_t)0x0059
126 
127 /* Analog HP */
128 #define WM8994_ANALOG_HP (uint16_t)0x0060
129 
130 #define WM8994_CHIP_REVISION (uint16_t)0x0100
131 #define WM8994_CONTROL_INTERFACE (uint16_t)0x0101
132 #define WM8994_WRITE_SEQ_CTRL1 (uint16_t)0x0110
133 #define WM8994_WRITE_SEQ_CTRL2 (uint16_t)0x0111
134 
135 /* WM8994 clocking */
136 #define WM8994_AIF1_CLOCKING1 (uint16_t)0x0200
137 #define WM8994_AIF1_CLOCKING2 (uint16_t)0x0201
138 #define WM8994_AIF2_CLOCKING1 (uint16_t)0x0204
139 #define WM8994_AIF2_CLOCKING2 (uint16_t)0x0205
140 #define WM8994_CLOCKING1 (uint16_t)0x0208
141 #define WM8994_CLOCKING2 (uint16_t)0x0209
142 #define WM8994_AIF1_RATE (uint16_t)0x0210
143 #define WM8994_AIF2_RATE (uint16_t)0x0211
144 #define WM8994_RATE_STATUS (uint16_t)0x0212
145 
146 /* FLL1 Control */
147 #define WM8994_FLL1_CONTROL1 (uint16_t)0x0220
148 #define WM8994_FLL1_CONTROL2 (uint16_t)0x0221
149 #define WM8994_FLL1_CONTROL3 (uint16_t)0x0222
150 #define WM8994_FLL1_CONTROL4 (uint16_t)0x0223
151 #define WM8994_FLL1_CONTROL5 (uint16_t)0x0224
152 
153 /* FLL2 Control */
154 #define WM8994_FLL2_CONTROL1 (uint16_t)0x0240
155 #define WM8994_FLL2_CONTROL2 (uint16_t)0x0241
156 #define WM8994_FLL2_CONTROL3 (uint16_t)0x0242
157 #define WM8994_FLL2_CONTROL4 (uint16_t)0x0243
158 #define WM8994_FLL2_CONTROL5 (uint16_t)0x0244
159 
160 
161 /* AIF1 control */
162 #define WM8994_AIF1_CONTROL1 (uint16_t)0x0300
163 #define WM8994_AIF1_CONTROL2 (uint16_t)0x0301
164 #define WM8994_AIF1_MASTER_SLAVE (uint16_t)0x0302
165 #define WM8994_AIF1_BCLK (uint16_t)0x0303
166 #define WM8994_AIF1_ADC_LRCLK (uint16_t)0x0304
167 #define WM8994_AIF1_DAC_LRCLK (uint16_t)0x0305
168 #define WM8994_AIF1_DAC_DELTA (uint16_t)0x0306
169 #define WM8994_AIF1_ADC_DELTA (uint16_t)0x0307
170 
171 /* AIF2 control */
172 #define WM8994_AIF2_CONTROL1 (uint16_t)0x0310
173 #define WM8994_AIF2_CONTROL2 (uint16_t)0x0311
174 #define WM8994_AIF2_MASTER_SLAVE (uint16_t)0x0312
175 #define WM8994_AIF2_BCLK (uint16_t)0x0313
176 #define WM8994_AIF2_ADC_LRCLK (uint16_t)0x0314
177 #define WM8994_AIF2_DAC_LRCLK (uint16_t)0x0315
178 #define WM8994_AIF2_DAC_DELTA (uint16_t)0x0316
179 #define WM8994_AIF2_ADC_DELTA (uint16_t)0x0317
180 
181 /* AIF1 ADC/DAC LR volumes */
182 #define WM8994_AIF1_ADC1_LEFT_VOL (uint16_t)0x0400
183 #define WM8994_AIF1_ADC1_RIGHT_VOL (uint16_t)0x0401
184 #define WM8994_AIF1_DAC1_LEFT_VOL (uint16_t)0x0402
185 #define WM8994_AIF1_DAC1_RIGHT_VOL (uint16_t)0x0403
186 #define WM8994_AIF1_ADC2_LEFT_VOL (uint16_t)0x0404
187 #define WM8994_AIF1_ADC2_RIGHT_VOL (uint16_t)0x0405
188 #define WM8994_AIF1_DAC2_LEFT_VOL (uint16_t)0x0406
189 #define WM8994_AIF1_DAC2_RIGHT_VOL (uint16_t)0x0407
190 
191 /* AIF1 ADC/DAC filters */
192 #define WM8994_AIF1_ADC1_FILTERS (uint16_t)0x0410
193 #define WM8994_AIF1_ADC2_FILTERS (uint16_t)0x0411
194 #define WM8994_AIF1_DAC1_FILTER1 (uint16_t)0x0420
195 #define WM8994_AIF1_DAC1_FILTER2 (uint16_t)0x0421
196 #define WM8994_AIF1_DAC2_FILTER1 (uint16_t)0x0422
197 #define WM8994_AIF1_DAC2_FILTER2 (uint16_t)0x0423
198 
199 /* AIF1 DRC1 registers */
200 #define WM8994_AIF1_DRC1 (uint16_t)0x0440
201 #define WM8994_AIF1_DRC1_1 (uint16_t)0x0441
202 #define WM8994_AIF1_DRC1_2 (uint16_t)0x0442
203 #define WM8994_AIF1_DRC1_3 (uint16_t)0x0443
204 #define WM8994_AIF1_DRC1_4 (uint16_t)0x0444
205 /* AIF1 DRC2 registers */
206 #define WM8994_AIF1_DRC2 (uint16_t)0x0450
207 #define WM8994_AIF1_DRC2_1 (uint16_t)0x0451
208 #define WM8994_AIF1_DRC2_2 (uint16_t)0x0452
209 #define WM8994_AIF1_DRC2_3 (uint16_t)0x0453
210 #define WM8994_AIF1_DRC2_4 (uint16_t)0x0454
211 
212 /* AIF1 DAC1 EQ Gains Bands */
213 #define WM8994_AIF1_DAC1_EQG_1 (uint16_t)0x0480
214 #define WM8994_AIF1_DAC1_EQG_2 (uint16_t)0x0481
215 #define WM8994_AIF1_DAC1_EQG_1A (uint16_t)0x0482
216 #define WM8994_AIF1_DAC1_EQG_1B (uint16_t)0x0483
217 #define WM8994_AIF1_DAC1_EQG_1PG (uint16_t)0x0484
218 #define WM8994_AIF1_DAC1_EQG_2A (uint16_t)0x0485
219 #define WM8994_AIF1_DAC1_EQG_2B (uint16_t)0x0486
220 #define WM8994_AIF1_DAC1_EQG_2C (uint16_t)0x0487
221 #define WM8994_AIF1_DAC1_EQG_2PG (uint16_t)0x0488
222 #define WM8994_AIF1_DAC1_EQG_3A (uint16_t)0x0489
223 #define WM8994_AIF1_DAC1_EQG_3B (uint16_t)0x048A
224 #define WM8994_AIF1_DAC1_EQG_3C (uint16_t)0x048B
225 #define WM8994_AIF1_DAC1_EQG_3PG (uint16_t)0x048C
226 #define WM8994_AIF1_DAC1_EQG_4A (uint16_t)0x048D
227 #define WM8994_AIF1_DAC1_EQG_4B (uint16_t)0x048E
228 #define WM8994_AIF1_DAC1_EQG_4C (uint16_t)0x048F
229 #define WM8994_AIF1_DAC1_EQG_4PG (uint16_t)0x0490
230 #define WM8994_AIF1_DAC1_EQG_5A (uint16_t)0x0491
231 #define WM8994_AIF1_DAC1_EQG_5B (uint16_t)0x0492
232 #define WM8994_AIF1_DAC1_EQG_5PG (uint16_t)0x0493
233 
234 /* AIF1 DAC2 EQ Gains/bands */
235 #define WM8994_AIF1_DAC2_EQG_1 (uint16_t)0x04A0
236 #define WM8994_AIF1_DAC2_EQG_2 (uint16_t)0x04A1
237 #define WM8994_AIF1_DAC2_EQG_1A (uint16_t)0x04A2
238 #define WM8994_AIF1_DAC2_EQG_1B (uint16_t)0x04A3
239 #define WM8994_AIF1_DAC2_EQG_1PG (uint16_t)0x04A4
240 #define WM8994_AIF1_DAC2_EQG_2A (uint16_t)0x04A5
241 #define WM8994_AIF1_DAC2_EQG_2B (uint16_t)0x04A6
242 #define WM8994_AIF1_DAC2_EQG_2C (uint16_t)0x04A7
243 #define WM8994_AIF1_DAC2_EQG_2PG (uint16_t)0x04A8
244 #define WM8994_AIF1_DAC2_EQG_3A (uint16_t)0x04A9
245 #define WM8994_AIF1_DAC2_EQG_3B (uint16_t)0x04AA
246 #define WM8994_AIF1_DAC2_EQG_3C (uint16_t)0x04AB
247 #define WM8994_AIF1_DAC2_EQG_3PG (uint16_t)0x04AC
248 #define WM8994_AIF1_DAC2_EQG_4A (uint16_t)0x04AD
249 #define WM8994_AIF1_DAC2_EQG_4B (uint16_t)0x04AE
250 #define WM8994_AIF1_DAC2_EQG_4C (uint16_t)0x04AF
251 #define WM8994_AIF1_DAC2_EQG_4PG (uint16_t)0x04B0
252 #define WM8994_AIF1_DAC2_EQG_5A (uint16_t)0x04B1
253 #define WM8994_AIF1_DAC2_EQG_5B (uint16_t)0x04B2
254 #define WM8994_AIF1_DAC2_EQG_5PG (uint16_t)0x04B3
255 
256 /* AIF2 ADC/DAC LR volumes */
257 #define WM8994_AIF2_ADC_LEFT_VOL (uint16_t)0x0500
258 #define WM8994_AIF2_ADC_RIGHT_VOL (uint16_t)0x0501
259 #define WM8994_AIF2_DAC_LEFT_VOL (uint16_t)0x0502
260 #define WM8994_AIF2_DAC_RIGHT_VOL (uint16_t)0x0503
261 
262 /* AIF2 ADC/DAC filters */
263 #define WM8994_AIF2_ADC_FILTERS (uint16_t)0x0510
264 #define WM8994_AIF2_DAC_FILTER_1 (uint16_t)0x0520
265 #define WM8994_AIF2_DAC_FILTER_2 (uint16_t)0x0521
266 
267 /* AIF2 DRC registers */
268 #define WM8994_AIF2_DRC_1 (uint16_t)0x0540
269 #define WM8994_AIF2_DRC_2 (uint16_t)0x0541
270 #define WM8994_AIF2_DRC_3 (uint16_t)0x0542
271 #define WM8994_AIF2_DRC_4 (uint16_t)0x0543
272 #define WM8994_AIF2_DRC_5 (uint16_t)0x0544
273 
274 /* AIF2 EQ Gains/bands */
275 #define WM8994_AIF2_EQG_1 (uint16_t)0x0580
276 #define WM8994_AIF2_EQG_2 (uint16_t)0x0581
277 #define WM8994_AIF2_EQG_1A (uint16_t)0x0582
278 #define WM8994_AIF2_EQG_1B (uint16_t)0x0583
279 #define WM8994_AIF2_EQG_1PG (uint16_t)0x0584
280 #define WM8994_AIF2_EQG_2A (uint16_t)0x0585
281 #define WM8994_AIF2_EQG_2B (uint16_t)0x0586
282 #define WM8994_AIF2_EQG_2C (uint16_t)0x0587
283 #define WM8994_AIF2_EQG_2PG (uint16_t)0x0588
284 #define WM8994_AIF2_EQG_3A (uint16_t)0x0589
285 #define WM8994_AIF2_EQG_3B (uint16_t)0x058A
286 #define WM8994_AIF2_EQG_3C (uint16_t)0x058B
287 #define WM8994_AIF2_EQG_3PG (uint16_t)0x058C
288 #define WM8994_AIF2_EQG_4A (uint16_t)0x058D
289 #define WM8994_AIF2_EQG_4B (uint16_t)0x058E
290 #define WM8994_AIF2_EQG_4C (uint16_t)0x058F
291 #define WM8994_AIF2_EQG_4PG (uint16_t)0x0590
292 #define WM8994_AIF2_EQG_5A (uint16_t)0x0591
293 #define WM8994_AIF2_EQG_5B (uint16_t)0x0592
294 #define WM8994_AIF2_EQG_5PG (uint16_t)0x0593
295 
296 /* AIF1 DAC1 Mixer volume */
297 #define WM8994_DAC1_MIXER_VOL (uint16_t)0x0600
298 /* AIF1 DAC1 Left Mixer Routing */
299 #define WM8994_AIF1_DAC1_LMR (uint16_t)0x0601
300 /* AIF1 DAC1 Righ Mixer Routing */
301 #define WM8994_AIF1_DAC1_RMR (uint16_t)0x0602
302 /* AIF1 DAC2 Mixer volume */
303 #define WM8994_DAC2_MIXER_VOL (uint16_t)0x0603
304 /* AIF1 DAC2 Left Mixer Routing */
305 #define WM8994_AIF1_DAC2_LMR (uint16_t)0x0604
306 /* AIF1 DAC2 Righ Mixer Routing */
307 #define WM8994_AIF1_DAC2_RMR (uint16_t)0x0605
308 /* AIF1 ADC1 Left Mixer Routing */
309 #define WM8994_AIF1_ADC1_LMR (uint16_t)0x0606
310 /* AIF1 ADC1 Righ Mixer Routing */
311 #define WM8994_AIF1_ADC1_RMR (uint16_t)0x0607
312 /* AIF1 ADC2 Left Mixer Routing */
313 #define WM8994_AIF1_ADC2_LMR (uint16_t)0x0608
314 /* AIF1 ADC2 Righ Mixer Routing */
315 #define WM8994_AIF1_ADC2_RMR (uint16_t)0x0609
316 
317 /* Volume control */
318 #define WM8994_DAC1_LEFT_VOL (uint16_t)0x0610
319 #define WM8994_DAC1_RIGHT_VOL (uint16_t)0x0611
320 #define WM8994_DAC2_LEFT_VOL (uint16_t)0x0612
321 #define WM8994_DAC2_RIGHT_VOL (uint16_t)0x0613
322 #define WM8994_DAC_SOFTMUTE (uint16_t)0x0614
323 
324 #define WM8994_OVERSAMPLING (uint16_t)0x0620
325 #define WM8994_SIDETONE (uint16_t)0x0621
326 
327 /* GPIO */
328 #define WM8994_GPIO1 (uint16_t)0x0700
329 #define WM8994_GPIO2 (uint16_t)0x0701
330 #define WM8994_GPIO3 (uint16_t)0x0702
331 #define WM8994_GPIO4 (uint16_t)0x0703
332 #define WM8994_GPIO5 (uint16_t)0x0704
333 #define WM8994_GPIO6 (uint16_t)0x0705
334 #define WM8994_GPIO7 (uint16_t)0x0706
335 #define WM8994_GPIO8 (uint16_t)0x0707
336 #define WM8994_GPIO9 (uint16_t)0x0708
337 #define WM8994_GPIO10 (uint16_t)0x0709
338 #define WM8994_GPIO11 (uint16_t)0x070A
339 /* Pull Contol */
340 #define WM8994_PULL_CONTROL_1 (uint16_t)0x0720
341 #define WM8994_PULL_CONTROL_2 (uint16_t)0x0721
342 /* WM8994 Inturrupts */
343 #define WM8994_INT_STATUS_1 (uint16_t)0x0730
344 #define WM8994_INT_STATUS_2 (uint16_t)0x0731
345 #define WM8994_INT_RAW_STATUS_2 (uint16_t)0x0732
346 #define WM8994_INT_STATUS1_MASK (uint16_t)0x0738
347 #define WM8994_INT_STATUS2_MASK (uint16_t)0x0739
348 #define WM8994_INT_CONTROL (uint16_t)0x0740
349 #define WM8994_IRQ_DEBOUNCE (uint16_t)0x0748
350 
351 /* Write Sequencer registers from 0 to 511 */
352 #define WM8994_WRITE_SEQUENCER0 (uint16_t)0x3000
353 #define WM8994_WRITE_SEQUENCER1 (uint16_t)0x3001
354 #define WM8994_WRITE_SEQUENCER2 (uint16_t)0x3002
355 #define WM8994_WRITE_SEQUENCER3 (uint16_t)0x3003
356 
357 #define WM8994_WRITE_SEQUENCER4 (uint16_t)0x3508
358 #define WM8994_WRITE_SEQUENCER5 (uint16_t)0x3509
359 #define WM8994_WRITE_SEQUENCER6 (uint16_t)0x3510
360 #define WM8994_WRITE_SEQUENCER7 (uint16_t)0x3511
361 
366 /************** Generic Function *******************/
367 
368 typedef int32_t (*WM8994_Write_Func)(void *, uint16_t, uint8_t*, uint16_t);
369 typedef int32_t (*WM8994_Read_Func) (void *, uint16_t, uint8_t*, uint16_t);
370 
371 typedef struct
372 {
373  WM8994_Write_Func WriteReg;
374  WM8994_Read_Func ReadReg;
375  void *handle;
376 } wm8994_ctx_t;
377 
378 /*******************************************************************************
379 * Register : Generic - All
380 * Address : Generic - All
381 * Bit Group Name: None
382 * Permission : W
383 *******************************************************************************/
384 int32_t wm8994_write_reg(wm8994_ctx_t *ctx, uint16_t reg, uint16_t *data, uint16_t length);
385 int32_t wm8994_read_reg(wm8994_ctx_t *ctx, uint16_t reg, uint16_t* data, uint16_t length);
386 
387 int32_t wm8994_register_set(wm8994_ctx_t *ctx, uint16_t reg, uint16_t value);
388 /**************** Base Function *******************/
389 /*******************************************************************************
390 * Register : WM8994_SW_RESET
391 * Address : 0X00
392 * Bit Group Name: SW_RESET[15:0]
393 * Permission : RW
394 *******************************************************************************/
395 #define WM8994_SW_RESET_MASK (uint16_t)0xFFFF
396 #define WM8994_SW_RESET_POSITION 0
397 int32_t wm8994_sw_reset_w(wm8994_ctx_t *ctx, uint16_t value);
398 int32_t wm8994_sw_reset_r(wm8994_ctx_t *ctx, uint16_t *value);
399 
400 /*******************************************************************************
401 * Register : WM8994_PWR_MANAGEMENT_1
402 * Address : 0X01
403 * Bit Group Name: BIAS_EN
404 * Permission : RW
405 *******************************************************************************/
406 #define WM8994_PWR_MGMT_1_BIAS_EN_MASK (uint16_t)0x0001U
407 #define WM8994_PWR_MGMT_1_BIAS_EN_POSITION 0
408 int32_t wm8994_pwr_mgmt_1_bias_en(wm8994_ctx_t *ctx, uint16_t value);
409 
410 /*******************************************************************************
411 * Register : WM8994_PWR_MANAGEMENT_1
412 * Address : 0X01
413 * Bit Group Name: VMID_SEL [1:0]
414 * Permission : RW
415 *******************************************************************************/
416 #define WM8994_PWR_MGMT_1_VMID_SEL_MASK (uint16_t)0x0006U
417 #define WM8994_PWR_MGMT_1_VMID_SEL_POSITION 1
418 int32_t wm8994_pwr_mgmt_1_vmid_sel(wm8994_ctx_t *ctx, uint16_t value);
419 
420 /*******************************************************************************
421 * Register : WM8994_PWR_MANAGEMENT_1
422 * Address : 0X01
423 * Bit Group Name: MICB1_ENA
424 * Permission : RW
425 *******************************************************************************/
426 #define WM8994_PWR_MGMT_1_MICB1_ENA_MASK (uint16_t)0x0010U
427 #define WM8994_PWR_MGMT_1_MICB1_ENA_POSITION 4
428 int32_t wm8994_pwr_mgmt_1_micb1_ena(wm8994_ctx_t *ctx, uint16_t value);
429 
430 /*******************************************************************************
431 * Register : WM8994_PWR_MANAGEMENT_1
432 * Address : 0X01
433 * Bit Group Name: MICB2_ENA
434 * Permission : RW
435 *******************************************************************************/
436 #define WM8994_PWR_MGMT_1_MICB2_ENA_MASK (uint16_t)0x0020U
437 #define WM8994_PWR_MGMT_1_MICB2_ENA_POSITION 5
438 int32_t wm8994_pwr_mgmt_1_micb2_ena(wm8994_ctx_t *ctx, uint16_t value);
439 
440 /*******************************************************************************
441 * Register : WM8994_PWR_MANAGEMENT_1
442 * Address : 0X01
443 * Bit Group Name: HPOUT1R_ENA
444 * Permission : RW
445 *******************************************************************************/
446 #define WM8994_PWR_MGMT_1_HPOUT1R_ENA_MASK (uint16_t)0x0100U
447 #define WM8994_PWR_MGMT_1_HPOUT1R_ENA_POSITION 8
448 int32_t wm8994_pwr_mgmt_1_hpout1r_ena(wm8994_ctx_t *ctx, uint16_t value);
449 
450 /*******************************************************************************
451 * Register : WM8994_PWR_MANAGEMENT_1
452 * Address : 0X01
453 * Bit Group Name: HPOUT1L_ENA
454 * Permission : RW
455 *******************************************************************************/
456 #define WM8994_PWR_MGMT_1_HPOUT1L_ENA_MASK (uint16_t)0x0200U
457 #define WM8994_PWR_MGMT_1_HPOUT1L_ENA_POSITION 9
458 int32_t wm8994_pwr_mgmt_1_hpout1l_ena(wm8994_ctx_t *ctx, uint16_t value);
459 
460 /*******************************************************************************
461 * Register : WM8994_PWR_MANAGEMENT_1
462 * Address : 0X01
463 * Bit Group Name: HPOUT2_ENA
464 * Permission : RW
465 *******************************************************************************/
466 #define WM8994_PWR_MGMT_1_HPOUT2_ENA_MASK (uint16_t)0x0800U
467 #define WM8994_PWR_MGMT_1_HPOUT2_ENA_POSITION 11
468 int32_t wm8994_pwr_mgmt_1_hpout2_ena(wm8994_ctx_t *ctx, uint16_t value);
469 
470 /*******************************************************************************
471 * Register : WM8994_PWR_MANAGEMENT_1
472 * Address : 0X01
473 * Bit Group Name: SPKOUTL_ENA
474 * Permission : RW
475 *******************************************************************************/
476 #define WM8994_PWR_MGMT_1_SPKOUTL_ENA_MASK (uint16_t)0x1000U
477 #define WM8994_PWR_MGMT_1_SPKOUTL_ENA_POSITION 12
478 int32_t wm8994_pwr_mgmt_1_spkoutl_ena(wm8994_ctx_t *ctx, uint16_t value);
479 
480 /*******************************************************************************
481 * Register : WM8994_PWR_MANAGEMENT_1
482 * Address : 0X01
483 * Bit Group Name: SPKOUTR_ENA
484 * Permission : RW
485 *******************************************************************************/
486 #define WM8994_PWR_MGMT_1_SPKOUTR_ENA_MASK (uint16_t)0x2000U
487 #define WM8994_PWR_MGMT_1_SPKOUTR_ENA_POSITION 13
488 int32_t wm8994_pwr_mgmt_1_spkoutr_ena(wm8994_ctx_t *ctx, uint16_t value);
489 
490 /*******************************************************************************
491 * Register : WM8994_PWR_MANAGEMENT_2
492 * Address : 0X02
493 * Bit Group Name: IN1R_ENA
494 * Permission : RW
495 *******************************************************************************/
496 #define WM8994_PWR_MGMT_2_IN1R_ENA_MASK (uint16_t)0x0010U
497 #define WM8994_PWR_MGMT_2_IN1R_ENA_POSITION 4
498 int32_t wm8994_pwr_mgmt_2_in1r_ena(wm8994_ctx_t *ctx, uint16_t value);
499 
500 /*******************************************************************************
501 * Register : WM8994_PWR_MANAGEMENT_2
502 * Address : 0X02
503 * Bit Group Name: IN2R_ENA
504 * Permission : RW
505 *******************************************************************************/
506 #define WM8994_PWR_MGMT_2_IN2R_ENA_MASK (uint16_t)0x0020U
507 #define WM8994_PWR_MGMT_2_IN2R_ENA_POSITION 5
508 int32_t wm8994_pwr_mgmt_2_in2r_ena(wm8994_ctx_t *ctx, uint16_t value);
509 
510 /*******************************************************************************
511 * Register : WM8994_PWR_MANAGEMENT_2
512 * Address : 0X02
513 * Bit Group Name: IN1L_ENA
514 * Permission : RW
515 *******************************************************************************/
516 #define WM8994_PWR_MGMT_2_IN1L_ENA_MASK (uint16_t)0x0040U
517 #define WM8994_PWR_MGMT_2_IN1L_ENA_POSITION 6
518 int32_t wm8994_pwr_mgmt_2_in1l_ena(wm8994_ctx_t *ctx, uint16_t value);
519 
520 /*******************************************************************************
521 * Register : WM8994_PWR_MANAGEMENT_2
522 * Address : 0X02
523 * Bit Group Name: IN2L_ENA
524 * Permission : RW
525 *******************************************************************************/
526 #define WM8994_PWR_MGMT_2_IN2L_ENA_MASK (uint16_t)0x0080U
527 #define WM8994_PWR_MGMT_2_IN2L_ENA_POSITION 7
528 int32_t wm8994_pwr_mgmt_2_in2l_ena(wm8994_ctx_t *ctx, uint16_t value);
529 
530 /*******************************************************************************
531 * Register : WM8994_PWR_MANAGEMENT_2
532 * Address : 0X02
533 * Bit Group Name: MIXINR_ENA
534 * Permission : RW
535 *******************************************************************************/
536 #define WM8994_PWR_MGMT_2_MIXINR_ENA_MASK (uint16_t)0x0100U
537 #define WM8994_PWR_MGMT_2_MIXINR_ENA_POSITION 8
538 int32_t wm8994_pwr_mgmt_2_mixinr_ena(wm8994_ctx_t *ctx, uint16_t value);
539 
540 /*******************************************************************************
541 * Register : WM8994_PWR_MANAGEMENT_2
542 * Address : 0X02
543 * Bit Group Name: MIXINL_ENA
544 * Permission : RW
545 *******************************************************************************/
546 #define WM8994_PWR_MGMT_2_MIXINL_ENA_MASK (uint16_t)0x0200U
547 #define WM8994_PWR_MGMT_2_MIXINL_ENA_POSITION 9
548 int32_t wm8994_pwr_mgmt_2_mixinl_ena(wm8994_ctx_t *ctx, uint16_t value);
549 
550 /*******************************************************************************
551 * Register : WM8994_PWR_MANAGEMENT_2
552 * Address : 0X02
553 * Bit Group Name: OPCLK_ENA
554 * Permission : RW
555 *******************************************************************************/
556 #define WM8994_PWR_MGMT_2_OPCLK_ENA_MASK (uint16_t)0x0800U
557 #define WM8994_PWR_MGMT_2_OPCLK_ENA_POSITION 11
558 int32_t wm8994_pwr_mgmt_2_opclk_ena(wm8994_ctx_t *ctx, uint16_t value);
559 
560 /*******************************************************************************
561 * Register : WM8994_PWR_MANAGEMENT_2
562 * Address : 0X02
563 * Bit Group Name: TSHUT_OPDIS
564 * Permission : RW
565 *******************************************************************************/
566 #define WM8994_PWR_MGMT_2_TSHUT_OPDIS_MASK (uint16_t)0x2000U
567 #define WM8994_PWR_MGMT_2_TSHUT_OPDIS_POSITION 13
568 int32_t wm8994_pwr_mgmt_2_tshut_opdis(wm8994_ctx_t *ctx, uint16_t value);
569 
570 /*******************************************************************************
571 * Register : WM8994_PWR_MANAGEMENT_2
572 * Address : 0X02
573 * Bit Group Name: TSHUT_ENA
574 * Permission : RW
575 *******************************************************************************/
576 #define WM8994_PWR_MGMT_2_TSHUT_ENA_MASK (uint16_t)0x4000U
577 #define WM8994_PWR_MGMT_2_TSHUT_ENA_POSITION 14
578 int32_t wm8994_pwr_mgmt_2_tshut_ena(wm8994_ctx_t *ctx, uint16_t value);
579 
580 /*******************************************************************************
581 * Register : WM8994_PWR_MANAGEMENT_3
582 * Address : 0X03
583 * Bit Group Name: MIXOUTR_ENA
584 * Permission : RW
585 *******************************************************************************/
586 #define WM8994_PWR_MGMT_3_MIXOUTR_ENA_MASK (uint16_t)0x0010U
587 #define WM8994_PWR_MGMT_3_MIXOUTR_ENA_POSITION 4
588 int32_t wm8994_pwr_mgmt_3_mixoutr_ena(wm8994_ctx_t *ctx, uint16_t value);
589 
590 /*******************************************************************************
591 * Register : WM8994_PWR_MANAGEMENT_3
592 * Address : 0X03
593 * Bit Group Name: MIXOUTL_ENA
594 * Permission : RW
595 *******************************************************************************/
596 #define WM8994_PWR_MGMT_3_MIXOUTL_ENA_MASK (uint16_t)0x0020U
597 #define WM8994_PWR_MGMT_3_MIXOUTL_ENA_POSITION 5
598 int32_t wm8994_pwr_mgmt_3_mixoutl_ena(wm8994_ctx_t *ctx, uint16_t value);
599 
600 /*******************************************************************************
601 * Register : WM8994_PWR_MANAGEMENT_3
602 * Address : 0X03
603 * Bit Group Name: MIXOUTRVOL_ENA
604 * Permission : RW
605 *******************************************************************************/
606 #define WM8994_PWR_MGMT_3_MIXOUTRVOL_ENA_MASK (uint16_t)0x0040U
607 #define WM8994_PWR_MGMT_3_MIXOUTRVOL_ENA_POSITION 6
608 int32_t wm8994_pwr_mgmt_3_mixoutrvol_ena(wm8994_ctx_t *ctx, uint16_t value);
609 
610 /*******************************************************************************
611 * Register : WM8994_PWR_MANAGEMENT_3
612 * Address : 0X03
613 * Bit Group Name: MIXOUTLVOL_ENA
614 * Permission : RW
615 *******************************************************************************/
616 #define WM8994_PWR_MGMT_3_MIXOUTLVOL_ENA_MASK (uint16_t)0x0080U
617 #define WM8994_PWR_MGMT_3_MIXOUTLVOL_ENA_POSITION 7
618 int32_t wm8994_pwr_mgmt_3_mixoutlvol_ena(wm8994_ctx_t *ctx, uint16_t value);
619 
620 /*******************************************************************************
621 * Register : WM8994_PWR_MANAGEMENT_3
622 * Address : 0X03
623 * Bit Group Name: SPKLVOL_ENA
624 * Permission : RW
625 *******************************************************************************/
626 #define WM8994_PWR_MGMT_3_SPKLVOL_ENA_MASK (uint16_t)0x0100U
627 #define WM8994_PWR_MGMT_3_SPKLVOL_ENA_POSITION 8
628 int32_t wm8994_pwr_mgmt_3_spklvol_ena(wm8994_ctx_t *ctx, uint16_t value);
629 
630 /*******************************************************************************
631 * Register : WM8994_PWR_MANAGEMENT_3
632 * Address : 0X03
633 * Bit Group Name: SPKRVOL_ENA
634 * Permission : RW
635 *******************************************************************************/
636 #define WM8994_PWR_MGMT_3_SPKRVOL_ENA_MASK (uint16_t)0x0200U
637 #define WM8994_PWR_MGMT_3_SPKRVOL_ENA_POSITION 9
638 int32_t wm8994_pwr_mgmt_3_spkrvol_ena(wm8994_ctx_t *ctx, uint16_t value);
639 
640 /*******************************************************************************
641 * Register : WM8994_PWR_MANAGEMENT_3
642 * Address : 0X03
643 * Bit Group Name: LINEOUT2P_ENA
644 * Permission : RW
645 *******************************************************************************/
646 #define WM8994_PWR_MGMT_3_LINEOUT2P_ENA_MASK (uint16_t)0x0400U
647 #define WM8994_PWR_MGMT_3_LINEOUT2P_ENA_POSITION 10
648 int32_t wm8994_pwr_mgmt_3_lineout2p_ena(wm8994_ctx_t *ctx, uint16_t value);
649 
650 /*******************************************************************************
651 * Register : WM8994_PWR_MANAGEMENT_3
652 * Address : 0X03
653 * Bit Group Name: LINEOUT2N_ENA
654 * Permission : RW
655 *******************************************************************************/
656 #define WM8994_PWR_MGMT_3_LINEOUT2N_ENA_MASK (uint16_t)0x0800U
657 #define WM8994_PWR_MGMT_3_LINEOUT2N_ENA_POSITION 11
658 int32_t wm8994_pwr_mgmt_3_lineout2n_ena(wm8994_ctx_t *ctx, uint16_t value);
659 
660 /*******************************************************************************
661 * Register : WM8994_PWR_MANAGEMENT_3
662 * Address : 0X03
663 * Bit Group Name: LINEOUT1P_ENA
664 * Permission : RW
665 *******************************************************************************/
666 #define WM8994_PWR_MGMT_3_LINEOUT1P_ENA_MASK (uint16_t)0x1000U
667 #define WM8994_PWR_MGMT_3_LINEOUT1P_ENA_POSITION 12
668 int32_t wm8994_pwr_mgmt_3_lineout1p_ena(wm8994_ctx_t *ctx, uint16_t value);
669 
670 /*******************************************************************************
671 * Register : WM8994_PWR_MANAGEMENT_3
672 * Address : 0X03
673 * Bit Group Name: LINEOUT1N_ENA
674 * Permission : RW
675 *******************************************************************************/
676 #define WM8994_PWR_MGMT_3_LINEOUT1N_ENA_MASK (uint16_t)0x2000U
677 #define WM8994_PWR_MGMT_3_LINEOUT1N_ENA_POSITION 13
678 int32_t wm8994_pwr_mgmt_3_lineout1n_ena(wm8994_ctx_t *ctx, uint16_t value);
679 
680 /*******************************************************************************
681 * Register : WM8994_PWR_MANAGEMENT_4
682 * Address : 0X04
683 * Bit Group Name: ADCR_ENA
684 * Permission : RW
685 *******************************************************************************/
686 #define WM8994_PWR_MGMT_4_ADCR_ENA_MASK (uint16_t)0x0001U
687 #define WM8994_PWR_MGMT_4_ADCR_ENA_POSITION 0
688 int32_t wm8994_pwr_mgmt_4_adcr_ena(wm8994_ctx_t *ctx, uint16_t value);
689 
690 /*******************************************************************************
691 * Register : WM8994_PWR_MANAGEMENT_4
692 * Address : 0X04
693 * Bit Group Name: ADCL_ENA
694 * Permission : RW
695 *******************************************************************************/
696 #define WM8994_PWR_MGMT_4_ADCL_ENA_MASK (uint16_t)0x0002U
697 #define WM8994_PWR_MGMT_4_ADCL_ENA_POSITION 1
698 int32_t wm8994_pwr_mgmt_4_adcl_ena(wm8994_ctx_t *ctx, uint16_t value);
699 
700 /*******************************************************************************
701 * Register : WM8994_PWR_MANAGEMENT_4
702 * Address : 0X04
703 * Bit Group Name: DMIC1R_ENA
704 * Permission : RWZ
705 *******************************************************************************/
706 #define WM8994_PWR_MGMT_4_DMIC1R_ENA_MASK (uint16_t)0x0004U
707 #define WM8994_PWR_MGMT_4_DMIC1R_ENA_POSITION 2
708 int32_t wm8994_pwr_mgmt_4_dmic1r_ena(wm8994_ctx_t *ctx, uint16_t value);
709 
710 /*******************************************************************************
711 * Register : WM8994_PWR_MANAGEMENT_4
712 * Address : 0X04
713 * Bit Group Name: DMIC1L_ENA
714 * Permission : RW
715 *******************************************************************************/
716 #define WM8994_PWR_MGMT_4_DMIC1L_ENA_MASK (uint16_t)0x0008U
717 #define WM8994_PWR_MGMT_4_DMIC1L_ENA_POSITION 3
718 int32_t wm8994_pwr_mgmt_4_dmic1l_ena(wm8994_ctx_t *ctx, uint16_t value);
719 
720 /*******************************************************************************
721 * Register : WM8994_PWR_MANAGEMENT_4
722 * Address : 0X04
723 * Bit Group Name: DMIC2R_ENA
724 * Permission : RW
725 *******************************************************************************/
726 #define WM8994_PWR_MGMT_4_DMIC2R_ENA_MASK (uint16_t)0x0010U
727 #define WM8994_PWR_MGMT_4_DMIC2R_ENA_POSITION 4
728 int32_t wm8994_pwr_mgmt_4_dmic2r_ena(wm8994_ctx_t *ctx, uint16_t value);
729 
730 /*******************************************************************************
731 * Register : WM8994_PWR_MANAGEMENT_4
732 * Address : 0X04
733 * Bit Group Name: DMIC2L_ENA
734 * Permission : RW
735 *******************************************************************************/
736 #define WM8994_PWR_MGMT_4_DMIC2L_ENA_MASK (uint16_t)0x0020U
737 #define WM8994_PWR_MGMT_4_DMIC2L_ENA_POSITION 5
738 int32_t wm8994_pwr_mgmt_4_dmic2l_ena(wm8994_ctx_t *ctx, uint16_t value);
739 
740 /*******************************************************************************
741 * Register : WM8994_PWR_MANAGEMENT_4
742 * Address : 0X04
743 * Bit Group Name: AIF1ADC1R_ENA
744 * Permission : RW
745 *******************************************************************************/
746 #define WM8994_PWR_MGMT_4_AIF1ADC1R_ENA_MASK (uint16_t)0x0100U
747 #define WM8994_PWR_MGMT_4_AIF1ADC1R_ENA_POSITION 8
748 int32_t wm8994_pwr_mgmt_4_aif1adc1r_ena(wm8994_ctx_t *ctx, uint16_t value);
749 
750 /*******************************************************************************
751 * Register : WM8994_PWR_MANAGEMENT_4
752 * Address : 0X04
753 * Bit Group Name: AIF1ADC1L_ENA
754 * Permission : RW
755 *******************************************************************************/
756 #define WM8994_PWR_MGMT_4_AIF1ADC1L_ENA_MASK (uint16_t)0x0200U
757 #define WM8994_PWR_MGMT_4_AIF1ADC1L_ENA_POSITION 9
758 int32_t wm8994_pwr_mgmt_4_aif1adc1l_ena(wm8994_ctx_t *ctx, uint16_t value);
759 
760 /*******************************************************************************
761 * Register : WM8994_PWR_MANAGEMENT_4
762 * Address : 0X04
763 * Bit Group Name: AIF1ADC2R_ENA
764 * Permission : RW
765 *******************************************************************************/
766 #define WM8994_PWR_MGMT_4_AIF1ADC2R_ENA_MASK (uint16_t)0x0400U
767 #define WM8994_PWR_MGMT_4_AIF1ADC2R_ENA_POSITION 10
768 int32_t wm8994_pwr_mgmt_4_aif1adc2r_ena(wm8994_ctx_t *ctx, uint16_t value);
769 
770 /*******************************************************************************
771 * Register : WM8994_PWR_MANAGEMENT_4
772 * Address : 0X04
773 * Bit Group Name: AIF1ADC2L_ENA
774 * Permission : RW
775 *******************************************************************************/
776 #define WM8994_PWR_MGMT_4_AIF1ADC2L_ENA_MASK (uint16_t)0x0800U
777 #define WM8994_PWR_MGMT_4_AIF1ADC2L_ENA_POSITION 11
778 int32_t wm8994_pwr_mgmt_4_aif1adc2l_ena(wm8994_ctx_t *ctx, uint16_t value);
779 
780 /*******************************************************************************
781 * Register : WM8994_PWR_MANAGEMENT_4
782 * Address : 0X04
783 * Bit Group Name: AIF2ADCR_ENA
784 * Permission : RW
785 *******************************************************************************/
786 #define WM8994_PWR_MGMT_4_AIF2ADCR_ENA_MASK (uint16_t)0x1000U
787 #define WM8994_PWR_MGMT_4_AIF2ADCR_ENA_POSITION 12
788 int32_t wm8994_pwr_mgmt_4_aif2adcr_ena(wm8994_ctx_t *ctx, uint16_t value);
789 
790 /*******************************************************************************
791 * Register : WM8994_PWR_MANAGEMENT_4
792 * Address : 0X04
793 * Bit Group Name: AIF2ADCL_ENA
794 * Permission : RW
795 *******************************************************************************/
796 #define WM8994_PWR_MGMT_4_AIF2ADCL_ENA_MASK (uint16_t)0x2000U
797 #define WM8994_PWR_MGMT_4_AIF2ADCL_ENA_POSITION 13
798 int32_t wm8994_pwr_mgmt_4_aif2adcl_ena(wm8994_ctx_t *ctx, uint16_t value);
799 
800 /*******************************************************************************
801 * Register : WM8994_PWR_MANAGEMENT_5
802 * Address : 0X05
803 * Bit Group Name: DAC1R_ENA
804 * Permission : RW
805 *******************************************************************************/
806 #define WM8994_PWR_MGMT_5_DAC1R_ENA_MASK (uint16_t)0x0001U
807 #define WM8994_PWR_MGMT_5_DAC1R_ENA_POSITION 0
808 int32_t wm8994_pwr_mgmt_5_dac1r_ena(wm8994_ctx_t *ctx, uint16_t value);
809 
810 /*******************************************************************************
811 * Register : WM8994_PWR_MANAGEMENT_5
812 * Address : 0X05
813 * Bit Group Name: DAC1L_ENA
814 * Permission : RW
815 *******************************************************************************/
816 #define WM8994_PWR_MGMT_5_DAC1L_ENA_MASK (uint16_t)0x0002U
817 #define WM8994_PWR_MGMT_5_DAC1L_ENA_POSITION 1
818 int32_t wm8994_pwr_mgmt_5_dac1l_ena(wm8994_ctx_t *ctx, uint16_t value);
819 
820 /*******************************************************************************
821 * Register : WM8994_PWR_MANAGEMENT_5
822 * Address : 0X05
823 * Bit Group Name: DAC2R_ENA
824 * Permission : RW
825 *******************************************************************************/
826 #define WM8994_PWR_MGMT_5_DAC2R_ENA_MASK (uint16_t)0x0004U
827 #define WM8994_PWR_MGMT_5_DAC2R_ENA_POSITION 2
828 int32_t wm8994_pwr_mgmt_5_dac2r_ena(wm8994_ctx_t *ctx, uint16_t value);
829 
830 /*******************************************************************************
831 * Register : WM8994_PWR_MANAGEMENT_5
832 * Address : 0X05
833 * Bit Group Name: DAC2L_ENA
834 * Permission : RW
835 *******************************************************************************/
836 #define WM8994_PWR_MGMT_5_DAC2L_ENA_MASK (uint16_t)0x0008U
837 #define WM8994_PWR_MGMT_5_DAC2L_ENA_POSITION 3
838 int32_t wm8994_pwr_mgmt_5_dac2l_ena(wm8994_ctx_t *ctx, uint16_t value);
839 
840 /*******************************************************************************
841 * Register : WM8994_PWR_MANAGEMENT_5
842 * Address : 0X05
843 * Bit Group Name: AIF1DAC1R_ENA
844 * Permission : RW
845 *******************************************************************************/
846 #define WM8994_PWR_MGMT_5_AIF1DAC1R_ENA_MASK (uint16_t)0x0100U
847 #define WM8994_PWR_MGMT_5_AIF1DAC1R_ENA_POSITION 8
848 int32_t wm8994_pwr_mgmt_5_aif1dac1r_ena(wm8994_ctx_t *ctx, uint16_t value);
849 
850 /*******************************************************************************
851 * Register : WM8994_PWR_MANAGEMENT_5
852 * Address : 0X05
853 * Bit Group Name: AIF1DAC1L_ENA
854 * Permission : RW
855 *******************************************************************************/
856 #define WM8994_PWR_MGMT_5_AIF1DAC1L_ENA_MASK (uint16_t)0x0200U
857 #define WM8994_PWR_MGMT_5_AIF1DAC1L_ENA_POSITION 9
858 int32_t wm8994_pwr_mgmt_5_aif1dac1l_ena(wm8994_ctx_t *ctx, uint16_t value);
859 
860 /*******************************************************************************
861 * Register : WM8994_PWR_MANAGEMENT_5
862 * Address : 0X05
863 * Bit Group Name: AIF1DAC2R_ENA
864 * Permission : RW
865 *******************************************************************************/
866 #define WM8994_PWR_MGMT_5_AIF1DAC2R_ENA_MASK (uint16_t)0x0400U
867 #define WM8994_PWR_MGMT_5_AIF1DAC2R_ENA_POSITION 10
868 int32_t wm8994_pwr_mgmt_5_aif1dac2r_ena(wm8994_ctx_t *ctx, uint16_t value);
869 
870 /*******************************************************************************
871 * Register : WM8994_PWR_MANAGEMENT_5
872 * Address : 0X05
873 * Bit Group Name: AIF1DAC2L_ENA
874 * Permission : RW
875 *******************************************************************************/
876 #define WM8994_PWR_MGMT_5_AIF1DAC2L_ENA_MASK (uint16_t)0x0800U
877 #define WM8994_PWR_MGMT_5_AIF1DAC2L_ENA_POSITION 11
878 int32_t wm8994_pwr_mgmt_5_aif1dac2l_ena(wm8994_ctx_t *ctx, uint16_t value);
879 
880 /*******************************************************************************
881 * Register : WM8994_PWR_MANAGEMENT_5
882 * Address : 0X05
883 * Bit Group Name: AIF2DACR_ENA
884 * Permission : RW
885 *******************************************************************************/
886 #define WM8994_PWR_MGMT_5_AIF2DACR_ENA_MASK (uint16_t)0x1000U
887 #define WM8994_PWR_MGMT_5_AIF2DACR_ENA_POSITION 12
888 int32_t wm8994_pwr_mgmt_5_aif2dacr_ena(wm8994_ctx_t *ctx, uint16_t value);
889 
890 /*******************************************************************************
891 * Register : WM8994_PWR_MANAGEMENT_5
892 * Address : 0X05
893 * Bit Group Name: AIF2DACL_ENA
894 * Permission : RW
895 *******************************************************************************/
896 #define WM8994_PWR_MGMT_5_AIF2DACL_ENA_MASK (uint16_t)0x2000U
897 #define WM8994_PWR_MGMT_5_AIF2DACL_ENA_POSITION 13
898 int32_t wm8994_pwr_mgmt_5_aif2dacl_ena(wm8994_ctx_t *ctx, uint16_t value);
899 
900 /*******************************************************************************
901 * Register : WM8994_PWR_MANAGEMENT_6
902 * Address : 0X06
903 * Bit Group Name: AIF1_DACDAT_SRC
904 * Permission : RW
905 *******************************************************************************/
906 #define WM8994_PWR_MGMT_6_AIF1_DACDAT_SRC_MASK (uint16_t)0x0001U
907 #define WM8994_PWR_MGMT_6_AIF1_DACDAT_SRC_POSITION 0
908 int32_t wm8994_pwr_mgmt_6_aif1_dacdat_src(wm8994_ctx_t *ctx, uint16_t value);
909 
910 /*******************************************************************************
911 * Register : WM8994_PWR_MANAGEMENT_6
912 * Address : 0X06
913 * Bit Group Name: AIF2_DACDAT_SRC
914 * Permission : RW
915 *******************************************************************************/
916 #define WM8994_PWR_MGMT_6_AIF2_DACDAT_SRC_MASK (uint16_t)0x0002U
917 #define WM8994_PWR_MGMT_6_AIF2_DACDAT_SRC_POSITION 1
918 int32_t wm8994_pwr_mgmt_6_aif2_dacdat_src(wm8994_ctx_t *ctx, uint16_t value);
919 
920 /*******************************************************************************
921 * Register : WM8994_PWR_MANAGEMENT_6
922 * Address : 0X06
923 * Bit Group Name: AIF2_ADCDAT_SRC
924 * Permission : RW
925 *******************************************************************************/
926 #define WM8994_PWR_MGMT_6_AIF2_ADCDAT_SRC_MASK (uint16_t)0x0004U
927 #define WM8994_PWR_MGMT_6_AIF2_ADCDAT_SRC_POSITION 2
928 int32_t wm8994_pwr_mgmt_6_aif2_adcdat_src(wm8994_ctx_t *ctx, uint16_t value);
929 
930 /*******************************************************************************
931 * Register : WM8994_PWR_MANAGEMENT_6
932 * Address : 0X06
933 * Bit Group Name: AIF3_ADCDAT_SRC
934 * Permission : RW
935 *******************************************************************************/
936 #define WM8994_PWR_MGMT_6_AIF3_ADCDAT_SRC_MASK (uint16_t)0x0018U
937 #define WM8994_PWR_MGMT_6_AIF3_ADCDAT_SRC_POSITION 3
938 int32_t wm8994_pwr_mgmt_6_aif3_adcdat_src(wm8994_ctx_t *ctx, uint16_t value);
939 
940 /*******************************************************************************
941 * Register : WM8994_PWR_MANAGEMENT_6
942 * Address : 0X06
943 * Bit Group Name: AIF3_TRI
944 * Permission : RW
945 *******************************************************************************/
946 #define WM8994_PWR_MGMT_6_AIF3_TRI_MASK (uint16_t)0x0020U
947 #define WM8994_PWR_MGMT_6_AIF3_TRI_POSITION 5
948 int32_t wm8994_pwr_mgmt_6_aif3_tri(wm8994_ctx_t *ctx, uint16_t value);
949 
950 /*******************************************************************************
951 * Register : WM8994_INPUT_MIXER_1
952 * Address : 0X15
953 * Bit Group Name: INPUTS_CLAMP
954 * Permission : RW
955 *******************************************************************************/
956 #define WM8994_INMIXER1_INPUTS_CLAMP_MASK (uint16_t)0x0040U
957 #define WM8994_INMIXER1_INPUTS_CLAMP_POSITION 6
958 int32_t wm8994_inmixer1_inputs_clamp(wm8994_ctx_t *ctx, uint16_t value);
959 
960 /*******************************************************************************
961 * Register : WM8994_INPUT_MIXER_1
962 * Address : 0X15
963 * Bit Group Name: IN1LP_MIXINL_BOOST
964 * Permission : RW
965 *******************************************************************************/
966 #define WM8994_INMIXER1_IN1LP_MIXINL_BOOST_MASK (uint16_t)0x0080U
967 #define WM8994_INMIXER1_IN1LP_MIXINL_BOOST_POSITION 7
968 int32_t wm8994_inmixer1_in1lp_mixinl_boost(wm8994_ctx_t *ctx, uint16_t value);
969 
970 /*******************************************************************************
971 * Register : WM8994_INPUT_MIXER_1
972 * Address : 0X15
973 * Bit Group Name: IN1RP_MIXINR_BOOST
974 * Permission : RW
975 *******************************************************************************/
976 #define WM8994_INMIXER1_IN1RP_MIXINR_BOOST_MASK (uint16_t)0x0100U
977 #define WM8994_INMIXER1_IN1RP_MIXINR_BOOST_POSITION 8
978 int32_t wm8994_inmixer1_in1rp_mixinr_boost(wm8994_ctx_t *ctx, uint16_t value);
979 
980 /*******************************************************************************
981 * Register : WM8994_LEFT_LINE_IN12_VOL
982 * Address : 0X18
983 * Bit Group Name: IN1L_VOL [4:0]
984 * Permission : RW
985 *******************************************************************************/
986 #define WM8994_LLI_IN1L_VOL_MASK (uint16_t)0x001F
987 #define WM8994_LLI_IN1L_VOL_POSITION 0
988 int32_t wm8994_lli_in1l_vol(wm8994_ctx_t *ctx, uint16_t value);
989 
990 /*******************************************************************************
991 * Register : WM8994_LEFT_LINE_IN12_VOL
992 * Address : 0X18
993 * Bit Group Name: IN1L_ZC
994 * Permission : RW
995 *******************************************************************************/
996 #define WM8994_LLI_IN1L_ZC_MASK (uint16_t)0x0040U
997 #define WM8994_LLI_IN1L_ZC_POSITION 6
998 int32_t wm8994_lli_in1l_zc(wm8994_ctx_t *ctx, uint16_t value);
999 
1000 /*******************************************************************************
1001 * Register : WM8994_LEFT_LINE_IN12_VOL
1002 * Address : 0X18
1003 * Bit Group Name: IN1L_MUTE
1004 * Permission : RW
1005 *******************************************************************************/
1006 #define WM8994_LLI_IN1L_MUTE_MASK (uint16_t)0x0080U
1007 #define WM8994_LLI_IN1L_MUTE_POSITION 7
1008 int32_t wm8994_lli_in1l_mute(wm8994_ctx_t *ctx, uint16_t value);
1009 
1010 /*******************************************************************************
1011 * Register : WM8994_LEFT_LINE_IN12_VOL
1012 * Address : 0X18
1013 * Bit Group Name: IN1_VU
1014 * Permission : RW
1015 *******************************************************************************/
1016 #define WM8994_LLI_IN1_VU_MASK (uint16_t)0x0100U
1017 #define WM8994_LLI_IN1_VU_POSITION 8
1018 int32_t wm8994_lli_in1_vu(wm8994_ctx_t *ctx, uint16_t value);
1019 
1020 /*******************************************************************************
1021 * Register : WM8994_LEFT_LINE_IN34_VOL
1022 * Address : 0X19
1023 * Bit Group Name: IN2L_VOL [4:0]
1024 * Permission : RW
1025 ***************************************************************2****************/
1026 #define WM8994_LLI_IN2L_VOL_MASK (uint16_t)0x001F
1027 #define WM8994_LLI_IN2L_VOL_POSITION 0
1028 int32_t wm8994_lli_in2l_vol(wm8994_ctx_t *ctx, uint16_t value);
1029 
1030 /*******************************************************************************
1031 * Register : WM8994_LEFT_LINE_IN34_VOL
1032 * Address : 0X19
1033 * Bit Group Name: IN2L_ZC
1034 * Permission : RW
1035 *******************************************************************************/
1036 #define WM8994_LLI_IN2L_ZC_MASK (uint16_t)0x0040U
1037 #define WM8994_LLI_IN2L_ZC_POSITION 6
1038 int32_t wm8994_lli_in2l_zc(wm8994_ctx_t *ctx, uint16_t value);
1039 
1040 /*******************************************************************************
1041 * Register : WM8994_LEFT_LINE_IN34_VOL
1042 * Address : 0X19
1043 * Bit Group Name: IN2L_MUTE
1044 * Permission : RW
1045 *******************************************************************************/
1046 #define WM8994_LLI_IN2L_MUTE_MASK (uint16_t)0x0080U
1047 #define WM8994_LLI_IN2L_MUTE_POSITION 7
1048 int32_t wm8994_lli_in2l_mute(wm8994_ctx_t *ctx, uint16_t value);
1049 
1050 /*******************************************************************************
1051 * Register : WM8994_LEFT_LINE_IN34_VOL
1052 * Address : 0X19
1053 * Bit Group Name: IN1_VU
1054 * Permission : RW
1055 *******************************************************************************/
1056 #define WM8994_LLI_IN2_VU_MASK (uint16_t)0x0100U
1057 #define WM8994_LLI_IN2_VU_POSITION 8
1058 int32_t wm8994_lli_in2_vu(wm8994_ctx_t *ctx, uint16_t value);
1059 
1060 /*******************************************************************************
1061 * Register : WM8994_RIGHT_LINE_IN12_VOL
1062 * Address : 0X1A
1063 * Bit Group Name: IN1R_VOL [4:0]
1064 * Permission : RW
1065 *******************************************************************************/
1066 #define WM8994_RLI_IN1R_VOL_MASK (uint16_t)0x001F
1067 #define WM8994_RLI_IN1R_VOL_POSITION 0
1068 int32_t wm8994_rli_in1r_vol(wm8994_ctx_t *ctx, uint16_t value);
1069 
1070 /*******************************************************************************
1071 * Register : WM8994_RIGHT_LINE_IN12_VOL
1072 * Address : 0X1A
1073 * Bit Group Name: IN1R_ZC
1074 * Permission : RW
1075 *******************************************************************************/
1076 #define WM8994_RLI_IN1R_ZC_MASK (uint16_t)0x0040U
1077 #define WM8994_RLI_IN1R_ZC_POSITION 6
1078 int32_t wm8994_rli_in1r_zc(wm8994_ctx_t *ctx, uint16_t value);
1079 
1080 /*******************************************************************************
1081 * Register : WM8994_RIGHT_LINE_IN12_VOL
1082 * Address : 0X1A
1083 * Bit Group Name: IN1R_MUTE
1084 * Permission : RW
1085 *******************************************************************************/
1086 #define WM8994_RLI_IN1R_MUTE_MASK (uint16_t)0x0080U
1087 #define WM8994_RLI_IN1R_MUTE_POSITION 7
1088 int32_t wm8994_rli_in1r_mute(wm8994_ctx_t *ctx, uint16_t value);
1089 
1090 /*******************************************************************************
1091 * Register : WM8994_RIGHT_LINE_IN12_VOL
1092 * Address : 0X1A
1093 * Bit Group Name: IN1_VU
1094 * Permission : RW
1095 *******************************************************************************/
1096 #define WM8994_RLI_IN1_VU_MASK (uint16_t)0x0100U
1097 #define WM8994_RLI_IN1_VU_POSITION 8
1098 int32_t wm8994_rli_in1_vu(wm8994_ctx_t *ctx, uint16_t value);
1099 
1100 /*******************************************************************************
1101 * Register : WM8994_RIGHT_LINE_IN34_VOL
1102 * Address : 0X1B
1103 * Bit Group Name: IN2R_VOL [4:0]
1104 * Permission : RW
1105 *******************************************************************************/
1106 #define WM8994_RLI_IN2R_VOL_MASK (uint16_t)0x001F
1107 #define WM8994_RLI_IN2R_VOL_POSITION 0
1108 int32_t wm8994_rli_in2r_vol(wm8994_ctx_t *ctx, uint16_t value);
1109 
1110 /*******************************************************************************
1111 * Register : WM8994_RIGHT_LINE_IN34_VOL
1112 * Address : 0X1B
1113 * Bit Group Name: IN2R_ZC
1114 * Permission : RW
1115 *******************************************************************************/
1116 #define WM8994_RLI_IN2R_ZC_MASK (uint16_t)0x0040U
1117 #define WM8994_RLI_IN2R_ZC_POSITION 6
1118 int32_t wm8994_rli_in2r_zc(wm8994_ctx_t *ctx, uint16_t value);
1119 
1120 /*******************************************************************************
1121 * Register : WM8994_RIGHT_LINE_IN34_VOL
1122 * Address : 0X1B
1123 * Bit Group Name: IN2R_MUTE
1124 * Permission : RW
1125 *******************************************************************************/
1126 #define WM8994_RLI_IN2R_MUTE_MASK (uint16_t)0x0080U
1127 #define WM8994_RLI_IN2R_MUTE_POSITION 7
1128 int32_t wm8994_rli_in2r_mute(wm8994_ctx_t *ctx, uint16_t value);
1129 
1130 /*******************************************************************************
1131 * Register : WM8994_RIGHT_LINE_IN34_VOL
1132 * Address : 0X1B
1133 * Bit Group Name: IN2_VU
1134 * Permission : RW
1135 *******************************************************************************/
1136 #define WM8994_RLI_IN2_VU_MASK (uint16_t)0x0100U
1137 #define WM8994_RLI_IN2_VU_POSITION 8
1138 int32_t wm8994_rli_in2_vu(wm8994_ctx_t *ctx, uint16_t value);
1139 
1140 /*******************************************************************************
1141 * Register : WM8994_LEFT_OUTPUT_VOL
1142 * Address : 0X1C
1143 * Bit Group Name: HPOUT1L_VOL [5:0]
1144 * Permission : RW
1145 *******************************************************************************/
1146 #define WM8994_LO_HPOUT1L_VOL_MASK (uint16_t)0x003F
1147 #define WM8994_LO_HPOUT1L_VOL_POSITION 0
1148 int32_t wm8994_lo_hpout1l_vol(wm8994_ctx_t *ctx, uint16_t value);
1149 int32_t wm8994_lo_hpout1l_vol_r(wm8994_ctx_t *ctx, uint16_t *value);
1150 
1151 /*******************************************************************************
1152 * Register : WM8994_LEFT_OUTPUT_VOL
1153 * Address : 0X1C
1154 * Bit Group Name: HPOUT1L_MUTE_N
1155 * Permission : RW
1156 *******************************************************************************/
1157 #define WM8994_LO_HPOUT1L_MUTE_N_MASK (uint16_t)0x0040U
1158 #define WM8994_LO_HPOUT1L_MUTE_N_POSITION 6
1159 int32_t wm8994_lo_hpout1l_mute_n(wm8994_ctx_t *ctx, uint16_t value);
1160 
1161 /*******************************************************************************
1162 * Register : WM8994_LEFT_OUTPUT_VOL
1163 * Address : 0X1C
1164 * Bit Group Name: HPOUT1L_ZC
1165 * Permission : RW
1166 *******************************************************************************/
1167 #define WM8994_LO_HPOUT1L_ZC_MASK (uint16_t)0x0080U
1168 #define WM8994_LO_HPOUT1L_ZC_POSITION 7
1169 int32_t wm8994_lo_hpout1l_zc(wm8994_ctx_t *ctx, uint16_t value);
1170 
1171 /*******************************************************************************
1172 * Register : WM8994_LEFT_OUTPUT_VOL
1173 * Address : 0X1C
1174 * Bit Group Name: HPOUT1L_VU
1175 * Permission : RW
1176 *******************************************************************************/
1177 #define WM8994_LO_HPOUT1L_VU_MASK (uint16_t)0x0100U
1178 #define WM8994_LO_HPOUT1L_VU_POSITION 8
1179 int32_t wm8994_lo_hpout1l_vu(wm8994_ctx_t *ctx, uint16_t value);
1180 
1181 
1182 /*******************************************************************************
1183 * Register : WM8994_RIGHT_OUTPUT_VOL
1184 * Address : 0X1D
1185 * Bit Group Name: HPOUT1R_VOL [5:0]
1186 * Permission : RW
1187 *******************************************************************************/
1188 #define WM8994_RO_HPOUT1R_VOL_MASK (uint16_t)0x003F
1189 #define WM8994_RO_HPOUT1R_VOL_POSITION 5
1190 int32_t wm8994_ro_hpout1r_vol(wm8994_ctx_t *ctx, uint16_t value);
1191 
1192 /*******************************************************************************
1193 * Register : WM8994_RIGHT_OUTPUT_VOL
1194 * Address : 0X1D
1195 * Bit Group Name: HPOUT1R_MUTE_N
1196 * Permission : RW
1197 *******************************************************************************/
1198 #define WM8994_RO_HPOUT1R_MUTE_N_MASK (uint16_t)0x0040U
1199 #define WM8994_RO_HPOUT1R_MUTE_N_POSITION 6
1200 int32_t wm8994_ro_hpout1r_mute_n(wm8994_ctx_t *ctx, uint16_t value);
1201 
1202 /*******************************************************************************
1203 * Register : WM8994_RIGHT_OUTPUT_VOL
1204 * Address : 0X1D
1205 * Bit Group Name: HPOUT1R_ZC
1206 * Permission : RW
1207 *******************************************************************************/
1208 #define WM8994_RO_HPOUT1R_ZC_MASK (uint16_t)0x0080
1209 #define WM8994_RO_HPOUT1R_ZC_POSITION 7
1210 int32_t wm8994_ro_hpout1r_zc(wm8994_ctx_t *ctx, uint16_t value);
1211 
1212 /*******************************************************************************
1213 * Register : WM8994_RIGHT_OUTPUT_VOL
1214 * Address : 0X1D
1215 * Bit Group Name: HPOUT1R_VU
1216 * Permission : RW
1217 *******************************************************************************/
1218 #define WM8994_RO_HPOUT1R_VU_MASK (uint16_t)0x0100
1219 #define WM8994_RO_HPOUT1R_VU_POSITION 8
1220 int32_t wm8994_ro_hpout1r_vu(wm8994_ctx_t *ctx, uint16_t value);
1221 
1222 /* Note: Registers (uint16_t)0x1E, (uint16_t)0x1F, (uint16_t)0x20 and (uint16_t)0x21 are not implemented here */
1223 
1224 /*******************************************************************************
1225 * Register : WM8994_SPKMIXL_ATT
1226 * Address : 0X22
1227 * Bit Group Name: SPKMIXL_VOL[1:0]
1228 * Permission : RW
1229 *******************************************************************************/
1230 #define WM8994_SPKMIXL_ATT_VOL_MASK (uint16_t)0x0003
1231 #define WM8994_SPKMIXL_ATT_VOL_POSITION 0
1232 int32_t wm8994_spkmixl_att_vol(wm8994_ctx_t *ctx, uint16_t value);
1233 
1234 /*******************************************************************************
1235 * Register : WM8994_SPKMIXL_ATT
1236 * Address : 0X22
1237 * Bit Group Name: DAC1L_SPKMIXL_VOL
1238 * Permission : RW
1239 *******************************************************************************/
1240 #define WM8994_SPKMIXL_ATT_DAC1_VOL_MASK (uint16_t)0x0004
1241 #define WM8994_SPKMIXL_ATT_DAC1_VOL_POSITION 2
1242 int32_t wm8994_spkmixl_att_dac1_vol(wm8994_ctx_t *ctx, uint16_t value);
1243 
1244 /*******************************************************************************
1245 * Register : WM8994_SPKMIXL_ATT
1246 * Address : 0X22
1247 * Bit Group Name: MIXOUTL_SPKMIXL_VOL
1248 * Permission : RW
1249 *******************************************************************************/
1250 #define WM8994_SPKMIXL_ATT_MIXOUTL_VOL_MASK (uint16_t)0x0008
1251 #define WM8994_SPKMIXL_ATT_MIXOUTL_VOL_POSITION 3
1252 int32_t wm8994_spkmixl_att_mixoutl_vol(wm8994_ctx_t *ctx, uint16_t value);
1253 
1254 /*******************************************************************************
1255 * Register : WM8994_SPKMIXL_ATT
1256 * Address : 0X22
1257 * Bit Group Name: IN1LP_SPKMIXL_VOL
1258 * Permission : RW
1259 *******************************************************************************/
1260 #define WM8994_SPKMIXL_ATT_IN1LP_VOL_MASK (uint16_t)0x0010
1261 #define WM8994_SPKMIXL_ATT_IN1LP_VOL_POSITION 4
1262 int32_t wm8994_spkmixl_att_in1lp_vol(wm8994_ctx_t *ctx, uint16_t value);
1263 
1264 /*******************************************************************************
1265 * Register : WM8994_SPKMIXL_ATT
1266 * Address : 0X22
1267 * Bit Group Name: MIXINL_SPKMIXL_VOL
1268 * Permission : RW
1269 *******************************************************************************/
1270 #define WM8994_SPKMIXL_ATT_MIXINL_VOL_MASK (uint16_t)0x0020
1271 #define WM8994_SPKMIXL_ATT_MIXINL_VOL_POSITION 5
1272 int32_t wm8994_spkmixl_att_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1273 
1274 /*******************************************************************************
1275 * Register : WM8994_SPKMIXL_ATT
1276 * Address : 0X22
1277 * Bit Group Name: DAC2L_SPKMIXL_VOL
1278 * Permission : RW
1279 *******************************************************************************/
1280 #define WM8994_SPKMIXL_ATT_DAC2L_VOL_MASK (uint16_t)0x0040
1281 #define WM8994_SPKMIXL_ATT_DAC2L_VOL_POSITION 6
1282 int32_t wm8994_spkmixl_att_dac2l_vol(wm8994_ctx_t *ctx, uint16_t value);
1283 
1284 /*******************************************************************************
1285 * Register : WM8994_SPKMIXL_ATT
1286 * Address : 0X22
1287 * Bit Group Name: SPKAB_REF_SEL
1288 * Permission : RW
1289 *******************************************************************************/
1290 #define WM8994_SPKMIXL_ATT_SPKAB_REFSEL_MASK (uint16_t)0x0100
1291 #define WM8994_SPKMIXL_ATT_SPKAB_REFSEL_POSITION 8
1292 int32_t wm8994_spkmixl_att_spkab_refsel(wm8994_ctx_t *ctx, uint16_t value);
1293 
1294 /*******************************************************************************
1295 * Register : WM8994_SPKMIXR_ATT
1296 * Address : 0X23
1297 * Bit Group Name: SPKMIXR_VOL[1:0]
1298 * Permission : RW
1299 *******************************************************************************/
1300 #define WM8994_SPKMIXR_ATT_VOL_MASK (uint16_t)0x0003
1301 #define WM8994_SPKMIXR_ATT_VOL_POSITION 0
1302 int32_t wm8994_spkmixr_att_vol(wm8994_ctx_t *ctx, uint16_t value);
1303 
1304 /*******************************************************************************
1305 * Register : WM8994_SPKMIXR_ATT
1306 * Address : 0X23
1307 * Bit Group Name: DAC1R_SPKMIXR_VOL
1308 * Permission : RW
1309 *******************************************************************************/
1310 #define WM8994_SPKMIXR_ATT_DAC1_VOL_MASK (uint16_t)0x0004
1311 #define WM8994_SPKMIXR_ATT_DAC1_VOL_POSITION 2
1312 int32_t wm8994_spkmixr_att_dac1_vol(wm8994_ctx_t *ctx, uint16_t value);
1313 
1314 /*******************************************************************************
1315 * Register : WM8994_SPKMIXR_ATT
1316 * Address : 0X23
1317 * Bit Group Name: MIXOUTR_SPKMIXR_VOL
1318 * Permission : RW
1319 *******************************************************************************/
1320 #define WM8994_SPKMIXR_ATT_MIXOUTL_VOL_MASK (uint16_t)0x0008
1321 #define WM8994_SPKMIXR_ATT_MIXOUTL_VOL_POSITION 3
1322 int32_t wm8994_spkmixr_att_mixoutl_vol(wm8994_ctx_t *ctx, uint16_t value);
1323 
1324 /*******************************************************************************
1325 * Register : WM8994_SPKMIXR_ATT
1326 * Address : 0X23
1327 * Bit Group Name: IN1RP_SPKMIXR_VOL
1328 * Permission : RW
1329 *******************************************************************************/
1330 #define WM8994_SPKMIXR_ATT_IN1RP_VOL_MASK (uint16_t)0x0010
1331 #define WM8994_SPKMIXR_ATT_IN1RP_VOL_POSITION 4
1332 int32_t wm8994_spkmixr_att_in1rp_vol(wm8994_ctx_t *ctx, uint16_t value);
1333 
1334 /*******************************************************************************
1335 * Register : WM8994_SPKMIXR_ATT
1336 * Address : 0X23
1337 * Bit Group Name: MIXINL_SPKMIXR_VOL
1338 * Permission : RW
1339 *******************************************************************************/
1340 #define WM8994_SPKMIXR_ATT_MIXINL_VOL_MASK (uint16_t)0x0020
1341 #define WM8994_SPKMIXR_ATT_MIXINL_VOL_POSITION 5
1342 int32_t wm8994_spkmixr_att_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1343 
1344 /*******************************************************************************
1345 * Register : WM8994_SPKMIXR_ATT
1346 * Address : 0X23
1347 * Bit Group Name: DAC2R_SPKMIXR_VOL
1348 * Permission : RW
1349 *******************************************************************************/
1350 #define WM8994_SPKMIXR_ATT_DAC2R_VOL_MASK (uint16_t)0x0040
1351 #define WM8994_SPKMIXR_ATT_DAC2R_VOL_POSITION 6
1352 int32_t wm8994_spkmixr_att_dac2r_vol(wm8994_ctx_t *ctx, uint16_t value);
1353 
1354 /*******************************************************************************
1355 * Register : WM8994_SPKMIXR_ATT
1356 * Address : 0X23
1357 * Bit Group Name: SPKOUT_CLASSAB
1358 * Permission : RW
1359 *******************************************************************************/
1360 #define WM8994_SPKMIXR_ATT_SPKOUT_CLASSAB_MASK (uint16_t)0x0100
1361 #define WM8994_SPKMIXR_ATT_SPKOUT_CLASSAB_POSITION 8
1362 int32_t wm8994_spkmixr_att_spkout_classab(wm8994_ctx_t *ctx, uint16_t value);
1363 
1364 /* Note: Registers (uint16_t)0x24 and (uint16_t)0x25 are not implemented here */
1365 
1366 /*******************************************************************************
1367 * Register : WM8994_SPK_LEFT_VOL
1368 * Address : 0X26
1369 * Bit Group Name: SPKOUTL_VOL [5:0]
1370 * Permission : RW
1371 *******************************************************************************/
1372 #define WM8994_SPK_LEFT_VOL_SPKOUT_VOL_MASK (uint16_t)0x003F
1373 #define WM8994_SPK_LEFT_VOL_SPKOUT_VOL_POSITION 5
1374 int32_t wm8994_spk_left_vol_spkout_vol(wm8994_ctx_t *ctx, uint16_t value);
1375 
1376 /*******************************************************************************
1377 * Register : WM8994_SPK_LEFT_VOL
1378 * Address : 0X26
1379 * Bit Group Name: SPKOUTL_MUTE_N
1380 * Permission : RW
1381 *******************************************************************************/
1382 #define WM8994_SPK_LEFT_VOL_SPKOUT_MUTE_N_MASK (uint16_t)0x0040
1383 #define WM8994_SPK_LEFT_VOL_SPKOUT_MUTE_N_POSITION 6
1384 int32_t wm8994_spk_left_vol_spkout_mute_n(wm8994_ctx_t *ctx, uint16_t value);
1385 
1386 /*******************************************************************************
1387 * Register : WM8994_SPK_LEFT_VOL
1388 * Address : 0X26
1389 * Bit Group Name: SPKOUTL_ZC
1390 * Permission : RW
1391 *******************************************************************************/
1392 #define WM8994_SPK_LEFT_VOL_SPKOUT_ZC_MASK (uint16_t)0x0080
1393 #define WM8994_SPK_LEFT_VOL_SPKOUT_ZC_POSITION 7
1394 int32_t wm8994_spk_left_vol_spkout_zc(wm8994_ctx_t *ctx, uint16_t value);
1395 
1396 /*******************************************************************************
1397 * Register : WM8994_SPK_LEFT_VOL
1398 * Address : 0X26
1399 * Bit Group Name: SPKOUT_VU
1400 * Permission : RW
1401 *******************************************************************************/
1402 #define WM8994_SPK_LEFT_VOL_SPKOUT_VU_MASK (uint16_t)0x0100
1403 #define WM8994_SPK_LEFT_VOL_SPKOUT_VU_POSITION 8
1404 int32_t wm8994_spk_left_vol_spkout_vu(wm8994_ctx_t *ctx, uint16_t value);
1405 
1406 /*******************************************************************************
1407 * Register : WM8994_SPK_RIGHT_VOL
1408 * Address : 0X27
1409 * Bit Group Name: SPKOUTR_VOL [5:0]
1410 * Permission : RW
1411 *******************************************************************************/
1412 #define WM8994_SPK_RIGHT_VOL_SPKOUT_VOL_MASK (uint16_t)0x003F
1413 #define WM8994_SPK_RIGHT_VOL_SPKOUT_VOL_POSITION 5
1414 int32_t wm8994_spk_right_vol_spkout_vol(wm8994_ctx_t *ctx, uint16_t value);
1415 
1416 /*******************************************************************************
1417 * Register : WM8994_SPK_RIGHT_VOL
1418 * Address : 0X27
1419 * Bit Group Name: SPKOUTR_MUTE_N
1420 * Permission : RW
1421 *******************************************************************************/
1422 #define WM8994_SPK_RIGHT_VOL_SPKOUT_MUTE_N_MASK (uint16_t)0x0040
1423 #define WM8994_SPK_RIGHT_VOL_SPKOUT_MUTE_N_POSITION 6
1424 int32_t wm8994_spk_right_vol_spkout_mute_n(wm8994_ctx_t *ctx, uint16_t value);
1425 
1426 /*******************************************************************************
1427 * Register : WM8994_SPK_RIGHT_VOL
1428 * Address : 0X27
1429 * Bit Group Name: SPKOUTR_ZC
1430 * Permission : RW
1431 *******************************************************************************/
1432 #define WM8994_SPK_RIGHT_VOL_SPKOUT_ZC_MASK (uint16_t)0x0080
1433 #define WM8994_SPK_RIGHT_VOL_SPKOUT_ZC_POSITION 7
1434 int32_t wm8994_spk_right_vol_spkout_zc(wm8994_ctx_t *ctx, uint16_t value);
1435 
1436 /*******************************************************************************
1437 * Register : WM8994_SPK_RIGHT_VOL
1438 * Address : 0X27
1439 * Bit Group Name: SPKOUT_VU
1440 * Permission : RW
1441 *******************************************************************************/
1442 #define WM8994_SPK_RIGHT_VOL_SPKOUT_VU_MASK (uint16_t)0x0100
1443 #define WM8994_SPK_RIGHT_VOL_SPKOUT_VU_POSITION 8
1444 int32_t wm8994_spk_right_vol_spkout_vu(wm8994_ctx_t *ctx, uint16_t value);
1445 
1446 /*******************************************************************************
1447 * Register : WM8994_INPUT_MIXER_2
1448 * Address : 0X28
1449 * Bit Group Name: IN1RN_TO_IN1R
1450 * Permission : RW
1451 *******************************************************************************/
1452 #define WM8994_INMIXER2_IN1RN_TO_IN1R_MASK (uint16_t)0x0001
1453 #define WM8994_INMIXER2_IN1RN_TO_IN1R_POSITION 0
1454 int32_t wm8994_inmixer2_in1rn_to_in1r(wm8994_ctx_t *ctx, uint16_t value);
1455 
1456 /*******************************************************************************
1457 * Register : WM8994_INPUT_MIXER_2
1458 * Address : 0X28
1459 * Bit Group Name: IN1RP_TO_IN1R
1460 * Permission : RW
1461 *******************************************************************************/
1462 #define WM8994_INMIXER2_IN1RP_TO_IN1R_MASK (uint16_t)0x0002
1463 #define WM8994_INMIXER2_IN1RP_TO_IN1R_POSITION 1
1464 int32_t wm8994_inmixer2_in1rp_to_in1r(wm8994_ctx_t *ctx, uint16_t value);
1465 
1466 /*******************************************************************************
1467 * Register : WM8994_INPUT_MIXER_2
1468 * Address : 0X28
1469 * Bit Group Name: IN2RN_TO_IN2R
1470 * Permission : RW
1471 *******************************************************************************/
1472 #define WM8994_INMIXER2_IN2RN_TO_IN2R_MASK (uint16_t)0x0004
1473 #define WM8994_INMIXER2_IN2RN_TO_IN2R_POSITION 2
1474 int32_t wm8994_inmixer2_in2rn_to_in2r(wm8994_ctx_t *ctx, uint16_t value);
1475 
1476 /*******************************************************************************
1477 * Register : WM8994_INPUT_MIXER_2
1478 * Address : 0X28
1479 * Bit Group Name: IN2RP_TO_IN2R
1480 * Permission : RW
1481 *******************************************************************************/
1482 #define WM8994_INMIXER2_IN2RP_TO_IN2R_MASK (uint16_t)0x0008
1483 #define WM8994_INMIXER2_IN2RP_TO_IN2R_POSITION 3
1484 int32_t wm8994_inmixer2_in2rp_to_in2r(wm8994_ctx_t *ctx, uint16_t value);
1485 
1486 /*******************************************************************************
1487 * Register : WM8994_INPUT_MIXER_2
1488 * Address : 0X28
1489 * Bit Group Name: IN1LN_TO_IN1L
1490 * Permission : RW
1491 *******************************************************************************/
1492 #define WM8994_INMIXER2_IN1LN_TO_IN1L_MASK (uint16_t)0x0010
1493 #define WM8994_INMIXER2_IN1LN_TO_IN1L_POSITION 4
1494 int32_t wm8994_inmixer2_in1ln_to_in1l(wm8994_ctx_t *ctx, uint16_t value);
1495 
1496 /*******************************************************************************
1497 * Register : WM8994_INPUT_MIXER_2
1498 * Address : 0X28
1499 * Bit Group Name: IN1LP_TO_IN1L
1500 * Permission : RW
1501 *******************************************************************************/
1502 #define WM8994_INMIXER2_IN1LP_TO_IN1L_MASK (uint16_t)0x0020
1503 #define WM8994_INMIXER2_IN1LP_TO_IN1L_POSITION 5
1504 int32_t wm8994_inmixer2_in1lp_to_in1l(wm8994_ctx_t *ctx, uint16_t value);
1505 
1506 /*******************************************************************************
1507 * Register : WM8994_INPUT_MIXER_2
1508 * Address : 0X28
1509 * Bit Group Name: IN2LN_TO_IN2L
1510 * Permission : RW
1511 *******************************************************************************/
1512 #define WM8994_INMIXER2_IN2LN_TO_IN2L_MASK (uint16_t)0x0040
1513 #define WM8994_INMIXER2_IN2LN_TO_IN2L_POSITION 6
1514 int32_t wm8994_inmixer2_in2ln_to_in2l(wm8994_ctx_t *ctx, uint16_t value);
1515 
1516 /*******************************************************************************
1517 * Register : WM8994_INPUT_MIXER_2
1518 * Address : 0X28
1519 * Bit Group Name: IN2LP_TO_IN2L
1520 * Permission : RW
1521 *******************************************************************************/
1522 #define WM8994_INMIXER2_IN2LP_TO_IN2L_MASK (uint16_t)0x0080
1523 #define WM8994_INMIXER2_IN2LP_TO_IN2L_POSITION 7
1524 int32_t wm8994_inmixer2_in2lp_to_in2l(wm8994_ctx_t *ctx, uint16_t value);
1525 
1526 /*******************************************************************************
1527 * Register : WM8994_INPUT_MIXER_3
1528 * Address : 0X29
1529 * Bit Group Name: MIXOUTL_MIXINL_VOL [2:0]
1530 * Permission : RW
1531 *******************************************************************************/
1532 #define WM8994_INMIXER3_MIXOUTL_MIXINL_VOL_MASK (uint16_t)0x0007
1533 #define WM8994_INMIXER3_MIXOUTL_MIXINL_VOL_POSITION 0
1534 int32_t wm8994_inmixer3_mixoutl_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1535 
1536 /*******************************************************************************
1537 * Register : WM8994_INPUT_MIXER_3
1538 * Address : 0X29
1539 * Bit Group Name: IN1L_MIXINL_VOL
1540 * Permission : RW
1541 *******************************************************************************/
1542 #define WM8994_INMIXER3_IN1L_MIXINL_VOL_MASK (uint16_t)0x0010
1543 #define WM8994_INMIXER3_IN1L_MIXINL_VOL_POSITION 4
1544 int32_t wm8994_inmixer3_in1l_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1545 
1546 /*******************************************************************************
1547 * Register : WM8994_INPUT_MIXER_3
1548 * Address : 0X29
1549 * Bit Group Name: IN1L_TO_MIXINL
1550 * Permission : RW
1551 *******************************************************************************/
1552 #define WM8994_INMIXER3_IN1L_TO_MIXINL_MASK (uint16_t)0x0020
1553 #define WM8994_INMIXER3_IN1L_TO_MIXINL_POSITION 5
1554 int32_t wm8994_inmixer3_in1l_to_mixinl(wm8994_ctx_t *ctx, uint16_t value);
1555 
1556 /*******************************************************************************
1557 * Register : WM8994_INPUT_MIXER_3
1558 * Address : 0X29
1559 * Bit Group Name: IN2L_MIXINL_VOL
1560 * Permission : RW
1561 *******************************************************************************/
1562 #define WM8994_INMIXER3_IN2L_MIXINL_VOL_MASK (uint16_t)0x0080
1563 #define WM8994_INMIXER3_IN2L_MIXINL_VOL_POSITION 7
1564 int32_t wm8994_inmixer3_in2l_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1565 
1566 /*******************************************************************************
1567 * Register : WM8994_INPUT_MIXER_3
1568 * Address : 0X29
1569 * Bit Group Name: IN2L_TO_MIXINL
1570 * Permission : RW
1571 *******************************************************************************/
1572 #define WM8994_INMIXER3_IN2L_TO_MIXINL_MASK (uint16_t)0x0100
1573 #define WM8994_INMIXER3_IN2L_TO_MIXINL_POSITION 8
1574 int32_t wm8994_inmixer3_in2l_to_mixinl(wm8994_ctx_t *ctx, uint16_t value);
1575 
1576 /*******************************************************************************
1577 * Register : WM8994_INPUT_MIXER_4
1578 * Address : 0X2A
1579 * Bit Group Name: MIXOUTR_MIXINR_VOL [2:0]
1580 * Permission : RW
1581 *******************************************************************************/
1582 #define WM8994_INMIXER4_MIXOUTR_MIXINR_VOL_MASK (uint16_t)0x0007
1583 #define WM8994_INMIXER4_MIXOUTR_MIXINR_VOL_POSITION 0
1584 int32_t wm8994_inmixer4_mixoutr_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value);
1585 
1586 /*******************************************************************************
1587 * Register : WM8994_INPUT_MIXER_4
1588 * Address : 0X2A
1589 * Bit Group Name: IN1R_MIXINR_VOL
1590 * Permission : RW
1591 *******************************************************************************/
1592 #define WM8994_INMIXER4_IN1R_MIXINR_VOL_MASK (uint16_t)0x0010
1593 #define WM8994_INMIXER4_IN1R_MIXINR_VOL_POSITION 4
1594 int32_t wm8994_inmixer4_in1r_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value);
1595 
1596 /*******************************************************************************
1597 * Register : WM8994_INPUT_MIXER_4
1598 * Address : 0X2A
1599 * Bit Group Name: IN1R_TO_MIXINR
1600 * Permission : RW
1601 *******************************************************************************/
1602 #define WM8994_INMIXER4_IN1R_TO_MIXINR_MASK (uint16_t)0x0020
1603 #define WM8994_INMIXER4_IN1R_TO_MIXINR_POSITION 5
1604 int32_t wm8994_inmixer4_in1r_to_mixinr(wm8994_ctx_t *ctx, uint16_t value);
1605 
1606 /*******************************************************************************
1607 * Register : WM8994_INPUT_MIXER_4
1608 * Address : 0X2A
1609 * Bit Group Name: IN2R_MIXINR_VOL
1610 * Permission : RW
1611 *******************************************************************************/
1612 #define WM8994_INMIXER4_IN2R_MIXINR_VOL_MASK (uint16_t)0x0080
1613 #define WM8994_INMIXER4_IN2R_MIXINR_VOL_POSITION 7
1614 int32_t wm8994_inmixer4_in2r_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value);
1615 
1616 /*******************************************************************************
1617 * Register : WM8994_INPUT_MIXER_4
1618 * Address : 0X2A
1619 * Bit Group Name: IN2R_TO_MIXINR
1620 * Permission : RW
1621 *******************************************************************************/
1622 #define WM8994_INMIXER4_IN2R_TO_MIXINR_MASK (uint16_t)0x0100
1623 #define WM8994_INMIXER4_IN2R_TO_MIXINR_POSITION 8
1624 int32_t wm8994_inmixer4_in2r_to_mixinr(wm8994_ctx_t *ctx, uint16_t value);
1625 
1626 /*******************************************************************************
1627 * Register : WM8994_INPUT_MIXER_5
1628 * Address : 0X2B
1629 * Bit Group Name: IN2LRP_MIXINL_VOL [2:0]
1630 * Permission : RW
1631 *******************************************************************************/
1632 #define WM8994_INMIXER5_IN2LRP_MIXINL_VOL_MASK (uint16_t)0x0007
1633 #define WM8994_INMIXER5_IN2LRP_MIXINL_VOL_POSITION 0
1634 int32_t wm8994_inmixer5_in2lrp_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1635 
1636 /*******************************************************************************
1637 * Register : WM8994_INPUT_MIXER_5
1638 * Address : 0X2B
1639 * Bit Group Name: IN1LP_MIXINL_VOL [2:0]
1640 * Permission : RW
1641 *******************************************************************************/
1642 #define WM8994_INMIXER5_IN1LP_MIXINL_VOL_MASK (uint16_t)0x01C0
1643 #define WM8994_INMIXER5_IN1LP_MIXINL_VOL_POSITION 6
1644 int32_t wm8994_inmixer5_in1lp_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value);
1645 
1646 
1647 /*******************************************************************************
1648 * Register : WM8994_INPUT_MIXER_6
1649 * Address : 0X2C
1650 * Bit Group Name: IN2LRP_MIXINR_VOL [2:0]
1651 * Permission : RW
1652 *******************************************************************************/
1653 #define WM8994_INMIXER6_IN2LRP_MIXINR_VOL_MASK (uint16_t)0x0007
1654 #define WM8994_INMIXER6_IN2LRP_MIXINR_VOL_POSITION 0
1655 int32_t wm8994_inmixer6_in2lrp_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value);
1656 
1657 /*******************************************************************************
1658 * Register : WM8994_INPUT_MIXER_6
1659 * Address : 0X2C
1660 * Bit Group Name: IN1RP_MIXINR_VOL [2:0]
1661 * Permission : RW
1662 *******************************************************************************/
1663 #define WM8994_INMIXER6_IN1RP_MIXINR_VOL_MASK (uint16_t)0x01C0
1664 #define WM8994_INMIXER6_IN1RP_MIXINR_VOL_POSITION 6
1665 int32_t wm8994_inmixer6_in1rp_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value);
1666 
1667 /*******************************************************************************
1668 * Register : WM8994_OUTPUT_MIXER_1
1669 * Address : 0X2D
1670 * Bit Group Name: DAC1L_TO_MIXOUTL
1671 * Permission : RW
1672 *******************************************************************************/
1673 #define WM8994_OUTMIXER1_DAC1L_TO_MIXOUTL_MASK (uint16_t)0x0001
1674 #define WM8994_OUTMIXER1_DAC1L_TO_MIXOUTL_POSITION 0
1675 int32_t wm8994_outmixer1_dac1l_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1676 
1677 /*******************************************************************************
1678 * Register : WM8994_OUTPUT_MIXER_1
1679 * Address : 0X2D
1680 * Bit Group Name: IN2LP_TO_MIXOUTL
1681 * Permission : RW
1682 *******************************************************************************/
1683 #define WM8994_OUTMIXER1_IN2LP_TO_MIXOUTL_MASK (uint16_t)0x0002
1684 #define WM8994_OUTMIXER1_IN2LP_TO_MIXOUTL_POSITION 1
1685 int32_t wm8994_outmixer1_in2lp_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1686 
1687 /*******************************************************************************
1688 * Register : WM8994_OUTPUT_MIXER_1
1689 * Address : 0X2D
1690 * Bit Group Name: IN1L_TO_MIXOUTL
1691 * Permission : RW
1692 *******************************************************************************/
1693 #define WM8994_OUTMIXER1_IN1L_TO_MIXOUTL_MASK (uint16_t)0x0004
1694 #define WM8994_OUTMIXER1_IN1L_TO_MIXOUTL_POSITION 2
1695 int32_t wm8994_outmixer1_in1l_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1696 
1697 /*******************************************************************************
1698 * Register : WM8994_OUTPUT_MIXER_1
1699 * Address : 0X2D
1700 * Bit Group Name: IN1R_TO_MIXOUTL
1701 * Permission : RW
1702 *******************************************************************************/
1703 #define WM8994_OUTMIXER1_IN1R_TO_MIXOUTL_MASK (uint16_t)0x0008
1704 #define WM8994_OUTMIXER1_IN1R_TO_MIXOUTL_POSITION 3
1705 int32_t wm8994_outmixer1_in1r_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1706 
1707 /*******************************************************************************
1708 * Register : WM8994_OUTPUT_MIXER_1
1709 * Address : 0X2D
1710 * Bit Group Name: IN2LN_TO_MIXOUTL
1711 * Permission : RW
1712 *******************************************************************************/
1713 #define WM8994_OUTMIXER1_IN2LN_TO_MIXOUTL_MASK (uint16_t)0x0010
1714 #define WM8994_OUTMIXER1_IN2LN_TO_MIXOUTL_POSITION 4
1715 int32_t wm8994_outmixer1_in2ln_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1716 
1717 /*******************************************************************************
1718 * Register : WM8994_OUTPUT_MIXER_1
1719 * Address : 0X2D
1720 * Bit Group Name: IN2RN_TO_MIXOUTL
1721 * Permission : RW
1722 *******************************************************************************/
1723 #define WM8994_OUTMIXER1_IN2RN_TO_MIXOUTL_MASK (uint16_t)0x0020
1724 #define WM8994_OUTMIXER1_IN2RN_TO_MIXOUTL_POSITION 5
1725 int32_t wm8994_outmixer1_in2rn_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1726 
1727 /*******************************************************************************
1728 * Register : WM8994_OUTPUT_MIXER_1
1729 * Address : 0X2D
1730 * Bit Group Name: MIXINL_TO_MIXOUTL
1731 * Permission : RW
1732 *******************************************************************************/
1733 #define WM8994_OUTMIXER1_MIXINL_TO_MIXOUTL_MASK (uint16_t)0x0040
1734 #define WM8994_OUTMIXER1_MIXINL_TO_MIXOUTL_POSITION 6
1735 int32_t wm8994_outmixer1_mixinl_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1736 
1737 /*******************************************************************************
1738 * Register : WM8994_OUTPUT_MIXER_1
1739 * Address : 0X2D
1740 * Bit Group Name: MIXINR_TO_MIXOUTL
1741 * Permission : RW
1742 *******************************************************************************/
1743 #define WM8994_OUTMIXER1_MIXINR_TO_MIXOUTL_MASK (uint16_t)0x0080
1744 #define WM8994_OUTMIXER1_MIXINR_TO_MIXOUTL_POSITION 7
1745 int32_t wm8994_outmixer1_mixinr_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value);
1746 
1747 /*******************************************************************************
1748 * Register : WM8994_OUTPUT_MIXER_1
1749 * Address : 0X2D
1750 * Bit Group Name: DAC1L_TO_HPOUT1L
1751 * Permission : RW
1752 *******************************************************************************/
1753 #define WM8994_OUTMIXER1_DAC1L_TO_HPOUT1L_MASK (uint16_t)0x0100
1754 #define WM8994_OUTMIXER1_DAC1L_TO_HPOUT1L_POSITION 8
1755 int32_t wm8994_outmixer1_dac1l_to_hpout1l(wm8994_ctx_t *ctx, uint16_t value);
1756 
1757 /*******************************************************************************
1758 * Register : WM8994_OUTPUT_MIXER_2
1759 * Address : 0X2E
1760 * Bit Group Name: DAC1R_TO_MIXOUTR
1761 * Permission : RW
1762 *******************************************************************************/
1763 #define WM8994_OUTMIXER2_DAC1R_TO_MIXOUTR_MASK (uint16_t)0x0001
1764 #define WM8994_OUTMIXER2_DAC1R_TO_MIXOUTR_POSITION 0
1765 int32_t wm8994_outmixer2_dac1r_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1766 
1767 /*******************************************************************************
1768 * Register : WM8994_OUTPUT_MIXER_2
1769 * Address : 0X2E
1770 * Bit Group Name: IN2RP_TO_MIXOUTR
1771 * Permission : RW
1772 *******************************************************************************/
1773 #define WM8994_OUTMIXER2_IN2RP_TO_MIXOUTR_MASK (uint16_t)0x0002
1774 #define WM8994_OUTMIXER2_IN2RP_TO_MIXOUTR_POSITION 1
1775 int32_t wm8994_outmixer2_in2rp_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1776 
1777 /*******************************************************************************
1778 * Register : WM8994_OUTPUT_MIXER_2
1779 * Address : 0X2E
1780 * Bit Group Name: IN1R_TO_MIXOUTR
1781 * Permission : RW
1782 *******************************************************************************/
1783 #define WM8994_OUTMIXER2_IN1R_TO_MIXOUTR_MASK (uint16_t)0x0004
1784 #define WM8994_OUTMIXER2_IN1R_TO_MIXOUTR_POSITION 2
1785 int32_t wm8994_outmixer2_in1r_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1786 
1787 /*******************************************************************************
1788 * Register : WM8994_OUTPUT_MIXER_2
1789 * Address : 0X2E
1790 * Bit Group Name: IN1L_TO_MIXOUTR
1791 * Permission : RW
1792 *******************************************************************************/
1793 #define WM8994_OUTMIXER2_IN1L_TO_MIXOUTR_MASK (uint16_t)0x0008
1794 #define WM8994_OUTMIXER2_IN1L_TO_MIXOUTR_POSITION 3
1795 int32_t wm8994_outmixer2_in1l_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1796 
1797 /*******************************************************************************
1798 * Register : WM8994_OUTPUT_MIXER_2
1799 * Address : 0X2E
1800 * Bit Group Name: IN2RN_TO_MIXOUTR
1801 * Permission : RW
1802 *******************************************************************************/
1803 #define WM8994_OUTMIXER2_IN2RN_TO_MIXOUTR_MASK (uint16_t)0x0010
1804 #define WM8994_OUTMIXER2_IN2RN_TO_MIXOUTR_POSITION 4
1805 int32_t wm8994_outmixer2_in2rn_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1806 
1807 /*******************************************************************************
1808 * Register : WM8994_OUTPUT_MIXER_2
1809 * Address : 0X2E
1810 * Bit Group Name: IN2LN_TO_MIXOUTR
1811 * Permission : RW
1812 *******************************************************************************/
1813 #define WM8994_OUTMIXER2_IN2LN_TO_MIXOUTR_MASK (uint16_t)0x0020
1814 #define WM8994_OUTMIXER2_IN2LN_TO_MIXOUTR_POSITION 5
1815 int32_t wm8994_outmixer2_in2ln_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1816 
1817 /*******************************************************************************
1818 * Register : WM8994_OUTPUT_MIXER_2
1819 * Address : 0X2E
1820 * Bit Group Name: MIXINR_TO_MIXOUTR
1821 * Permission : RW
1822 *******************************************************************************/
1823 #define WM8994_OUTMIXER2_MIXINR_TO_MIXOUTR_MASK (uint16_t)0x0040
1824 #define WM8994_OUTMIXER2_MIXINR_TO_MIXOUTR_POSITION 6
1825 int32_t wm8994_outmixer2_mixinr_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1826 
1827 /*******************************************************************************
1828 * Register : WM8994_OUTPUT_MIXER_2
1829 * Address : 0X2E
1830 * Bit Group Name: MIXINL_TO_MIXOUTR
1831 * Permission : RW
1832 *******************************************************************************/
1833 #define WM8994_OUTMIXER2_MIXINL_TO_MIXOUTR_MASK (uint16_t)0x0080
1834 #define WM8994_OUTMIXER2_MIXINL_TO_MIXOUTR_POSITION 7
1835 int32_t wm8994_outmixer2_mixinl_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value);
1836 
1837 /*******************************************************************************
1838 * Register : WM8994_OUTPUT_MIXER_2
1839 * Address : 0X2E
1840 * Bit Group Name: DAC1R_TO_HPOUT1R
1841 * Permission : RW
1842 *******************************************************************************/
1843 #define WM8994_OUTMIXER2_DAC1R_TO_HPOUT1R_MASK (uint16_t)0x0100
1844 #define WM8994_OUTMIXER2_DAC1R_TO_HPOUT1R_POSITION 8
1845 int32_t wm8994_outmixer2_dac1r_to_hpout1r(wm8994_ctx_t *ctx, uint16_t value);
1846 
1847 /* Note: Registers (uint16_t)0x2F to (uint16_t)0x35 are not implemented here */
1848 
1849 /*******************************************************************************
1850 * Register : WM8994_SPEAKER_MIXER
1851 * Address : 0X36
1852 * Bit Group Name: DAC1R_TO_SPKMIXR
1853 * Permission : RW
1854 *******************************************************************************/
1855 #define WM8994_SPKMIXER_DAC1R_TO_SPKMIXR_MASK (uint16_t)0x0001
1856 #define WM8994_SPKMIXER_DAC1R_TO_SPKMIXR_POSITION 0
1857 int32_t wm8994_spkmixer_dac1r_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value);
1858 
1859 /*******************************************************************************
1860 * Register : WM8994_SPEAKER_MIXER
1861 * Address : 0X36
1862 * Bit Group Name: DAC1L_TO_SPKMIXL
1863 * Permission : RW
1864 *******************************************************************************/
1865 #define WM8994_SPKMIXER_DAC1L_TO_SPKMIXL_MASK (uint16_t)0x0002
1866 #define WM8994_SPKMIXER_DAC1L_TO_SPKMIXL_POSITION 1
1867 int32_t wm8994_spkmixer_dac1l_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value);
1868 
1869 /*******************************************************************************
1870 * Register : WM8994_SPEAKER_MIXER
1871 * Address : 0X36
1872 * Bit Group Name: MIXOUTR_TO_SPKMIXR
1873 * Permission : RW
1874 *******************************************************************************/
1875 #define WM8994_SPKMIXER_MIXOUTR_TO_SPKMIXR_MASK (uint16_t)0x0004
1876 #define WM8994_SPKMIXER_MIXOUTR_TO_SPKMIXR_POSITION 2
1877 int32_t wm8994_spkmixer_mixoutr_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value);
1878 
1879 /*******************************************************************************
1880 * Register : WM8994_SPEAKER_MIXER
1881 * Address : 0X36
1882 * Bit Group Name: MIXOUTL_TO_SPKMIXL
1883 * Permission : RW
1884 *******************************************************************************/
1885 #define WM8994_SPKMIXER_MIXOUTL_TO_SPKMIXL_MASK (uint16_t)0x0008
1886 #define WM8994_SPKMIXER_MIXOUTL_TO_SPKMIXL_POSITION 3
1887 int32_t wm8994_spkmixer_mixoutl_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value);
1888 
1889 /*******************************************************************************
1890 * Register : WM8994_SPEAKER_MIXER
1891 * Address : 0X36
1892 * Bit Group Name: IN1RP_TO_SPKMIXR
1893 * Permission : RW
1894 *******************************************************************************/
1895 #define WM8994_SPKMIXER_IN1RP_TO_SPKMIXR_MASK (uint16_t)0x0010
1896 #define WM8994_SPKMIXER_IN1RP_TO_SPKMIXR_POSITION 4
1897 int32_t wm8994_spkmixer_in1rp_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value);
1898 
1899 /*******************************************************************************
1900 * Register : WM8994_SPEAKER_MIXER
1901 * Address : 0X36
1902 * Bit Group Name: IN1LP_TO_SPKMIXL
1903 * Permission : RW
1904 *******************************************************************************/
1905 #define WM8994_SPKMIXER_IN1LP_TO_SPKMIXL_MASK (uint16_t)0x0020
1906 #define WM8994_SPKMIXER_IN1LP_TO_SPKMIXL_POSITION 5
1907 int32_t wm8994_spkmixer_in1lp_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value);
1908 
1909 /*******************************************************************************
1910 * Register : WM8994_SPEAKER_MIXER
1911 * Address : 0X36
1912 * Bit Group Name: MIXINR_TO_SPKMIXR
1913 * Permission : RW
1914 *******************************************************************************/
1915 #define WM8994_SPKMIXER_MIXINR_TO_SPKMIXR_MASK (uint16_t)0x0040
1916 #define WM8994_SPKMIXER_MIXINR_TO_SPKMIXR_POSITION 6
1917 int32_t wm8994_spkmixer_mixinr_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value);
1918 
1919 /*******************************************************************************
1920 * Register : WM8994_SPEAKER_MIXER
1921 * Address : 0X36
1922 * Bit Group Name: MIXINL_TO_SPKMIXL
1923 * Permission : RW
1924 *******************************************************************************/
1925 #define WM8994_SPKMIXER_MIXINL_TO_SPKMIXL_MASK (uint16_t)0x0080
1926 #define WM8994_SPKMIXER_MIXINL_TO_SPKMIXL_POSITION 7
1927 int32_t wm8994_spkmixer_mixinl_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value);
1928 
1929 /*******************************************************************************
1930 * Register : WM8994_SPEAKER_MIXER
1931 * Address : 0X36
1932 * Bit Group Name: DAC2R_TO_SPKMIXR
1933 * Permission : RW
1934 *******************************************************************************/
1935 #define WM8994_SPKMIXER_DAC2R_TO_SPKMIXR_MASK (uint16_t)0x0100
1936 #define WM8994_SPKMIXER_DAC2R_TO_SPKMIXR_POSITION 8
1937 int32_t wm8994_spkmixer_dac2r_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value);
1938 
1939 /*******************************************************************************
1940 * Register : WM8994_SPEAKER_MIXER
1941 * Address : 0X36
1942 * Bit Group Name: DAC2L_TO_SPKMIXL
1943 * Permission : RW
1944 *******************************************************************************/
1945 #define WM8994_SPKMIXER_DAC2L_TO_SPKMIXL_MASK (uint16_t)0x0200
1946 #define WM8994_SPKMIXER_DAC2L_TO_SPKMIXL_POSITION 9
1947 int32_t wm8994_spkmixer_dac2l_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value);
1948 
1949 /* Note: Registers (uint16_t)0x37 and (uint16_t)0x38 are not implemented here */
1950 
1951 /*******************************************************************************
1952 * Register : WM8994_ANTIPOP2
1953 * Address : 0X39
1954 * Bit Group Name: VMID_DISCH
1955 * Permission : RW
1956 *******************************************************************************/
1957 #define WM8994_ANTIPOP2_VMID_DISCH_MASK (uint16_t)0x0001
1958 #define WM8994_ANTIPOP2_VMID_DISCH_POSITION 0
1959 int32_t wm8994_antipop2_vmid_disch(wm8994_ctx_t *ctx, uint16_t value);
1960 
1961 /*******************************************************************************
1962 * Register : WM8994_ANTIPOP2
1963 * Address : 0X39
1964 * Bit Group Name: BIAS_SRC
1965 * Permission : RW
1966 *******************************************************************************/
1967 #define WM8994_ANTIPOP2_BIAS_SRC_MASK (uint16_t)0x0002
1968 #define WM8994_ANTIPOP2_BIAS_SRC_POSITION 1
1969 int32_t wm8994_antipop2_bias_src(wm8994_ctx_t *ctx, uint16_t value);
1970 
1971 /*******************************************************************************
1972 * Register : WM8994_ANTIPOP2
1973 * Address : 0X39
1974 * Bit Group Name: STARTUP_BIAS_ENA
1975 * Permission : RW
1976 *******************************************************************************/
1977 #define WM8994_ANTIPOP2_STARTUP_BIAS_ENA_MASK (uint16_t)0x0004
1978 #define WM8994_ANTIPOP2_STARTUP_BIAS_ENA_POSITION 2
1979 int32_t wm8994_antipop2_startup_bias_ena(wm8994_ctx_t *ctx, uint16_t value);
1980 
1981 /*******************************************************************************
1982 * Register : WM8994_ANTIPOP2
1983 * Address : 0X39
1984 * Bit Group Name: VMID_BUF_ENA
1985 * Permission : RW
1986 *******************************************************************************/
1987 #define WM8994_ANTIPOP2_VMID_BUF_ENA_MASK (uint16_t)0x0008
1988 #define WM8994_ANTIPOP2_VMID_BUF_ENA_POSITION 3
1989 int32_t wm8994_antipop2_vmid_buf_ena(wm8994_ctx_t *ctx, uint16_t value);
1990 
1991 /*******************************************************************************
1992 * Register : WM8994_ANTIPOP2
1993 * Address : 0X39
1994 * Bit Group Name: VMID_RAMP[1:0]
1995 * Permission : RW
1996 *******************************************************************************/
1997 #define WM8994_ANTIPOP2_VMID_RAMP_MASK (uint16_t)0x0060
1998 #define WM8994_ANTIPOP2_VMID_RAMP_POSITION 5
1999 int32_t wm8994_antipop2_vmid_ramp(wm8994_ctx_t *ctx, uint16_t value);
2000 
2001 /*******************************************************************************
2002 * Register : WM8994_ANTIPOP2
2003 * Address : 0X39
2004 * Bit Group Name: MICB1_DISCH
2005 * Permission : RW
2006 *******************************************************************************/
2007 #define WM8994_ANTIPOP2_MICB1_DISCH_MASK (uint16_t)0x0080
2008 #define WM8994_ANTIPOP2_MICB1_DISCH_POSITION 7
2009 int32_t wm8994_antipop2_micb1_disch(wm8994_ctx_t *ctx, uint16_t value);
2010 
2011 /*******************************************************************************
2012 * Register : WM8994_ANTIPOP2
2013 * Address : 0X39
2014 * Bit Group Name: MICB2_DISCH
2015 * Permission : RW
2016 *******************************************************************************/
2017 #define WM8994_ANTIPOP2_MICB2_DISCH_MASK (uint16_t)0x0100
2018 #define WM8994_ANTIPOP2_MICB2_DISCH_POSITION 8
2019 int32_t wm8994_antipop2_micb2_disch(wm8994_ctx_t *ctx, uint16_t value);
2020 
2021 
2022 /*******************************************************************************
2023 * Register : WM8994_CHARGE_PUMP1
2024 * Address : 0X4C
2025 * Bit Group Name: CP_ENA
2026 * Permission : RW
2027 *******************************************************************************/
2028 #define WM8994_CHARGE_PUMP1_CP_ENA_MASK (uint16_t)0x8000
2029 #define WM8994_CHARGE_PUMP1_CP_ENA_POSITION 15
2030 int32_t wm8994_charge_pump1_cp_ena(wm8994_ctx_t *ctx, uint16_t value);
2031 
2032 /*******************************************************************************
2033 * Register : WM8994_CHARGE_PUMP2
2034 * Address : 0X4D
2035 * Bit Group Name: CP_DISCH
2036 * Permission : RW
2037 *******************************************************************************/
2038 #define WM8994_CHARGE_PUMP2_CP_DISCH_MASK (uint16_t)0x8000
2039 #define WM8994_CHARGE_PUMP2_CP_DISCH_POSITION 15
2040 int32_t wm8994_charge_pump2_cp_disch(wm8994_ctx_t *ctx, uint16_t value);
2041 
2042 /*******************************************************************************
2043 * Register : WM8994_CLASS_W
2044 * Address : 0X51
2045 * Bit Group Name: CP_DYN_PWR
2046 * Permission : RW
2047 *******************************************************************************/
2048 #define WM8994_CLASS_W_CP_DYN_PWR_MASK (uint16_t)0x0001
2049 #define WM8994_CLASS_W_CP_DYN_PWR_POSITION 0
2050 int32_t wm8994_class_w_cp_dyn_pwr(wm8994_ctx_t *ctx, uint16_t value);
2051 
2052 /*******************************************************************************
2053 * Register : WM8994_CLASS_W
2054 * Address : 0X51
2055 * Bit Group Name: CP_DYN_SRC_SEL [1:0]
2056 * Permission : RW
2057 *******************************************************************************/
2058 #define WM8994_CLASS_W_CP_DYN_SRC_SEL_MASK (uint16_t)0x0300
2059 #define WM8994_CLASS_W_CP_DYN_SRC_SEL_POSITION 8
2060 int32_t wm8994_class_w_cp_dyn_src_sel(wm8994_ctx_t *ctx, uint16_t value);
2061 
2062 /*******************************************************************************
2063 * Register : WM8994_DC_SERVO1
2064 * Address : 0X54
2065 * Bit Group Name: DCS_ENA_CHAN_0
2066 * Permission : RW
2067 *******************************************************************************/
2068 #define WM8994_DC_SERVO1_DCS_ENA_CHAN_0_MASK (uint16_t)0x0001
2069 #define WM8994_DC_SERVO1_DCS_ENA_CHAN_0_POSITION 0
2070 int32_t wm8994_dc_servo1_dcs_ena_chan_0(wm8994_ctx_t *ctx, uint16_t value);
2071 
2072 /*******************************************************************************
2073 * Register : WM8994_DC_SERVO1
2074 * Address : 0X54
2075 * Bit Group Name: DCS_ENA_CHAN_1
2076 * Permission : RW
2077 *******************************************************************************/
2078 #define WM8994_DC_SERVO1_DCS_ENA_CHAN_1_MASK (uint16_t)0x0002
2079 #define WM8994_DC_SERVO1_DCS_ENA_CHAN_1_POSITION 1
2080 int32_t wm8994_dc_servo1_dcs_ena_chan_1(wm8994_ctx_t *ctx, uint16_t value);
2081 
2082 /*******************************************************************************
2083 * Register : WM8994_DC_SERVO1
2084 * Address : 0X54
2085 * Bit Group Name: DCS_TRIG_DAC_WR_0
2086 * Permission : RW
2087 *******************************************************************************/
2088 #define WM8994_DC_SERVO1_DCS_TRIG_DAC_WR_0_MASK (uint16_t)0x0004
2089 #define WM8994_DC_SERVO1_DCS_TRIG_DAC_WR_0_POSITION 2
2090 int32_t wm8994_dc_servo1_dcs_trig_dac_wr_0(wm8994_ctx_t *ctx, uint16_t value);
2091 
2092 /*******************************************************************************
2093 * Register : WM8994_DC_SERVO1
2094 * Address : 0X54
2095 * Bit Group Name: DCS_TRIG_DAC_WR_1
2096 * Permission : RW
2097 *******************************************************************************/
2098 #define WM8994_DC_SERVO1_DCS_TRIG_DAC_WR_1_MASK (uint16_t)0x0008
2099 #define WM8994_DC_SERVO1_DCS_TRIG_DAC_WR_1_POSITION 3
2100 int32_t wm8994_dc_servo1_dcs_trig_dac_wr_1(wm8994_ctx_t *ctx, uint16_t value);
2101 
2102 /*******************************************************************************
2103 * Register : WM8994_DC_SERVO1
2104 * Address : 0X54
2105 * Bit Group Name: DCS_TRIG_STARTUP_0
2106 * Permission : RW
2107 *******************************************************************************/
2108 #define WM8994_DC_SERVO1_DCS_TRIG_STARTUP_0_MASK (uint16_t)0x0010
2109 #define WM8994_DC_SERVO1_DCS_TRIG_STARTUP_0_POSITION 4
2110 int32_t wm8994_dc_servo1_dcs_trig_startup_0(wm8994_ctx_t *ctx, uint16_t value);
2111 
2112 /*******************************************************************************
2113 * Register : WM8994_DC_SERVO1
2114 * Address : 0X54
2115 * Bit Group Name: DCS_TRIG_STARTUP_1
2116 * Permission : RW
2117 *******************************************************************************/
2118 #define WM8994_DC_SERVO1_DCS_TRIG_STARTUP_1_MASK (uint16_t)0x0020
2119 #define WM8994_DC_SERVO1_DCS_TRIG_STARTUP_1_POSITION 5
2120 int32_t wm8994_dc_servo1_dcs_trig_startup_1(wm8994_ctx_t *ctx, uint16_t value);
2121 
2122 /*******************************************************************************
2123 * Register : WM8994_DC_SERVO1
2124 * Address : 0X54
2125 * Bit Group Name: DCS_TRIG_SERIES_0
2126 * Permission : RW
2127 *******************************************************************************/
2128 #define WM8994_DC_SERVO1_DCS_TRIG_SERIES_0_MASK (uint16_t)0x0100
2129 #define WM8994_DC_SERVO1_DCS_TRIG_SERIES_0_POSITION 8
2130 int32_t wm8994_dc_servo1_dcs_trig_series_0(wm8994_ctx_t *ctx, uint16_t value);
2131 
2132 /*******************************************************************************
2133 * Register : WM8994_DC_SERVO1
2134 * Address : 0X54
2135 * Bit Group Name: DCS_TRIG_SERIES_1
2136 * Permission : RW
2137 *******************************************************************************/
2138 #define WM8994_DC_SERVO1_DCS_TRIG_SERIES_1_MASK (uint16_t)0x0200
2139 #define WM8994_DC_SERVO1_DCS_TRIG_SERIES_1_POSITION 9
2140 int32_t wm8994_dc_servo1_dcs_trig_series_1(wm8994_ctx_t *ctx, uint16_t value);
2141 
2142 /*******************************************************************************
2143 * Register : WM8994_DC_SERVO1
2144 * Address : 0X54
2145 * Bit Group Name: DCS_TRIG_SINGLE_0
2146 * Permission : RW
2147 *******************************************************************************/
2148 #define WM8994_DC_SERVO1_DCS_TRIG_SINGLE_0_MASK (uint16_t)0x1000
2149 #define WM8994_DC_SERVO1_DCS_TRIG_SINGLE_0_POSITION 12
2150 int32_t wm8994_dc_servo1_dcs_trig_single_0(wm8994_ctx_t *ctx, uint16_t value);
2151 
2152 /*******************************************************************************
2153 * Register : WM8994_DC_SERVO1
2154 * Address : 0X54
2155 * Bit Group Name: DCS_TRIG_SINGLE_1
2156 * Permission : RW
2157 *******************************************************************************/
2158 #define WM8994_DC_SERVO1_DCS_TRIG_SINGLE_1_MASK (uint16_t)0x2000
2159 #define WM8994_DC_SERVO1_DCS_TRIG_SINGLE_1_POSITION 13
2160 int32_t wm8994_dc_servo1_dcs_trig_single_1(wm8994_ctx_t *ctx, uint16_t value);
2161 
2162 /* Note: Registers (uint16_t)0x55, (uint16_t)0x58 and (uint16_t)0x59 are not implemented here */
2163 
2164 /*******************************************************************************
2165 * Register : WM8994_ANALOG_HP
2166 * Address : 0X60
2167 * Bit Group Name: HPOUT1R_DLY
2168 * Permission : RW
2169 *******************************************************************************/
2170 #define WM8994_ANALOG_HP_HPOUT1R_DLY_MASK (uint16_t)0x0002
2171 #define WM8994_ANALOG_HP_HPOUT1R_DLY_POSITION 1
2172 int32_t wm8994_analog_hp_hpout1r_dly(wm8994_ctx_t *ctx, uint16_t value);
2173 
2174 /*******************************************************************************
2175 * Register : WM8994_ANALOG_HP
2176 * Address : 0X60
2177 * Bit Group Name: HPOUT1R_OUTP
2178 * Permission : RW
2179 *******************************************************************************/
2180 #define WM8994_ANALOG_HP_HPOUT1R_OUTP_MASK (uint16_t)0x0004
2181 #define WM8994_ANALOG_HP_HPOUT1R_OUTP_POSITION 2
2182 int32_t wm8994_analog_hp_hpout1r_outp(wm8994_ctx_t *ctx, uint16_t value);
2183 
2184 /*******************************************************************************
2185 * Register : WM8994_ANALOG_HP
2186 * Address : 0X60
2187 * Bit Group Name: HPOUT1R_RMV_SHORT
2188 * Permission : RW
2189 *******************************************************************************/
2190 #define WM8994_ANALOG_HP_HPOUT1R_RMV_SHORT_MASK (uint16_t)0x0008
2191 #define WM8994_ANALOG_HP_HPOUT1R_RMV_SHORT_POSITION 3
2192 int32_t wm8994_analog_hp_hpout1r_rmv_short(wm8994_ctx_t *ctx, uint16_t value);
2193 
2194 /*******************************************************************************
2195 * Register : WM8994_ANALOG_HP
2196 * Address : 0X60
2197 * Bit Group Name: HPOUT1L_DLY
2198 * Permission : RW
2199 *******************************************************************************/
2200 #define WM8994_ANALOG_HP_HPOUT1L_DLY_MASK (uint16_t)0x0020
2201 #define WM8994_ANALOG_HP_HPOUT1L_DLY_POSITION 5
2202 int32_t wm8994_analog_hp_hpout1l_dly(wm8994_ctx_t *ctx, uint16_t value);
2203 
2204 /*******************************************************************************
2205 * Register : WM8994_ANALOG_HP
2206 * Address : 0X60
2207 * Bit Group Name: HPOUT1L_OUTP
2208 * Permission : RW
2209 *******************************************************************************/
2210 #define WM8994_ANALOG_HP_HPOUT1L_OUTP_MASK (uint16_t)0x0040
2211 #define WM8994_ANALOG_HP_HPOUT1L_OUTP_POSITION 6
2212 int32_t wm8994_analog_hp_hpout1l_outp(wm8994_ctx_t *ctx, uint16_t value);
2213 
2214 /*******************************************************************************
2215 * Register : WM8994_ANALOG_HP
2216 * Address : 0X60
2217 * Bit Group Name: HPOUT1L_RMV_SHORT
2218 * Permission : RW
2219 *******************************************************************************/
2220 #define WM8994_ANALOG_HP_HPOUT1L_RMV_SHORT_MASK (uint16_t)0x0080
2221 #define WM8994_ANALOG_HP_HPOUT1L_RMV_SHORT_POSITION 7
2222 int32_t wm8994_analog_hp_hpout1l_rmv_short(wm8994_ctx_t *ctx, uint16_t value);
2223 
2224 /* Note: Registers (uint16_t)0x100, (uint16_t)0x101 and (uint16_t)0x111 are not implemented here */
2225 
2226 /*******************************************************************************
2227 * Register : WM8994_WRITE_SEQ_CTRL1
2228 * Address : 0X110
2229 * Bit Group Name: WSEQ_START_INDEX [6:0]
2230 * Permission : RW
2231 *******************************************************************************/
2232 #define WM8994_WSEQ_CTRL1_START_INDEX_MASK (uint16_t)0x007F
2233 #define WM8994_WSEQ_CTRL1_START_INDEX_POSITION 0
2234 int32_t wm8994_wseq_ctrl1_start_index(wm8994_ctx_t *ctx, uint16_t value);
2235 
2236 /*******************************************************************************
2237 * Register : WM8994_WRITE_SEQ_CTRL1
2238 * Address : 0X110
2239 * Bit Group Name: WSEQ_START
2240 * Permission : RW
2241 *******************************************************************************/
2242 #define WM8994_WSEQ_CTRL1_START_MASK (uint16_t)0x0100
2243 #define WM8994_WSEQ_CTRL1_START_POSITION 8
2244 int32_t wm8994_wseq_ctrl1_start(wm8994_ctx_t *ctx, uint16_t value);
2245 
2246 /*******************************************************************************
2247 * Register : WM8994_WRITE_SEQ_CTRL1
2248 * Address : 0X110
2249 * Bit Group Name: WSEQ_ABORT
2250 * Permission : RW
2251 *******************************************************************************/
2252 #define WM8994_WSEQ_CTRL1_ABORT_MASK (uint16_t)0x0200
2253 #define WM8994_WSEQ_CTRL1_ABORT_POSITION 9
2254 int32_t wm8994_wseq_ctrl1_abort(wm8994_ctx_t *ctx, uint16_t value);
2255 
2256 /*******************************************************************************
2257 * Register : WM8994_WRITE_SEQ_CTRL1
2258 * Address : 0X110
2259 * Bit Group Name: WSEQ_ENA
2260 * Permission : RW
2261 *******************************************************************************/
2262 #define WM8994_WSEQ_CTRL1_ENA_MASK (uint16_t)0x8000
2263 #define WM8994_WSEQ_CTRL1_ENA_POSITION 15
2264 int32_t wm8994_wseq_ctrl1_ena(wm8994_ctx_t *ctx, uint16_t value);
2265 
2266 /*******************************************************************************
2267 * Register : WM8994_AIF1_CLOCKING1
2268 * Address : 0X200
2269 * Bit Group Name: AIF1CLK_ENA
2270 * Permission : RW
2271 *******************************************************************************/
2272 #define WM8994_AIF1_CLOCKING1_ENA_MASK (uint16_t)0x0001
2273 #define WM8994_AIF1_CLOCKING1_ENA_POSITION 0
2274 int32_t wm8994_aif1_clocking1_ena(wm8994_ctx_t *ctx, uint16_t value);
2275 
2276 /*******************************************************************************
2277 * Register : WM8994_AIF1_CLOCKING1
2278 * Address : 0X200
2279 * Bit Group Name: AIF1CLK_DIV
2280 * Permission : RW
2281 *******************************************************************************/
2282 #define WM8994_AIF1_CLOCKING1_DIV_MASK (uint16_t)0x0002
2283 #define WM8994_AIF1_CLOCKING1_DIV_POSITION 1
2284 int32_t wm8994_aif1_clocking1_div(wm8994_ctx_t *ctx, uint16_t value);
2285 
2286 /*******************************************************************************
2287 * Register : WM8994_AIF1_CLOCKING1
2288 * Address : 0X200
2289 * Bit Group Name: AIF1CLK_INV
2290 * Permission : RW
2291 *******************************************************************************/
2292 #define WM8994_AIF1_CLOCKING1_INV_MASK (uint16_t)0x0004
2293 #define WM8994_AIF1_CLOCKING1_INV_POSITION 2
2294 int32_t wm8994_aif1_clocking1_inv(wm8994_ctx_t *ctx, uint16_t value);
2295 
2296 /*******************************************************************************
2297 * Register : WM8994_AIF1_CLOCKING1
2298 * Address : 0X200
2299 * Bit Group Name: AIF1CLK_SRC [1:0]
2300 * Permission : RW
2301 *******************************************************************************/
2302 #define WM8994_AIF1_CLOCKING1_SRC_MASK (uint16_t)0x0018U
2303 #define WM8994_AIF1_CLOCKING1_SRC_POSITION 3
2304 int32_t wm8994_aif1_clocking1_src(wm8994_ctx_t *ctx, uint16_t value);
2305 
2306 /* Note: Registers (uint16_t)0x201, (uint16_t)0x204 and (uint16_t)0x205 are not implemented here */
2307 
2308 /*******************************************************************************
2309 * Register : WM8994_CLOCKING1
2310 * Address : 0X208
2311 * Bit Group Name: SYSCLK_SRC
2312 * Permission : RW
2313 *******************************************************************************/
2314 #define WM8994_CLOCKING1_SYSCLK_SRC_MASK (uint16_t)0x0001
2315 #define WM8994_CLOCKING1_SYSCLK_SRC_POSITION 0
2316 int32_t wm8994_clocking1_sysclk_src(wm8994_ctx_t *ctx, uint16_t value);
2317 
2318 /*******************************************************************************
2319 * Register : WM8994_CLOCKING1
2320 * Address : 0X208
2321 * Bit Group Name: SYSDSPCLK_ENA
2322 * Permission : RW
2323 *******************************************************************************/
2324 #define WM8994_CLOCKING1_SYSDSPCLK_ENA_MASK (uint16_t)0x0002
2325 #define WM8994_CLOCKING1_SYSDSPCLK_ENA_POSITION 1
2326 int32_t wm8994_clocking1_sysdspclk_ena(wm8994_ctx_t *ctx, uint16_t value);
2327 
2328 /*******************************************************************************
2329 * Register : WM8994_CLOCKING1
2330 * Address : 0X208
2331 * Bit Group Name: AIF2DSPCLK_ENA
2332 * Permission : RW
2333 *******************************************************************************/
2334 #define WM8994_CLOCKING1_AIF2DSPCLK_ENA_MASK (uint16_t)0x0004
2335 #define WM8994_CLOCKING1_AIF2DSPCLK_ENA_POSITION 2
2336 int32_t wm8994_clocking1_aif2dspclk_ena(wm8994_ctx_t *ctx, uint16_t value);
2337 
2338 /*******************************************************************************
2339 * Register : WM8994_CLOCKING1
2340 * Address : 0X208
2341 * Bit Group Name: AIF1DSPCLK_ENA
2342 * Permission : RW
2343 *******************************************************************************/
2344 #define WM8994_CLOCKING1_AIF1DSPCLK_ENA_MASK (uint16_t)0x0008
2345 #define WM8994_CLOCKING1_AIF1DSPCLK_ENA_POSITION 3
2346 int32_t wm8994_clocking1_aif1dspclk_ena(wm8994_ctx_t *ctx, uint16_t value);
2347 
2348 /*******************************************************************************
2349 * Register : WM8994_CLOCKING1
2350 * Address : 0X208
2351 * Bit Group Name: TOCLK_ENA
2352 * Permission : RW
2353 *******************************************************************************/
2354 #define WM8994_CLOCKING1_TOCLK_ENA_MASK (uint16_t)0x0010
2355 #define WM8994_CLOCKING1_TOCLK_ENA_POSITION 4
2356 int32_t wm8994_clocking1_toclk_ena(wm8994_ctx_t *ctx, uint16_t value);
2357 
2358 /*******************************************************************************
2359 * Register : WM8994_CLOCKING2
2360 * Address : 0X209
2361 * Bit Group Name: OPCLK_DIV[2:0]
2362 * Permission : RW
2363 *******************************************************************************/
2364 #define WM8994_CLOCKING2_OPCLK_DIV_MASK (uint16_t)0x0007
2365 #define WM8994_CLOCKING2_OPCLK_DIV_POSITION 0
2366 int32_t wm8994_clocking2_opclk_div(wm8994_ctx_t *ctx, uint16_t value);
2367 
2368 /*******************************************************************************
2369 * Register : WM8994_CLOCKING2
2370 * Address : 0X209
2371 * Bit Group Name: DBCLK_DIV[2:0]
2372 * Permission : RW
2373 *******************************************************************************/
2374 #define WM8994_CLOCKING2_DBCLK_DIV_MASK (uint16_t)0x0070
2375 #define WM8994_CLOCKING2_DBCLK_DIV_POSITION 4
2376 int32_t wm8994_clocking2_dbclk_div(wm8994_ctx_t *ctx, uint16_t value);
2377 
2378 /*******************************************************************************
2379 * Register : WM8994_CLOCKING2
2380 * Address : 0X209
2381 * Bit Group Name: TOCLK_DIV[2:0]
2382 * Permission : RW
2383 *******************************************************************************/
2384 #define WM8994_CLOCKING2_TOCLK_DIV_MASK (uint16_t)0x0700
2385 #define WM8994_CLOCKING2_TOCLK_DIV_POSITION 8
2386 int32_t wm8994_clocking2_toclk_div(wm8994_ctx_t *ctx, uint16_t value);
2387 
2388 /*******************************************************************************
2389 * Register : WM8994_AIF1_RATE
2390 * Address : 0X210
2391 * Bit Group Name: AIF1CLK_RATE [3:0]
2392 * Permission : RW
2393 *******************************************************************************/
2394 #define WM8994_AIF1_CLK_RATE_MASK (uint16_t)0x000F
2395 #define WM8994_AIF1_CLK_RATE_POSITION 0
2396 int32_t wm8994_aif1_clk_rate(wm8994_ctx_t *ctx, uint16_t value);
2397 
2398 /*******************************************************************************
2399 * Register : WM8994_AIF1_RATE
2400 * Address : 0X210
2401 * Bit Group Name: AIF1_SR [3:0]
2402 * Permission : RW
2403 *******************************************************************************/
2404 #define WM8994_AIF1_SR_MASK (uint16_t)0x00F0
2405 #define WM8994_AIF1_SR_POSITION 4
2406 int32_t wm8994_aif1_sr(wm8994_ctx_t *ctx, uint16_t value);
2407 int32_t wm8994_aif1_sr_r(wm8994_ctx_t *ctx, uint16_t *value);
2408 
2409 /* Note: Registers (uint16_t)0x211, (uint16_t)0x212, (uint16_t)0x220, (uint16_t)0x221, (uint16_t)0x222, (uint16_t)0x223, (uint16_t)0x224,
2410  (uint16_t)0x240, (uint16_t)0x241, (uint16_t)0x242, (uint16_t)0x243 and (uint16_t)0x244 are not implemented here */
2411 
2412 /*******************************************************************************
2413 * Register : WM8994_AIF1_CONTROL1
2414 * Address : 0X300
2415 * Bit Group Name: AIF1_FMT [1:0]
2416 * Permission : RW
2417 *******************************************************************************/
2418 #define WM8994_AIF1_CONTROL1_FMT_MASK (uint16_t)0x0018U
2419 #define WM8994_AIF1_CONTROL1_FMT_POSITION 3
2420 int32_t wm8994_aif1_control1_fmt(wm8994_ctx_t *ctx, uint16_t value);
2421 int32_t wm8994_aif1_control1_fmt_r(wm8994_ctx_t *ctx, uint16_t *value);
2422 
2423 /*******************************************************************************
2424 * Register : WM8994_AIF1_CONTROL1
2425 * Address : 0X300
2426 * Bit Group Name: AIF1_WL [1:0]
2427 * Permission : RW
2428 *******************************************************************************/
2429 #define WM8994_AIF1_CONTROL1_WL_MASK (uint16_t)0x0060
2430 #define WM8994_AIF1_CONTROL1_WL_POSITION 5
2431 int32_t wm8994_aif1_control1_wl(wm8994_ctx_t *ctx, uint16_t value);
2432 int32_t wm8994_aif1_control1_wl_r(wm8994_ctx_t *ctx, uint16_t *value);
2433 /*******************************************************************************
2434 * Register : WM8994_AIF1_CONTROL1
2435 * Address : 0X300
2436 * Bit Group Name: AIF1_LRCLK_INV
2437 * Permission : RW
2438 *******************************************************************************/
2439 #define WM8994_AIF1_CONTROL1_LRCLK_INV_MASK (uint16_t)0x0080
2440 #define WM8994_AIF1_CONTROL1_LRCLK_INV_POSITION 7
2441 int32_t wm8994_aif1_control1_lrclk_inv(wm8994_ctx_t *ctx, uint16_t value);
2442 
2443 /*******************************************************************************
2444 * Register : WM8994_AIF1_CONTROL1
2445 * Address : 0X300
2446 * Bit Group Name: AIF1_BCLK_INV
2447 * Permission : RW
2448 *******************************************************************************/
2449 #define WM8994_AIF1_CONTROL1_BCLK_INV_MASK (uint16_t)0x0100
2450 #define WM8994_AIF1_CONTROL1_BCLK_INV_POSITION 8
2451 int32_t wm8994_aif1_control1_bclk_inv(wm8994_ctx_t *ctx, uint16_t value);
2452 
2453 /*******************************************************************************
2454 * Register : WM8994_AIF1_CONTROL1
2455 * Address : 0X300
2456 * Bit Group Name: AIF1ADC_TDM
2457 * Permission : RW
2458 *******************************************************************************/
2459 #define WM8994_AIF1_CONTROL1_ADC_TDM_MASK (uint16_t)0x2000
2460 #define WM8994_AIF1_CONTROL1_ADC_TDM_POSITION 13
2461 int32_t wm8994_aif1_control1_adc_tdm(wm8994_ctx_t *ctx, uint16_t value);
2462 
2463 /*******************************************************************************
2464 * Register : WM8994_AIF1_CONTROL1
2465 * Address : 0X300
2466 * Bit Group Name: AIF1ADCR_SRC
2467 * Permission : RW
2468 *******************************************************************************/
2469 #define WM8994_AIF1_CONTROL1_ADCR_SRC_MASK (uint16_t)0x4000
2470 #define WM8994_AIF1_CONTROL1_ADCR_SRC_POSITION 14
2471 int32_t wm8994_aif1_control1_adcr_src(wm8994_ctx_t *ctx, uint16_t value);
2472 
2473 /*******************************************************************************
2474 * Register : WM8994_AIF1_CONTROL1
2475 * Address : 0X300
2476 * Bit Group Name: AIF1ADCL_SRC
2477 * Permission : RW
2478 *******************************************************************************/
2479 #define WM8994_AIF1_CONTROL1_ADCL_SRC_MASK (uint16_t)0x8000
2480 #define WM8994_AIF1_CONTROL1_ADCL_SRC_POSITION 15
2481 int32_t wm8994_aif1_control1_adcl_src(wm8994_ctx_t *ctx, uint16_t value);
2482 
2483 /*******************************************************************************
2484 * Register : WM8994_AIF1_MASTER_SLAVE
2485 * Address : 0X302
2486 * Bit Group Name: AIF1_LRCLK_FRC
2487 * Permission : RW
2488 *******************************************************************************/
2489 #define WM8994_AIF1_MS_LRCLK_FRC_MASK (uint16_t)0x1000
2490 #define WM8994_AIF1_MS_LRCLK_FRC_POSITION 12
2491 int32_t wm8994_aif1_ms_lrclk_frc(wm8994_ctx_t *ctx, uint16_t value);
2492 
2493 /*******************************************************************************
2494 * Register : WM8994_AIF1_MASTER_SLAVE
2495 * Address : 0X302
2496 * Bit Group Name: AIF1_CLK_FRC
2497 * Permission : RW
2498 *******************************************************************************/
2499 #define WM8994_AIF1_MS_CLK_FRC_MASK (uint16_t)0x2000
2500 #define WM8994_AIF1_MS_CLK_FRC_POSITION 13
2501 int32_t wm8994_aif1_ms_clk_frc(wm8994_ctx_t *ctx, uint16_t value);
2502 
2503 /*******************************************************************************
2504 * Register : WM8994_AIF1_MASTER_SLAVE
2505 * Address : 0X302
2506 * Bit Group Name: AIF1_MSTR
2507 * Permission : RW
2508 *******************************************************************************/
2509 #define WM8994_AIF1_MS_MSTR_MASK (uint16_t)0x4000
2510 #define WM8994_AIF1_MS_MSTR_POSITION 14
2511 int32_t wm8994_aif1_ms_mstr(wm8994_ctx_t *ctx, uint16_t value);
2512 
2513 /*******************************************************************************
2514 * Register : WM8994_AIF1_MASTER_SLAVE
2515 * Address : 0X302
2516 * Bit Group Name: AIF1_TRI
2517 * Permission : RW
2518 *******************************************************************************/
2519 #define WM8994_AIF1_MS_TRI_MASK (uint16_t)0x8000
2520 #define WM8994_AIF1_MS_TRI_POSITION 15
2521 int32_t wm8994_aif1_ms_tri(wm8994_ctx_t *ctx, uint16_t value);
2522 
2523 /* Note: Registers (uint16_t)0x301, (uint16_t)0x303, (uint16_t)0x304, (uint16_t)0x305, (uint16_t)0x306, (uint16_t)0x307, (uint16_t)0x310, (uint16_t)0x311,
2524  (uint16_t)0x312, (uint16_t)0x313, (uint16_t)0x314, (uint16_t)0x315, (uint16_t)0x316 and (uint16_t)0x317 are not implemented here */
2525 
2526 /*******************************************************************************
2527 * Register : WM8994_AIF1_ADC1_LEFT_VOL
2528 * Address : 0X400
2529 * Bit Group Name: AIF1ADC1L_VOL [7:0]
2530 * Permission : RW
2531 *******************************************************************************/
2532 #define WM8994_AIF1_ADC1_LEFT_VOL_ADC1L_MASK (uint16_t)0x00FF
2533 #define WM8994_AIF1_ADC1_LEFT_VOL_ADC1L_POSITION 0
2534 int32_t wm8994_aif1_adc1_left_vol_adc1l(wm8994_ctx_t *ctx, uint16_t value);
2535 int32_t wm8994_aif1_adc1_left_vol_adc1l_r(wm8994_ctx_t *ctx, uint16_t *value);
2536 
2537 /*******************************************************************************
2538 * Register : WM8994_AIF1_ADC1_LEFT_VOL
2539 * Address : 0X400
2540 * Bit Group Name: AIF1ADC1L_VU
2541 * Permission : RW
2542 *******************************************************************************/
2543 #define WM8994_AIF1_ADC1_LEFT_VOL_VU_MASK (uint16_t)0x0100
2544 #define WM8994_AIF1_ADC1_LEFT_VOL_VU_POSITION 8
2545 int32_t wm8994_aif1_adc1_left_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
2546 
2547 /*******************************************************************************
2548 * Register : WM8994_AIF1_ADC1_RIGHT_VOL
2549 * Address : 0X401
2550 * Bit Group Name: AIF1ADC1R_VOL [7:0]
2551 * Permission : RW
2552 *******************************************************************************/
2553 #define WM8994_AIF1_ADC1_RIGHT_VOL_ADC1R_MASK (uint16_t)0x00FF
2554 #define WM8994_AIF1_ADC1_RIGHT_VOL_ADC1R_POSITION 0
2555 int32_t wm8994_aif1_adc1_right_vol_adc1r(wm8994_ctx_t *ctx, uint16_t value);
2556 
2557 /*******************************************************************************
2558 * Register : WM8994_AIF1_ADC1_RIGHT_VOL
2559 * Address : 0X401
2560 * Bit Group Name: AIF1ADC1R_VU
2561 * Permission : RW
2562 *******************************************************************************/
2563 #define WM8994_AIF1_ADC1_RIGHT_VOL_VU_MASK (uint16_t)0x0100
2564 #define WM8994_AIF1_ADC1_RIGHT_VOL_VU_POSITION 8
2565 int32_t wm8994_aif1_adc1_right_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
2566 
2567 /*******************************************************************************
2568 * Register : WM8994_AIF1_ADC2_LEFT_VOL
2569 * Address : 0X404
2570 * Bit Group Name: AIF1ADC2L_VOL [7:0]
2571 * Permission : RW
2572 *******************************************************************************/
2573 #define WM8994_AIF1_ADC2_LEFT_VOL_ADC2L_MASK (uint16_t)0x00FF
2574 #define WM8994_AIF1_ADC2_LEFT_VOL_ADC2L_POSITION 0
2575 int32_t wm8994_aif1_adc2_left_vol_adc2l(wm8994_ctx_t *ctx, uint16_t value);
2576 
2577 /*******************************************************************************
2578 * Register : WM8994_AIF1_ADC2_LEFT_VOL
2579 * Address : 0X404
2580 * Bit Group Name: AIF1ADC2L_VU
2581 * Permission : RW
2582 *******************************************************************************/
2583 #define WM8994_AIF1_ADC2_LEFT_VOL_VU_MASK (uint16_t)0x0100
2584 #define WM8994_AIF1_ADC2_LEFT_VOL_VU_POSITION 8
2585 int32_t wm8994_aif1_adc2_left_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
2586 
2587 /*******************************************************************************
2588 * Register : WM8994_AIF1_ADC2_RIGHT_VOL
2589 * Address : 0X405
2590 * Bit Group Name: AIF1ADC2R_VOL [7:0]
2591 * Permission : RW
2592 *******************************************************************************/
2593 #define WM8994_AIF1_ADC2_RIGHT_VOL_ADC2R_MASK (uint16_t)0x00FF
2594 #define WM8994_AIF1_ADC2_RIGHT_VOL_ADC2R_POSITION 0
2595 int32_t wm8994_aif1_adc2_right_vol_adc2r(wm8994_ctx_t *ctx, uint16_t value);
2596 
2597 /*******************************************************************************
2598 * Register : WM8994_AIF1_ADC2_RIGHT_VOL
2599 * Address : 0X405
2600 * Bit Group Name: AIF1ADC2R_VU
2601 * Permission : RW
2602 *******************************************************************************/
2603 #define WM8994_AIF1_ADC2_RIGHT_VOL_VU_MASK (uint16_t)0x0100
2604 #define WM8994_AIF1_ADC2_RIGHT_VOL_VU_POSITION 8
2605 int32_t wm8994_aif1_adc2_right_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
2606 
2607 /* Note: Registers (uint16_t)0x402, (uint16_t)0x403, (uint16_t)0x406 and (uint16_t)0x407 are not implemented here */
2608 
2609 /*******************************************************************************
2610 * Register : WM8994_AIF1_ADC1_FILTERS
2611 * Address : 0X410
2612 * Bit Group Name: AIF1ADC1R_HPF
2613 * Permission : RW
2614 *******************************************************************************/
2615 #define WM8994_AIF1_ADC1_FILTERS_ADC1R_HPF_MASK (uint16_t)0x0800
2616 #define WM8994_AIF1_ADC1_FILTERS_ADC1R_HPF_POSITION 11
2617 int32_t wm8994_aif1_adc1_filters_adc1r_hpf(wm8994_ctx_t *ctx, uint16_t value);
2618 
2619 /*******************************************************************************
2620 * Register : WM8994_AIF1_ADC1_FILTERS
2621 * Address : 0X410
2622 * Bit Group Name: AIF1ADC1L_HPF
2623 * Permission : RW
2624 *******************************************************************************/
2625 #define WM8994_AIF1_ADC1_FILTERS_ADC1L_HPF_MASK (uint16_t)0x1000
2626 #define WM8994_AIF1_ADC1_FILTERS_ADC1L_HPF_POSITION 12
2627 int32_t wm8994_aif1_adc1_filters_adc1l_hpf(wm8994_ctx_t *ctx, uint16_t value);
2628 
2629 /*******************************************************************************
2630 * Register : WM8994_AIF1_ADC1_FILTERS
2631 * Address : 0X410
2632 * Bit Group Name: AIF1ADC1_HPF_CUT[1:0]
2633 * Permission : RW
2634 *******************************************************************************/
2635 #define WM8994_AIF1_ADC1_FILTERS_HPF_CUT_MASK (uint16_t)0x6000
2636 #define WM8994_AIF1_ADC1_FILTERS_HPF_CUT_POSITION 13
2637 int32_t wm8994_aif1_adc1_filters_hpf_cut(wm8994_ctx_t *ctx, uint16_t value);
2638 
2639 /*******************************************************************************
2640 * Register : WM8994_AIF1_ADC1_FILTERS
2641 * Address : 0X410
2642 * Bit Group Name: AIF1ADC_4FS
2643 * Permission : RW
2644 *******************************************************************************/
2645 #define WM8994_AIF1_ADC1_FILTERS_4FS_MASK (uint16_t)0x8000
2646 #define WM8994_AIF1_ADC1_FILTERS_4FS_POSITION 15
2647 int32_t wm8994_aif1_adc1_filters_4fs(wm8994_ctx_t *ctx, uint16_t value);
2648 
2649 /*******************************************************************************
2650 * Register : WM8994_AIF1_ADC2_FILTERS
2651 * Address : 0X411
2652 * Bit Group Name: AIF1ADC2R_HPF
2653 * Permission : RW
2654 *******************************************************************************/
2655 #define WM8994_AIF1_ADC2_FILTERS_ADC2R_HPF_MASK (uint16_t)0x0800
2656 #define WM8994_AIF1_ADC2_FILTERS_ADC2R_HPF_POSITION 11
2657 int32_t wm8994_aif1_adc2_filters_adc2r_hpf(wm8994_ctx_t *ctx, uint16_t value);
2658 
2659 /*******************************************************************************
2660 * Register : WM8994_AIF1_ADC2_FILTERS
2661 * Address : 0X411
2662 * Bit Group Name: AIF1ADC2L_HPF
2663 * Permission : RW
2664 *******************************************************************************/
2665 #define WM8994_AIF1_ADC2_FILTERS_ADC2L_HPF_MASK (uint16_t)0x1000
2666 #define WM8994_AIF1_ADC2_FILTERS_ADC2L_HPF_POSITION 12
2667 int32_t wm8994_aif1_adc2_filters_adc2l_hpf(wm8994_ctx_t *ctx, uint16_t value);
2668 
2669 /*******************************************************************************
2670 * Register : WM8994_AIF1_ADC2_FILTERS
2671 * Address : 0X411
2672 * Bit Group Name: AIF1ADC2_HPF_CUT[1:0]
2673 * Permission : RW
2674 *******************************************************************************/
2675 #define WM8994_AIF1_ADC2_FILTERS_HPF_CUT_MASK (uint16_t)0x6000
2676 #define WM8994_AIF1_ADC2_FILTERS_HPF_CUT_POSITION 13
2677 int32_t wm8994_aif1_adc2_filters_hpf_cut(wm8994_ctx_t *ctx, uint16_t value);
2678 
2679 /*******************************************************************************
2680 * Register : WM8994_AIF1_ADC2_FILTERS
2681 * Address : 0X411
2682 * Bit Group Name: AIF1ADC_4FS
2683 * Permission : RW
2684 *******************************************************************************/
2685 #define WM8994_AIF1_ADC2_FILTERS_4FS_MASK (uint16_t)0x8000
2686 #define WM8994_AIF1_ADC2_FILTERS_4FS_POSITION 15
2687 int32_t wm8994_aif1_adc2_filters_4fs(wm8994_ctx_t *ctx, uint16_t value);
2688 
2689 /*******************************************************************************
2690 * Register : WM8994_AIF1_DAC1_FILTER1
2691 * Address : 0X420
2692 * Bit Group Name: AIF1DAC1_DEEMP [1:0]
2693 * Permission : RW
2694 *******************************************************************************/
2695 #define WM8994_AIF1_DAC1_FILTER1_DEEMP_MASK (uint16_t)0x0006
2696 #define WM8994_AIF1_DAC1_FILTER1_DEEMP_POSITION 1
2697 int32_t wm8994_aif1_dac1_filter1_deemp(wm8994_ctx_t *ctx, uint16_t value);
2698 
2699 /*******************************************************************************
2700 * Register : WM8994_AIF1_DAC1_FILTER1
2701 * Address : 0X420
2702 * Bit Group Name: AIF1DAC1_UNMUTE_RAMP
2703 * Permission : RW
2704 *******************************************************************************/
2705 #define WM8994_AIF1_DAC1_FILTER1_UNMUTE_RAMP_MASK (uint16_t)0x0010
2706 #define WM8994_AIF1_DAC1_FILTER1_UNMUTE_RAMP_POSITION 4
2707 int32_t wm8994_aif1_dac1_filter1_unmute_ramp(wm8994_ctx_t *ctx, uint16_t value);
2708 
2709 /*******************************************************************************
2710 * Register : WM8994_AIF1_DAC1_FILTER1
2711 * Address : 0X420
2712 * Bit Group Name: AIF1DAC1_MUTERATE
2713 * Permission : RW
2714 *******************************************************************************/
2715 #define WM8994_AIF1_DAC1_FILTER1_MUTERATE_MASK (uint16_t)0x0020
2716 #define WM8994_AIF1_DAC1_FILTER1_MUTERATE_POSITION 5
2717 int32_t wm8994_aif1_dac1_filter1_muterate(wm8994_ctx_t *ctx, uint16_t value);
2718 
2719 /*******************************************************************************
2720 * Register : WM8994_AIF1_DAC1_FILTER1
2721 * Address : 0X420
2722 * Bit Group Name: AIF1DAC1_MONO
2723 * Permission : RW
2724 *******************************************************************************/
2725 #define WM8994_AIF1_DAC1_FILTER1_MONO_MASK (uint16_t)0x0080
2726 #define WM8994_AIF1_DAC1_FILTER1_MONO_POSITION 7
2727 int32_t wm8994_aif1_dac1_filter1_mono(wm8994_ctx_t *ctx, uint16_t value);
2728 
2729 /*******************************************************************************
2730 * Register : WM8994_AIF1_DAC1_FILTER1
2731 * Address : 0X420
2732 * Bit Group Name: AIF1DAC1_MUTE
2733 * Permission : RW
2734 *******************************************************************************/
2735 #define WM8994_AIF1_DAC1_FILTER1_MUTE_MASK (uint16_t)0x0200
2736 #define WM8994_AIF1_DAC1_FILTER1_MUTE_POSITION 9
2737 int32_t wm8994_aif1_dac1_filter1_mute(wm8994_ctx_t *ctx, uint16_t value);
2738 
2739 /*******************************************************************************
2740 * Register : WM8994_AIF1_DAC1_FILTER1
2741 * Address : 0X422
2742 * Bit Group Name: AIF1DAC1_DEEMP [1:0]
2743 * Permission : RW
2744 *******************************************************************************/
2745 #define WM8994_AIF1_DAC2_FILTER1_DEEMP_MASK (uint16_t)0x0006
2746 #define WM8994_AIF1_DAC2_FILTER1_DEEMP_POSITION 1
2747 int32_t wm8994_aif1_dac2_filter1_deemp(wm8994_ctx_t *ctx, uint16_t value);
2748 
2749 /*******************************************************************************
2750 * Register : WM8994_AIF1_DAC1_FILTER1
2751 * Address : 0X422
2752 * Bit Group Name: AIF1DAC1_UNMUTE_RAMP
2753 * Permission : RW
2754 *******************************************************************************/
2755 #define WM8994_AIF1_DAC2_FILTER1_UNMUTE_RAMP_MASK (uint16_t)0x0010
2756 #define WM8994_AIF1_DAC2_FILTER1_UNMUTE_RAMP_POSITION 4
2757 int32_t wm8994_aif1_dac2_filter1_unmute_ramp(wm8994_ctx_t *ctx, uint16_t value);
2758 
2759 /*******************************************************************************
2760 * Register : WM8994_AIF1_DAC1_FILTER1
2761 * Address : 0X422
2762 * Bit Group Name: AIF1DAC1_MUTERATE
2763 * Permission : RW
2764 *******************************************************************************/
2765 #define WM8994_AIF1_DAC2_FILTER1_MUTERATE_MASK (uint16_t)0x0020
2766 #define WM8994_AIF1_DAC2_FILTER1_MUTERATE_POSITION 5
2767 int32_t wm8994_aif1_dac2_filter1_muterate(wm8994_ctx_t *ctx, uint16_t value);
2768 
2769 /*******************************************************************************
2770 * Register : WM8994_AIF1_DAC1_FILTER1
2771 * Address : 0X422
2772 * Bit Group Name: AIF1DAC1_MONO
2773 * Permission : RW
2774 *******************************************************************************/
2775 #define WM8994_AIF1_DAC2_FILTER1_MONO_MASK (uint16_t)0x0080
2776 #define WM8994_AIF1_DAC2_FILTER1_MONO_POSITION 7
2777 int32_t wm8994_aif1_dac2_filter1_mono(wm8994_ctx_t *ctx, uint16_t value);
2778 
2779 /*******************************************************************************
2780 * Register : WM8994_AIF1_DAC1_FILTER1
2781 * Address : 0X422
2782 * Bit Group Name: AIF1DAC1_MUTE
2783 * Permission : RW
2784 *******************************************************************************/
2785 #define WM8994_AIF1_DAC2_FILTER1_MUTE_MASK (uint16_t)0x0200
2786 #define WM8994_AIF1_DAC2_FILTER1_MUTE_POSITION 9
2787 int32_t wm8994_aif1_dac2_filter1_mute(wm8994_ctx_t *ctx, uint16_t value);
2788 
2789 /*******************************************************************************
2790 * Register : WM8994_AIF1_DRC1
2791 * Address : 0X440
2792 * Bit Group Name: AIF1ADC1R_DRC_ENA
2793 * Permission : RW
2794 *******************************************************************************/
2795 #define WM8994_AIF1DRC1_ADC1R_DRC_ENA_MASK (uint16_t)0x0001
2796 #define WM8994_AIF1DRC1_ADC1R_DRC_ENA_POSITION 0
2797 int32_t wm8994_aif1drc1_adc1r_drc_ena(wm8994_ctx_t *ctx, uint16_t value);
2798 
2799 /*******************************************************************************
2800 * Register : WM8994_AIF1_DRC1
2801 * Address : 0X440
2802 * Bit Group Name: AIF1ADC1L_DRC_ENA
2803 * Permission : RW
2804 *******************************************************************************/
2805 #define WM8994_AIF1DRC1_ADC1L_DRC_ENA_MASK (uint16_t)0x0002
2806 #define WM8994_AIF1DRC1_ADC1L_DRC_ENA_POSITION 1
2807 int32_t wm8994_aif1drc1_adc1l_drc_ena(wm8994_ctx_t *ctx, uint16_t value);
2808 
2809 /*******************************************************************************
2810 * Register : WM8994_AIF1_DRC1
2811 * Address : 0X440
2812 * Bit Group Name: AIF1DAC1_DRC_ENA
2813 * Permission : RW
2814 *******************************************************************************/
2815 #define WM8994_AIF1DRC1_DAC1_DRC_ENA_MASK (uint16_t)0x0004
2816 #define WM8994_AIF1DRC1_DAC1_DRC_ENA_POSITION 2
2817 int32_t wm8994_aif1drc1_dac1_drc_ena(wm8994_ctx_t *ctx, uint16_t value);
2818 
2819 /*******************************************************************************
2820 * Register : WM8994_AIF1_DRC1
2821 * Address : 0X440
2822 * Bit Group Name: AIF1DRC1_ANTICLIP
2823 * Permission : RW
2824 *******************************************************************************/
2825 #define WM8994_AIF1DRC1_ANTICLIP_MASK (uint16_t)0x0008
2826 #define WM8994_AIF1DRC1_ANTICLIP_POSITION 3
2827 int32_t wm8994_aif1drc1_anticlip(wm8994_ctx_t *ctx, uint16_t value);
2828 
2829 /*******************************************************************************
2830 * Register : WM8994_AIF1_DRC1
2831 * Address : 0X440
2832 * Bit Group Name: AIF1DRC1_QR
2833 * Permission : RW
2834 *******************************************************************************/
2835 #define WM8994_AIF1DRC1_QR_MASK (uint16_t)0x0010
2836 #define WM8994_AIF1DRC1_QR_POSITION 4
2837 int32_t wm8994_aif1drc1_qr(wm8994_ctx_t *ctx, uint16_t value);
2838 
2839 /*******************************************************************************
2840 * Register : WM8994_AIF1_DRC1
2841 * Address : 0X440
2842 * Bit Group Name: AIF1DRC1_KNEE2_OP_ENA
2843 * Permission : RW
2844 *******************************************************************************/
2845 #define WM8994_AIF1DRC1_KNEE2_OP_ENA_MASK (uint16_t)0x0020
2846 #define WM8994_AIF1DRC1_KNEE2_OP_ENA_POSITION 5
2847 int32_t wm8994_aif1drc1_knee2_op_ena(wm8994_ctx_t *ctx, uint16_t value);
2848 
2849 /*******************************************************************************
2850 * Register : WM8994_AIF1_DRC1
2851 * Address : 0X440
2852 * Bit Group Name: AIF1DRC1_SIG_DET
2853 * Permission : RW
2854 *******************************************************************************/
2855 #define WM8994_AIF1DRC1_SIG_DET_MASK (uint16_t)0x0040
2856 #define WM8994_AIF1DRC1_SIG_DET_POSITION 6
2857 int32_t wm8994_aif1drc1_sig_det(wm8994_ctx_t *ctx, uint16_t value);
2858 
2859 /*******************************************************************************
2860 * Register : WM8994_AIF1_DRC1
2861 * Address : 0X440
2862 * Bit Group Name: AIF1DRC1_SIG_DET_MODE
2863 * Permission : RW
2864 *******************************************************************************/
2865 #define WM8994_AIF1DRC1_SIG_DET_MODE_MASK (uint16_t)0x0080
2866 #define WM8994_AIF1DRC1_SIG_DET_MODE_POSITION 7
2867 int32_t wm8994_aif1drc1_sig_det_mode(wm8994_ctx_t *ctx, uint16_t value);
2868 
2869 /*******************************************************************************
2870 * Register : WM8994_AIF1_DRC1
2871 * Address : 0X440
2872 * Bit Group Name: AIF1DRC1_NG_ENA
2873 * Permission : RW
2874 *******************************************************************************/
2875 #define WM8994_AIF1DRC1_NG_ENA_MASK (uint16_t)0x0100
2876 #define WM8994_AIF1DRC1_NG_ENA_POSITION 8
2877 int32_t wm8994_aif1drc1_ng_ena(wm8994_ctx_t *ctx, uint16_t value);
2878 
2879 /*******************************************************************************
2880 * Register : WM8994_AIF1_DRC1
2881 * Address : 0X440
2882 * Bit Group Name: AIF1DRC1_SIG_DET_PK[1:0]
2883 * Permission : RW
2884 *******************************************************************************/
2885 #define WM8994_AIF1DRC1_SIG_DET_PK_MASK (uint16_t)0x0600
2886 #define WM8994_AIF1DRC1_SIG_DET_PK_POSITION 9
2887 int32_t wm8994_aif1drc1_sig_det_pk(wm8994_ctx_t *ctx, uint16_t value);
2888 
2889 /*******************************************************************************
2890 * Register : WM8994_AIF1_DRC1
2891 * Address : 0X440
2892 * Bit Group Name: AIF1DRC1_SIG_DET_RMS[4:0]
2893 * Permission : RW
2894 *******************************************************************************/
2895 #define WM8994_AIF1DRC1_SIG_DET_RMS_MASK (uint16_t)0xF800
2896 #define WM8994_AIF1DRC1_SIG_DET_RMS_POSITION 11
2897 int32_t wm8994_aif1drc1_sig_det_rms(wm8994_ctx_t *ctx, uint16_t value);
2898 
2899 /* Note: Registers (uint16_t)0x0421, (uint16_t)0x0423, and (uint16_t)0x0441 to (uint16_t)0x0444 are not implemented here */
2900 
2901 
2902 /*******************************************************************************
2903 * Register : WM8994_AIF1_DRC2
2904 * Address : 0X450
2905 * Bit Group Name: AIF1ADC2R_DRC_ENA
2906 * Permission : RW
2907 *******************************************************************************/
2908 #define WM8994_AIF1DRC2_ADC2R_DRC_ENA_MASK (uint16_t)0x0001
2909 #define WM8994_AIF1DRC2_ADC2R_DRC_ENA_POSITION 0
2910 int32_t wm8994_aif1drc2_adc2r_drc_ena(wm8994_ctx_t *ctx, uint16_t value);
2911 
2912 /*******************************************************************************
2913 * Register : WM8994_AIF1_DRC2
2914 * Address : 0X450
2915 * Bit Group Name: AIF1ADC2L_DRC_ENA
2916 * Permission : RW
2917 *******************************************************************************/
2918 #define WM8994_AIF1DRC2_ADC2L_DRC_ENA_MASK (uint16_t)0x0002
2919 #define WM8994_AIF1DRC2_ADC2L_DRC_ENA_POSITION 1
2920 int32_t wm8994_aif1drc2_adc2l_drc_ena(wm8994_ctx_t *ctx, uint16_t value);
2921 
2922 /*******************************************************************************
2923 * Register : WM8994_AIF1_DRC2
2924 * Address : 0X450
2925 * Bit Group Name: AIF1DAC2_DRC_ENA
2926 * Permission : RW
2927 *******************************************************************************/
2928 #define WM8994_AIF1DRC2_DAC2_DRC_ENA_MASK (uint16_t)0x0004
2929 #define WM8994_AIF1DRC2_DAC2_DRC_ENA_POSITION 2
2930 int32_t wm8994_aif1drc2_dac2_drc_ena(wm8994_ctx_t *ctx, uint16_t value);
2931 
2932 /*******************************************************************************
2933 * Register : WM8994_AIF1_DRC2
2934 * Address : 0X450
2935 * Bit Group Name: AIF1DRC2_ANTICLIP
2936 * Permission : RW
2937 *******************************************************************************/
2938 #define WM8994_AIF1DRC2_ANTICLIP_MASK (uint16_t)0x0008
2939 #define WM8994_AIF1DRC2_ANTICLIP_POSITION 3
2940 int32_t wm8994_aif1drc2_anticlip(wm8994_ctx_t *ctx, uint16_t value);
2941 
2942 /*******************************************************************************
2943 * Register : WM8994_AIF1_DRC2
2944 * Address : 0X450
2945 * Bit Group Name: AIF1DRC2_QR
2946 * Permission : RW
2947 *******************************************************************************/
2948 #define WM8994_AIF1DRC2_QR_MASK (uint16_t)0x0010
2949 #define WM8994_AIF1DRC2_QR_POSITION 4
2950 int32_t wm8994_aif1drc2_qr(wm8994_ctx_t *ctx, uint16_t value);
2951 
2952 /*******************************************************************************
2953 * Register : WM8994_AIF1_DRC2
2954 * Address : 0X450
2955 * Bit Group Name: AIF1DRC2_KNEE2_OP_ENA
2956 * Permission : RW
2957 *******************************************************************************/
2958 #define WM8994_AIF1DRC2_KNEE2_OP_ENA_MASK (uint16_t)0x0020
2959 #define WM8994_AIF1DRC2_KNEE2_OP_ENA_POSITION 5
2960 int32_t wm8994_aif1drc2_knee2_op_ena(wm8994_ctx_t *ctx, uint16_t value);
2961 
2962 /*******************************************************************************
2963 * Register : WM8994_AIF1_DRC2
2964 * Address : 0X450
2965 * Bit Group Name: AIF1DRC2_SIG_DET
2966 * Permission : RW
2967 *******************************************************************************/
2968 #define WM8994_AIF1DRC2_SIG_DET_MASK (uint16_t)0x0040
2969 #define WM8994_AIF1DRC2_SIG_DET_POSITION 6
2970 int32_t wm8994_aif1drc2_sig_det(wm8994_ctx_t *ctx, uint16_t value);
2971 
2972 /*******************************************************************************
2973 * Register : WM8994_AIF1_DRC2
2974 * Address : 0X450
2975 * Bit Group Name: AIF1DRC2_SIG_DET_MODE
2976 * Permission : RW
2977 *******************************************************************************/
2978 #define WM8994_AIF1DRC2_SIG_DET_MODE_MASK (uint16_t)0x0080
2979 #define WM8994_AIF1DRC2_SIG_DET_MODE_POSITION 7
2980 int32_t wm8994_aif1drc2_sig_det_mode(wm8994_ctx_t *ctx, uint16_t value);
2981 
2982 /*******************************************************************************
2983 * Register : WM8994_AIF1_DRC2
2984 * Address : 0X450
2985 * Bit Group Name: AIF1DRC2_NG_ENA
2986 * Permission : RW
2987 *******************************************************************************/
2988 #define WM8994_AIF1DRC2_NG_ENA_MASK (uint16_t)0x0100
2989 #define WM8994_AIF1DRC2_NG_ENA_POSITION 8
2990 int32_t wm8994_aif1drc2_ng_ena(wm8994_ctx_t *ctx, uint16_t value);
2991 
2992 /*******************************************************************************
2993 * Register : WM8994_AIF1_DRC2
2994 * Address : 0X450
2995 * Bit Group Name: AIF1DRC2_SIG_DET_PK[1:0]
2996 * Permission : RW
2997 *******************************************************************************/
2998 #define WM8994_AIF1DRC2_SIG_DET_PK_MASK (uint16_t)0x0600
2999 #define WM8994_AIF1DRC2_SIG_DET_PK_POSITION 9
3000 int32_t wm8994_aif1drc2_sig_det_pk(wm8994_ctx_t *ctx, uint16_t value);
3001 
3002 /*******************************************************************************
3003 * Register : WM8994_AIF1_DRC2
3004 * Address : 0X450
3005 * Bit Group Name: AIF1DRC2_SIG_DET_RMS[4:0]
3006 * Permission : RW
3007 *******************************************************************************/
3008 #define WM8994_AIF1DRC2_SIG_DET_RMS_MASK (uint16_t)0xF800
3009 #define WM8994_AIF1DRC2_SIG_DET_RMS_POSITION 11
3010 int32_t wm8994_aif1drc2_sig_det_rms(wm8994_ctx_t *ctx, uint16_t value);
3011 
3012 /* Note: Registers (uint16_t)0x0451 to (uint16_t)0x0454
3013  Registers (uint16_t)0x0480 to (uint16_t)0x0493
3014  Registers (uint16_t)0x04A0 to (uint16_t)0x04B3
3015  Registers 0X0500, 0X0501, 0X0502, 0X0503, 0X0510, 0X0520, 0X0521
3016  Registers (uint16_t)0x0540 to (uint16_t)0x0544
3017  Registers (uint16_t)0x0580 to (uint16_t)0x0593
3018  are not implemented here */
3019 
3020 /*******************************************************************************
3021 * Register : WM8994_DAC1_MIXER_VOL
3022 * Address : 0X600
3023 * Bit Group Name: ADCL_DAC1_VOL [3:0]
3024 * Permission : RW
3025 *******************************************************************************/
3026 #define WM8994_DAC1_MIXER_VOL_ADCL_MASK (uint16_t)0x000F
3027 #define WM8994_DAC1_MIXER_VOL_ADCL_POSITION 0
3028 int32_t wm8994_dac1_mixer_vol_adcl(wm8994_ctx_t *ctx, uint16_t value);
3029 
3030 /*******************************************************************************
3031 * Register : WM8994_DAC1_MIXER_VOL
3032 * Address : 0X600
3033 * Bit Group Name: ADCR_DAC1_VOL [3:0]
3034 * Permission : RW
3035 *******************************************************************************/
3036 #define WM8994_DAC1_MIXER_VOL_ADCR_MASK (uint16_t)0x001E
3037 #define WM8994_DAC1_MIXER_VOL_ADCR_POSITION 5
3038 int32_t wm8994_dac1_mixer_vol_adcr(wm8994_ctx_t *ctx, uint16_t value);
3039 
3040 /*******************************************************************************
3041 * Register : WM8994_AIF1_DAC1_LMR
3042 * Address : 0X601
3043 * Bit Group Name: AIF1DAC1L_TO_DAC1L
3044 * Permission : RW
3045 *******************************************************************************/
3046 #define WM8994_AIF1_DAC1_LMRDAC1L_TO_DAC1L_MASK (uint16_t)0x0001
3047 #define WM8994_AIF1_DAC1_LMRDAC1L_TO_DAC1L_POSITION 0
3048 int32_t wm8994_aif1_dac1_lmrdac1l_to_dac1l(wm8994_ctx_t *ctx, uint16_t value);
3049 
3050 /*******************************************************************************
3051 * Register : WM8994_AIF1_DAC1_LMR
3052 * Address : 0X601
3053 * Bit Group Name: AIF1DAC2L_TO_DAC1L
3054 * Permission : RW
3055 *******************************************************************************/
3056 #define WM8994_AIF1_DAC1_LMRDAC2L_TO_DAC1L_MASK (uint16_t)0x0002
3057 #define WM8994_AIF1_DAC1_LMRDAC2L_TO_DAC1L_POSITION 1
3058 int32_t wm8994_aif1_dac1_lmrdac2l_to_dac1l(wm8994_ctx_t *ctx, uint16_t value);
3059 
3060 /*******************************************************************************
3061 * Register : WM8994_AIF1_DAC1_LMR
3062 * Address : 0X601
3063 * Bit Group Name: AIF1DACL_TO_DAC1L
3064 * Permission : RW
3065 *******************************************************************************/
3066 #define WM8994_AIF1_DAC1_LMRDACL_TO_DAC1L_MASK (uint16_t)0x0004
3067 #define WM8994_AIF1_DAC1_LMRDACL_TO_DAC1L_POSITION 2
3068 int32_t wm8994_aif1_dac1_lmrdacl_to_dac1l(wm8994_ctx_t *ctx, uint16_t value);
3069 
3070 /*******************************************************************************
3071 * Register : WM8994_AIF1_DAC1_LMR
3072 * Address : 0X601
3073 * Bit Group Name: AIF1ADCL_TO_DAC1L
3074 * Permission : RW
3075 *******************************************************************************/
3076 #define WM8994_AIF1_DAC1_LMRADCL_TO_DAC1L_MASK (uint16_t)0x0010
3077 #define WM8994_AIF1_DAC1_LMRADCL_TO_DAC1L_POSITION 4
3078 int32_t wm8994_aif1_dac1_lmradcl_to_dac1l(wm8994_ctx_t *ctx, uint16_t value);
3079 
3080 /*******************************************************************************
3081 * Register : WM8994_AIF1_DAC1_LMR
3082 * Address : 0X601
3083 * Bit Group Name: AIF1ADCR_TO_DAC1L
3084 * Permission : RW
3085 *******************************************************************************/
3086 #define WM8994_AIF1_DAC1_LMRADCR_TO_DAC1L_MASK (uint16_t)0x0020
3087 #define WM8994_AIF1_DAC1_LMRADCR_TO_DAC1L_POSITION 5
3088 int32_t wm8994_aif1_dac1_lmradcr_to_dac1l(wm8994_ctx_t *ctx, uint16_t value);
3089 
3090 /*******************************************************************************
3091 * Register : WM8994_AIF1_DAC1_RMR
3092 * Address : 0X602
3093 * Bit Group Name: AIF1DAC1R_TO_DAC1R
3094 * Permission : RW
3095 *******************************************************************************/
3096 #define WM8994_AIF1_DAC1_RMRDAC1R_TO_DAC1R_MASK (uint16_t)0x0001
3097 #define WM8994_AIF1_DAC1_RMRDAC1R_TO_DAC1R_POSITION 0
3098 int32_t wm8994_aif1_dac1_rmrdac1r_to_dac1r(wm8994_ctx_t *ctx, uint16_t value);
3099 
3100 /*******************************************************************************
3101 * Register : WM8994_AIF1_DAC1_RMR
3102 * Address : 0X602
3103 * Bit Group Name: AIF1DAC2R_TO_DAC1R
3104 * Permission : RW
3105 *******************************************************************************/
3106 #define WM8994_AIF1_DAC1_RMRDAC2R_TO_DAC1R_MASK (uint16_t)0x0002
3107 #define WM8994_AIF1_DAC1_RMRDAC2R_TO_DAC1R_POSITION 1
3108 int32_t wm8994_aif1_dac1_rmrdac2r_to_dac1r(wm8994_ctx_t *ctx, uint16_t value);
3109 
3110 /*******************************************************************************
3111 * Register : WM8994_AIF1_DAC1_RMR
3112 * Address : 0X602
3113 * Bit Group Name: AIF1DACR_TO_DAC1R
3114 * Permission : RW
3115 *******************************************************************************/
3116 #define WM8994_AIF1_DAC1_RMRDACR_TO_DAC1R_MASK (uint16_t)0x0004
3117 #define WM8994_AIF1_DAC1_RMRDACR_TO_DAC1R_POSITION 2
3118 int32_t wm8994_aif1_dac1_rmrdacr_to_dac1r(wm8994_ctx_t *ctx, uint16_t value);
3119 
3120 /*******************************************************************************
3121 * Register : WM8994_AIF1_DAC1_RMR
3122 * Address : 0X602
3123 * Bit Group Name: AIF1ADCL_TO_DAC1R
3124 * Permission : RW
3125 *******************************************************************************/
3126 #define WM8994_AIF1_DAC1_RMRADCL_TO_DAC1R_MASK (uint16_t)0x0010
3127 #define WM8994_AIF1_DAC1_RMRADCL_TO_DAC1R_POSITION 4
3128 int32_t wm8994_aif1_dac1_rmradcl_to_dac1r(wm8994_ctx_t *ctx, uint16_t value);
3129 
3130 /*******************************************************************************
3131 * Register : WM8994_AIF1_DAC1_RMR
3132 * Address : 0X602
3133 * Bit Group Name: AIF1ADCR_TO_DAC1R
3134 * Permission : RW
3135 *******************************************************************************/
3136 #define WM8994_AIF1_DAC1_RMRADCR_TO_DAC1R_MASK (uint16_t)0x0020
3137 #define WM8994_AIF1_DAC1_RMRADCR_TO_DAC1R_POSITION 5
3138 int32_t wm8994_aif1_dac1_rmradcr_to_dac1r(wm8994_ctx_t *ctx, uint16_t value);
3139 
3140 /*******************************************************************************
3141 * Register : WM8994_AIF1_DAC2_LMR
3142 * Address : 0X604
3143 * Bit Group Name: AIF1DAC1L_TO_DAC2L
3144 * Permission : RW
3145 *******************************************************************************/
3146 #define WM8994_AIF1_DAC2_LMRDAC1L_TO_DAC2L_MASK (uint16_t)0x0001
3147 #define WM8994_AIF1_DAC2_LMRDAC1L_TO_DAC2L_POSITION 0
3148 int32_t wm8994_aif1_dac2_lmrdac1l_to_dac2l(wm8994_ctx_t *ctx, uint16_t value);
3149 
3150 /*******************************************************************************
3151 * Register : WM8994_AIF1_DAC2_LMR
3152 * Address : 0X604
3153 * Bit Group Name: AIF1DAC2L_TO_DAC2L
3154 * Permission : RW
3155 *******************************************************************************/
3156 #define WM8994_AIF1_DAC2_LMRDAC2L_TO_DAC2L_MASK (uint16_t)0x0002
3157 #define WM8994_AIF1_DAC2_LMRDAC2L_TO_DAC2L_POSITION 1
3158 int32_t wm8994_aif1_dac2_lmrdac2l_to_dac2l(wm8994_ctx_t *ctx, uint16_t value);
3159 
3160 /*******************************************************************************
3161 * Register : WM8994_AIF1_DAC2_LMR
3162 * Address : 0X604
3163 * Bit Group Name: AIF1DACL_TO_DAC2L
3164 * Permission : RW
3165 *******************************************************************************/
3166 #define WM8994_AIF1_DAC2_LMRDACL_TO_DAC2L_MASK (uint16_t)0x0004
3167 #define WM8994_AIF1_DAC2_LMRDACL_TO_DAC2L_POSITION 2
3168 int32_t wm8994_aif1_dac2_lmrdacl_to_dac2l(wm8994_ctx_t *ctx, uint16_t value);
3169 
3170 /*******************************************************************************
3171 * Register : WM8994_AIF1_DAC2_LMR
3172 * Address : 0X604
3173 * Bit Group Name: AIF1ADCL_TO_DAC2L
3174 * Permission : RW
3175 *******************************************************************************/
3176 #define WM8994_AIF1_DAC2_LMRADCL_TO_DAC2L_MASK (uint16_t)0x0010
3177 #define WM8994_AIF1_DAC2_LMRADCL_TO_DAC2L_POSITION 4
3178 int32_t wm8994_aif1_dac2_lmradcl_to_dac2l(wm8994_ctx_t *ctx, uint16_t value);
3179 
3180 /*******************************************************************************
3181 * Register : WM8994_AIF1_DAC2_LMR
3182 * Address : 0X604
3183 * Bit Group Name: AIF1ADCR_TO_DAC2L
3184 * Permission : RW
3185 *******************************************************************************/
3186 #define WM8994_AIF1_DAC2_LMRADCR_TO_DAC2L_MASK (uint16_t)0x0020
3187 #define WM8994_AIF1_DAC2_LMRADCR_TO_DAC2L_POSITION 5
3188 int32_t wm8994_aif1_dac2_lmradcr_to_dac2l(wm8994_ctx_t *ctx, uint16_t value);
3189 
3190 /*******************************************************************************
3191 * Register : WM8994_AIF1_DAC2_RMR
3192 * Address : 0X605
3193 * Bit Group Name: AIF1DAC1R_TO_DAC2R
3194 * Permission : RW
3195 *******************************************************************************/
3196 #define WM8994_AIF1_DAC2_RMRDAC1R_TO_DAC2R_MASK (uint16_t)0x0001
3197 #define WM8994_AIF1_DAC2_RMRDAC1R_TO_DAC2R_POSITION 0
3198 int32_t wm8994_aif1_dac2_rmrdac1r_to_dac2r(wm8994_ctx_t *ctx, uint16_t value);
3199 
3200 /*******************************************************************************
3201 * Register : WM8994_AIF1_DAC2_RMR
3202 * Address : 0X605
3203 * Bit Group Name: AIF1DAC2R_TO_DAC2R
3204 * Permission : RW
3205 *******************************************************************************/
3206 #define WM8994_AIF1_DAC2_RMRDAC2R_TO_DAC2R_MASK (uint16_t)0x0002
3207 #define WM8994_AIF1_DAC2_RMRDAC2R_TO_DAC2R_POSITION 1
3208 int32_t wm8994_aif1_dac2_rmrdac2r_to_dac2r(wm8994_ctx_t *ctx, uint16_t value);
3209 
3210 /*******************************************************************************
3211 * Register : WM8994_AIF1_DAC2_RMR
3212 * Address : 0X605
3213 * Bit Group Name: AIF1DACR_TO_DAC2R
3214 * Permission : RW
3215 *******************************************************************************/
3216 #define WM8994_AIF1_DAC2_RMRDACR_TO_DAC2R_MASK (uint16_t)0x0004
3217 #define WM8994_AIF1_DAC2_RMRDACR_TO_DAC2R_POSITION 2
3218 int32_t wm8994_aif1_dac2_rmrdacr_to_dac2r(wm8994_ctx_t *ctx, uint16_t value);
3219 
3220 /*******************************************************************************
3221 * Register : WM8994_AIF1_DAC2_RMR
3222 * Address : 0X605
3223 * Bit Group Name: AIF1ADCL_TO_DAC2R
3224 * Permission : RW
3225 *******************************************************************************/
3226 #define WM8994_AIF1_DAC2_RMRADCL_TO_DAC2R_MASK (uint16_t)0x0010
3227 #define WM8994_AIF1_DAC2_RMRADCL_TO_DAC2R_POSITION 4
3228 int32_t wm8994_aif1_dac2_rmradcl_to_dac2r(wm8994_ctx_t *ctx, uint16_t value);
3229 
3230 /*******************************************************************************
3231 * Register : WM8994_AIF1_DAC2_RMR
3232 * Address : 0X605
3233 * Bit Group Name: AIF1ADCR_TO_DAC2R
3234 * Permission : RW
3235 *******************************************************************************/
3236 #define WM8994_AIF1_DAC2_RMRADCR_TO_DAC2R_MASK (uint16_t)0x0020
3237 #define WM8994_AIF1_DAC2_RMRADCR_TO_DAC2R_POSITION 5
3238 int32_t wm8994_aif1_dac2_rmradcr_to_dac2r(wm8994_ctx_t *ctx, uint16_t value);
3239 
3240 /*******************************************************************************
3241 * Register : WM8994_AIF1_ADC1_LMR
3242 * Address : 0X606
3243 * Bit Group Name: AIF2DACL_TO_AIF1ADC1L
3244 * Permission : RW
3245 *******************************************************************************/
3246 #define WM8994_ADC1LMR_AIF2DACL_TO_AIF1ADC1L_MASK (uint16_t)0x0001
3247 #define WM8994_ADC1LMR_AIF2DACL_TO_AIF1ADC1L_POSITION 0
3248 int32_t wm8994_adc1lmr_aif2dacl_to_aif1adc1l(wm8994_ctx_t *ctx, uint16_t value);
3249 
3250 /*******************************************************************************
3251 * Register : WM8994_AIF1_ADC1_LMR
3252 * Address : 0X606
3253 * Bit Group Name: ADC1L_TO_AIF1ADC1L
3254 * Permission : RW
3255 *******************************************************************************/
3256 #define WM8994_ADC1LMR_ADC1L_TO_AIF1ADC1L_MASK (uint16_t)0x0002
3257 #define WM8994_ADC1LMR_ADC1L_TO_AIF1ADC1L_POSITION 1
3258 int32_t wm8994_adc1lmr_adc1l_to_aif1adc1l(wm8994_ctx_t *ctx, uint16_t value);
3259 
3260 
3261 /*******************************************************************************
3262 * Register : WM8994_AIF1_ADC1_RMR
3263 * Address : 0X607
3264 * Bit Group Name: AIF2DACL_TO_AIF1ADC1R
3265 * Permission : RW
3266 *******************************************************************************/
3267 #define WM8994_ADC1RMR_AIF2DACL_TO_AIF1ADC1R_MASK (uint16_t)0x0001
3268 #define WM8994_ADC1RMR_AIF2DACL_TO_AIF1ADC1R_POSITION 0
3269 int32_t wm8994_adc1rmr_aif2dacl_to_aif1adc1r(wm8994_ctx_t *ctx, uint16_t value);
3270 
3271 /*******************************************************************************
3272 * Register : WM8994_AIF1_ADC1_RMR
3273 * Address : 0X607
3274 * Bit Group Name: ADC1R_TO_AIF1ADC1R
3275 * Permission : RW
3276 *******************************************************************************/
3277 #define WM8994_ADC1RMR_ADC1R_TO_AIF1ADC1R_MASK (uint16_t)0x0002
3278 #define WM8994_ADC1RMR_ADC1R_TO_AIF1ADC1R_POSITION 1
3279 int32_t wm8994_adc1rmr_adc1r_to_aif1adc1r(wm8994_ctx_t *ctx, uint16_t value);
3280 
3281 /*******************************************************************************
3282 * Register : WM8994_AIF1_ADC2_LMR
3283 * Address : 0X608
3284 * Bit Group Name: AIF2DACL_TO_AIF1ADC2L
3285 * Permission : RW
3286 *******************************************************************************/
3287 #define WM8994_ADC2LMR_AIF2DACL_TO_AIF1ADC2L_MASK (uint16_t)0x0001
3288 #define WM8994_ADC2LMR_AIF2DACL_TO_AIF1ADC2L_POSITION 0
3289 int32_t wm8994_adc2lmr_aif2dacl_to_aif1adc2l(wm8994_ctx_t *ctx, uint16_t value);
3290 
3291 /*******************************************************************************
3292 * Register : WM8994_AIF1_ADC2_LMR
3293 * Address : 0X608
3294 * Bit Group Name: ADC2L_TO_AIF1ADC2L
3295 * Permission : RW
3296 *******************************************************************************/
3297 #define WM8994_ADC2LMR_ADC2L_TO_AIF1ADC2L_MASK (uint16_t)0x0002
3298 #define WM8994_ADC2LMR_ADC2L_TO_AIF1ADC2L_POSITION 1
3299 int32_t wm8994_adc2lmr_adc2l_to_aif1adc2l(wm8994_ctx_t *ctx, uint16_t value);
3300 
3301 
3302 /*******************************************************************************
3303 * Register : WM8994_AIF1_ADC2_RMR
3304 * Address : 0X609
3305 * Bit Group Name: AIF2DACL_TO_AIF1ADC2R
3306 * Permission : RW
3307 *******************************************************************************/
3308 #define WM8994_ADC2RMR_AIF2DACL_TO_AIF1ADC2R_MASK (uint16_t)0x0001
3309 #define WM8994_ADC2RMR_AIF2DACL_TO_AIF1ADC2R_POSITION 0
3310 int32_t wm8994_adc2rmr_aif2dacl_to_aif1adc2r(wm8994_ctx_t *ctx, uint16_t value);
3311 
3312 /*******************************************************************************
3313 * Register : WM8994_AIF1_ADC2_RMR
3314 * Address : 0X609
3315 * Bit Group Name: ADC2R_TO_AIF1ADC2R
3316 * Permission : RW
3317 *******************************************************************************/
3318 #define WM8994_ADC2RMR_ADC2R_TO_AIF1ADC2R_MASK (uint16_t)0x0002
3319 #define WM8994_ADC2RMR_ADC2R_TO_AIF1ADC2R_POSITION 1
3320 int32_t wm8994_adc2rmr_adc2r_to_aif1adc2r(wm8994_ctx_t *ctx, uint16_t value);
3321 
3322 /*******************************************************************************
3323 * Register : WM8994_DAC1_LEFT_VOL
3324 * Address : 0X610
3325 * Bit Group Name: DAC1L_VOL[7:0]
3326 * Permission : RW
3327 *******************************************************************************/
3328 #define WM8994_DAC1_LEFT_VOL_VSET_MASK (uint16_t)0x00FF
3329 #define WM8994_DAC1_LEFT_VOL_VSET_POSITION 0
3330 int32_t wm8994_dac1_left_vol_vset(wm8994_ctx_t *ctx, uint16_t value);
3331 
3332 /*******************************************************************************
3333 * Register : WM8994_DAC1_LEFT_VOL
3334 * Address : 0X610
3335 * Bit Group Name: DAC1L_VU
3336 * Permission : RW
3337 *******************************************************************************/
3338 #define WM8994_DAC1_LEFT_VOL_VU_MASK (uint16_t)0x0100
3339 #define WM8994_DAC1_LEFT_VOL_VU_POSITION 8
3340 int32_t wm8994_dac1_left_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
3341 
3342 /*******************************************************************************
3343 * Register : WM8994_DAC1_LEFT_VOL
3344 * Address : 0X610
3345 * Bit Group Name: DAC1L_MUTE
3346 * Permission : RW
3347 *******************************************************************************/
3348 #define WM8994_DAC1_LEFT_VOL_MUTE_MASK (uint16_t)0x0200
3349 #define WM8994_DAC1_LEFT_VOL_MUTE_POSITION 9
3350 int32_t wm8994_dac1_left_vol_mute(wm8994_ctx_t *ctx, uint16_t value);
3351 
3352 /*******************************************************************************
3353 * Register : WM8994_DAC1_RIGHT_VOL
3354 * Address : 0X611
3355 * Bit Group Name: DAC1R_VOL[7:0]
3356 * Permission : RW
3357 *******************************************************************************/
3358 #define WM8994_DAC1_RIGHT_VOL_VSET_MASK (uint16_t)0x00FF
3359 #define WM8994_DAC1_RIGHT_VOL_VSET_POSITION 0
3360 int32_t wm8994_dac1_right_vol_vset(wm8994_ctx_t *ctx, uint16_t value);
3361 
3362 /*******************************************************************************
3363 * Register : WM8994_DAC1_RIGHT_VOL
3364 * Address : 0X611
3365 * Bit Group Name: DAC1R_VU
3366 * Permission : RW
3367 *******************************************************************************/
3368 #define WM8994_DAC1_RIGHT_VOL_VU_MASK (uint16_t)0x0100
3369 #define WM8994_DAC1_RIGHT_VOL_VU_POSITION 8
3370 int32_t wm8994_dac1_right_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
3371 
3372 /*******************************************************************************
3373 * Register : WM8994_DAC1_RIGHT_VOL
3374 * Address : 0X611
3375 * Bit Group Name: DAC1R_MUTE
3376 * Permission : RW
3377 *******************************************************************************/
3378 #define WM8994_DAC1_RIGHT_VOL_MUTE_MASK (uint16_t)0x0200
3379 #define WM8994_DAC1_RIGHT_VOL_MUTE_POSITION 9
3380 int32_t wm8994_dac1_right_vol_mute(wm8994_ctx_t *ctx, uint16_t value);
3381 
3382 /*******************************************************************************
3383 * Register : WM8994_DAC2_LEFT_VOL
3384 * Address : 0X612
3385 * Bit Group Name: DAC2L_VOL[7:0]
3386 * Permission : RW
3387 *******************************************************************************/
3388 #define WM8994_DAC2_LEFT_VOL_VSET_MASK (uint16_t)0x00FF
3389 #define WM8994_DAC2_LEFT_VOL_VSET_POSITION 0
3390 int32_t wm8994_dac2_left_vol_vset(wm8994_ctx_t *ctx, uint16_t value);
3391 
3392 /*******************************************************************************
3393 * Register : WM8994_DAC2_LEFT_VOL
3394 * Address : 0X612
3395 * Bit Group Name: DAC2L_VU
3396 * Permission : RW
3397 *******************************************************************************/
3398 #define WM8994_DAC2_LEFT_VOL_VU_MASK (uint16_t)0x0100
3399 #define WM8994_DAC2_LEFT_VOL_VU_POSITION 8
3400 int32_t wm8994_dac2_left_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
3401 
3402 /*******************************************************************************
3403 * Register : WM8994_DAC2_LEFT_VOL
3404 * Address : 0X612
3405 * Bit Group Name: DAC2L_MUTE
3406 * Permission : RW
3407 *******************************************************************************/
3408 #define WM8994_DAC2_LEFT_VOL_MUTE_MASK (uint16_t)0x0200
3409 #define WM8994_DAC2_LEFT_VOL_MUTE_POSITION 9
3410 int32_t wm8994_dac2_left_vol_mute(wm8994_ctx_t *ctx, uint16_t value);
3411 
3412 /*******************************************************************************
3413 * Register : WM8994_DAC2_RIGHT_VOL
3414 * Address : 0X613
3415 * Bit Group Name: DAC2R_VOL[7:0]
3416 * Permission : RW
3417 *******************************************************************************/
3418 #define WM8994_DAC2_RIGHT_VOL_VSET_MASK (uint16_t)0x00FF
3419 #define WM8994_DAC2_RIGHT_VOL_VSET_POSITION 0
3420 int32_t wm8994_dac2_right_vol_vset(wm8994_ctx_t *ctx, uint16_t value);
3421 
3422 /*******************************************************************************
3423 * Register : WM8994_DAC2_RIGHT_VOL
3424 * Address : 0X613
3425 * Bit Group Name: DAC2R_VU
3426 * Permission : RW
3427 *******************************************************************************/
3428 #define WM8994_DAC2_RIGHT_VOL_VU_MASK (uint16_t)0x0100
3429 #define WM8994_DAC2_RIGHT_VOL_VU_POSITION 8
3430 int32_t wm8994_dac2_right_vol_vu(wm8994_ctx_t *ctx, uint16_t value);
3431 
3432 /*******************************************************************************
3433 * Register : WM8994_DAC2_RIGHT_VOL
3434 * Address : 0X613
3435 * Bit Group Name: DAC2R_MUTE
3436 * Permission : RW
3437 *******************************************************************************/
3438 #define WM8994_DAC2_RIGHT_VOL_MUTE_MASK (uint16_t)0x0200
3439 #define WM8994_DAC2_RIGHT_VOL_MUTE_POSITION 9
3440 int32_t wm8994_dac2_right_vol_mute(wm8994_ctx_t *ctx, uint16_t value);
3441 
3442 /*******************************************************************************
3443 * Register : WM8994_OVERSAMPLING
3444 * Address : 0X620
3445 * Bit Group Name: DAC_OSR128
3446 * Permission : RW
3447 *******************************************************************************/
3448 #define WM8994_OVERSAMPLING_DAC_OSR128_MASK (uint16_t)0x0001
3449 #define WM8994_OVERSAMPLING_DAC_OSR128_POSITION 0
3450 int32_t wm8994_oversampling_dac_osr128(wm8994_ctx_t *ctx, uint16_t value);
3451 
3452 /*******************************************************************************
3453 * Register : WM8994_OVERSAMPLING
3454 * Address : 0X620
3455 * Bit Group Name: ADC_OSR128
3456 * Permission : RW
3457 *******************************************************************************/
3458 #define WM8994_OVERSAMPLING_ADC_OSR128_MASK (uint16_t)0x0002
3459 #define WM8994_OVERSAMPLING_ADC_OSR128_POSITION 1
3460 int32_t wm8994_oversampling_adc_osr128(wm8994_ctx_t *ctx, uint16_t value);
3461 
3462 /*******************************************************************************
3463 * Register : WM8994_GPIO1
3464 * Address : 0X700
3465 * Bit Group Name: GP1_FN [4:0]
3466 * Permission : RW
3467 *******************************************************************************/
3468 #define WM8994_GPIO1_GP1_FN_MASK (uint16_t)0x001F
3469 #define WM8994_GPIO1_GP1_FN_POSITION 0
3470 int32_t wm8994_gpio1_gp1_fn(wm8994_ctx_t *ctx, uint16_t value);
3471 
3472 /*******************************************************************************
3473 * Register : WM8994_GPIO1
3474 * Address : 0X700
3475 * Bit Group Name: GP1_LVL
3476 * Permission : RW
3477 *******************************************************************************/
3478 #define WM8994_GPIO1_GP1_LVL_MASK (uint16_t)0x0040
3479 #define WM8994_GPIO1_GP1_LVL_POSITION 6
3480 int32_t wm8994_gpio1_gp1_lvl(wm8994_ctx_t *ctx, uint16_t value);
3481 
3482 /*******************************************************************************
3483 * Register : WM8994_GPIO1
3484 * Address : 0X700
3485 * Bit Group Name: GP1_DB
3486 * Permission : RW
3487 *******************************************************************************/
3488 #define WM8994_GPIO1_GP1_DB_MASK (uint16_t)0x0100
3489 #define WM8994_GPIO1_GP1_DB_POSITION 8
3490 int32_t wm8994_gpio1_gp1_db(wm8994_ctx_t *ctx, uint16_t value);
3491 
3492 /*******************************************************************************
3493 * Register : WM8994_GPIO1
3494 * Address : 0X700
3495 * Bit Group Name: GP1_OP_CFG
3496 * Permission : RW
3497 *******************************************************************************/
3498 #define WM8994_GPIO1_GP1_OP_CFG_MASK (uint16_t)0x0200
3499 #define WM8994_GPIO1_GP1_OP_CFG_POSITION 9
3500 int32_t wm8994_gpio1_gp1_op_cfg(wm8994_ctx_t *ctx, uint16_t value);
3501 
3502 /*******************************************************************************
3503 * Register : WM8994_GPIO1
3504 * Address : 0X700
3505 * Bit Group Name: GP1_POL
3506 * Permission : RW
3507 *******************************************************************************/
3508 #define WM8994_GPIO1_GP1_POL_MASK (uint16_t)0x0400
3509 #define WM8994_GPIO1_GP1_POL_POSITION 10
3510 int32_t wm8994_gpio1_gp1_pol(wm8994_ctx_t *ctx, uint16_t value);
3511 
3512 /*******************************************************************************
3513 * Register : WM8994_GPIO1
3514 * Address : 0X700
3515 * Bit Group Name: GP1_PD
3516 * Permission : RW
3517 *******************************************************************************/
3518 #define WM8994_GPIO1_GP1_PD_MASK (uint16_t)0x2000
3519 #define WM8994_GPIO1_GP1_PD_POSITION 13
3520 int32_t wm8994_gpio1_gp1_pd(wm8994_ctx_t *ctx, uint16_t value);
3521 
3522 /*******************************************************************************
3523 * Register : WM8994_GPIO1
3524 * Address : 0X700
3525 * Bit Group Name: GP1_PU
3526 * Permission : RW
3527 *******************************************************************************/
3528 #define WM8994_GPIO1_GP1_PU_MASK (uint16_t)0x4000
3529 #define WM8994_GPIO1_GP1_PU_POSITION 14
3530 int32_t wm8994_gpio1_gp1_pu(wm8994_ctx_t *ctx, uint16_t value);
3531 
3532 /*******************************************************************************
3533 * Register : WM8994_GPIO1
3534 * Address : 0X700
3535 * Bit Group Name: GP1_DIR
3536 * Permission : RW
3537 *******************************************************************************/
3538 #define WM8994_GPIO1_GP1_DIR_MASK (uint16_t)0x8000
3539 #define WM8994_GPIO1_GP1_DIR_POSITION 15
3540 int32_t wm8994_gpio1_gp1_dir(wm8994_ctx_t *ctx, uint16_t value);
3541 
3542 #ifdef __cplusplus
3543 }
3544 #endif
3545 
3546 #endif /* WM8994_REG_H */
3547 
3560 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
wm8994_dc_servo1_dcs_trig_single_0
int32_t wm8994_dc_servo1_dcs_trig_single_0(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4476
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int32_t wm8994_pwr_mgmt_4_aif1adc2r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1023
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int32_t wm8994_dc_servo1_dcs_trig_startup_1(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4398
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int32_t wm8994_outmixer1_dac1l_to_hpout1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3498
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int32_t wm8994_inmixer4_in2r_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3148
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Definition: wm8994_reg.c:873
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Definition: wm8994_reg.c:4552
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Definition: wm8994_reg.c:123
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Definition: wm8994_reg.c:2846
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Definition: wm8994_reg.c:3873
wm8994_ctx_t::handle
void * handle
Definition: wm8994_reg.h:375
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Definition: wm8994_reg.c:1824
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Definition: wm8994_reg.c:5881
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Definition: wm8994_reg.c:3648
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Definition: wm8994_reg.c:2821
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Definition: wm8994_reg.c:7256
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Definition: wm8994_reg.c:6556
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int32_t wm8994_aif1drc1_sig_det_pk(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6356
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Definition: wm8994_reg.c:3022
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Definition: wm8994_reg.c:573
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Definition: wm8994_reg.c:4123
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Definition: wm8994_reg.c:2146
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Definition: wm8994_reg.c:5700
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Definition: wm8994_reg.c:5648
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Definition: wm8994_reg.c:3948
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Definition: wm8994_reg.c:2046
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Definition: wm8994_reg.c:7006
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Definition: wm8994_reg.c:323
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Definition: wm8994_reg.c:2946
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int32_t wm8994_spk_left_vol_spkout_zc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2596
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int32_t wm8994_sw_reset_w(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:99
WM8994_Read_Func
int32_t(* WM8994_Read_Func)(void *, uint16_t, uint8_t *, uint16_t)
Definition: wm8994_reg.h:369
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Definition: wm8994_reg.c:1048
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int32_t wm8994_spkmixr_att_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2371
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Definition: wm8994_reg.c:7081
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Definition: wm8994_reg.c:6881
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Definition: wm8994_reg.c:4527
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Definition: wm8994_reg.c:4223
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int32_t wm8994_aif1drc1_dac1_drc_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6181
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int32_t wm8994_wseq_ctrl1_abort(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4733
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Definition: wm8994_reg.c:2121
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int32_t wm8994_spkmixr_att_mixoutl_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2421
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int32_t wm8994_gpio1_gp1_dir(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7956
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Definition: wm8994_reg.c:1549
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int32_t wm8994_aif1_clocking1_inv(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4833
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int32_t wm8994_aif1_adc1_filters_adc1r_hpf(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5674
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Definition: wm8994_reg.c:4148
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int32_t wm8994_outmixer1_in1r_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3373
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Definition: wm8994_reg.c:2296
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int32_t wm8994_lli_in1_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1649
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int32_t wm8994_aif1_dac2_lmrdac1l_to_dac2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6981
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Definition: wm8994_reg.c:2771
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Definition: wm8994_reg.c:748
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Definition: wm8994_reg.c:598
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Definition: wm8994_reg.c:2571
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Definition: wm8994_reg.c:4679
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Definition: wm8994_reg.c:4073
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int32_t wm8994_rli_in2r_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1924
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Definition: wm8994_reg.c:7506
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int32_t wm8994_oversampling_adc_osr128(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7756
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int32_t wm8994_pwr_mgmt_5_aif1dac2l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1299
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Definition: wm8994_reg.c:5249
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Definition: wm8994_reg.c:7531
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Definition: wm8994_reg.c:7156
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Definition: wm8994_reg.c:348
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Definition: wm8994_reg.c:6431
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Definition: wm8994_reg.c:4198
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Definition: wm8994_reg.c:7356
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int32_t wm8994_rli_in2_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1949
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Definition: wm8994_reg.c:5202
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Definition: wm8994_reg.c:1148
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int32_t wm8994_pwr_mgmt_4_aif1adc1r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:973
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int32_t wm8994_aif1_dac1_lmrdacl_to_dac1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6781
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Definition: wm8994_reg.c:2521
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Definition: wm8994_reg.c:7456
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int32_t wm8994_pwr_mgmt_2_in2l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:423
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Definition: wm8994_reg.c:6756
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Definition: wm8994_reg.c:7606
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Definition: wm8994_reg.c:1724
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Definition: wm8994_reg.c:1399
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Definition: wm8994_reg.c:1073
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Definition: wm8994_reg.c:2496
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Definition: wm8994_reg.c:6106
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Definition: wm8994_reg.c:3198
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Definition: wm8994_reg.c:3673
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Definition: wm8994_reg.c:923
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int32_t wm8994_pwr_mgmt_2_mixinr_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:448
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Definition: wm8994_reg.c:3323
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Definition: wm8994_reg.c:6031
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Definition: wm8994_reg.c:4502
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Definition: wm8994_reg.c:3173
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Definition: wm8994_reg.c:7281
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Definition: wm8994_reg.c:3348
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Definition: wm8994_reg.c:7306
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Definition: wm8994_reg.c:6131
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Definition: wm8994_reg.c:7781
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int32_t wm8994_aif1_ms_tri(wm8994_ctx_t *ctx, uint16_t value)
wm8994_spkmixer_mixinl_to_spkmixl
int32_t wm8994_spkmixer_mixinl_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3923
wm8994_charge_pump1_cp_ena
int32_t wm8994_charge_pump1_cp_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4173
wm8994_pwr_mgmt_3_lineout2p_ena
int32_t wm8994_pwr_mgmt_3_lineout2p_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:723
wm8994_aif1_dac1_lmrdac1l_to_dac1l
int32_t wm8994_aif1_dac1_lmrdac1l_to_dac1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6731
wm8994_inmixer3_in1l_mixinl_vol
int32_t wm8994_inmixer3_in1l_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2972
wm8994_inmixer6_in2lrp_mixinr_vol
int32_t wm8994_inmixer6_in2lrp_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3248
wm8994_dc_servo1_dcs_trig_dac_wr_1
int32_t wm8994_dc_servo1_dcs_trig_dac_wr_1(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4348
wm8994_aif1_control1_fmt_r
int32_t wm8994_aif1_control1_fmt_r(wm8994_ctx_t *ctx, uint16_t *value)
Definition: wm8994_reg.c:5180
wm8994_clocking1_aif2dspclk_ena
int32_t wm8994_clocking1_aif2dspclk_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4933
wm8994_aif1_dac2_rmrdac2r_to_dac2r
int32_t wm8994_aif1_dac2_rmrdac2r_to_dac2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7131
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int32_t wm8994_sw_reset_r(wm8994_ctx_t *ctx, uint16_t *value)
Definition: wm8994_reg.c:111
wm8994_dc_servo1_dcs_trig_series_1
int32_t wm8994_dc_servo1_dcs_trig_series_1(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4450
wm8994_aif1_control1_bclk_inv
int32_t wm8994_aif1_control1_bclk_inv(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5274
wm8994_aif1_dac2_rmradcl_to_dac2r
int32_t wm8994_aif1_dac2_rmradcl_to_dac2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7181
wm8994_inmixer6_in1rp_mixinr_vol
int32_t wm8994_inmixer6_in1rp_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3273
wm8994_clocking2_opclk_div
int32_t wm8994_clocking2_opclk_div(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5008
wm8994_clocking1_sysdspclk_ena
int32_t wm8994_clocking1_sysdspclk_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4908
wm8994_spkmixer_mixinr_to_spkmixr
int32_t wm8994_spkmixer_mixinr_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3898
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int32_t wm8994_aif1drc1_ng_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6331
wm8994_outmixer2_mixinl_to_mixoutr
int32_t wm8994_outmixer2_mixinl_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3698
wm8994_aif1_dac2_rmradcr_to_dac2r
int32_t wm8994_aif1_dac2_rmradcr_to_dac2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7206
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int32_t wm8994_antipop2_vmid_disch(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3998
wm8994_pwr_mgmt_1_spkoutl_ena
int32_t wm8994_pwr_mgmt_1_spkoutl_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:298
wm8994_aif1drc2_sig_det_pk
int32_t wm8994_aif1drc2_sig_det_pk(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6631
wm8994_dac1_mixer_vol_adcr
int32_t wm8994_dac1_mixer_vol_adcr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6706
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int32_t wm8994_aif1_dac1_filter1_muterate(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5931
wm8994_dac2_left_vol_vset
int32_t wm8994_dac2_left_vol_vset(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7581
wm8994_gpio1_gp1_pol
int32_t wm8994_gpio1_gp1_pol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7881
wm8994_aif1_sr_r
int32_t wm8994_aif1_sr_r(wm8994_ctx_t *ctx, uint16_t *value)
Definition: wm8994_reg.c:5133
wm8994_pwr_mgmt_1_micb1_ena
int32_t wm8994_pwr_mgmt_1_micb1_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:173
wm8994_lli_in2_vu
int32_t wm8994_lli_in2_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1749
wm8994_ctx_t::WriteReg
WM8994_Write_Func WriteReg
Definition: wm8994_reg.h:373
wm8994_antipop2_bias_src
int32_t wm8994_antipop2_bias_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4023
wm8994_lo_hpout1l_vol
int32_t wm8994_lo_hpout1l_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1974
wm8994_pwr_mgmt_2_tshut_opdis
int32_t wm8994_pwr_mgmt_2_tshut_opdis(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:523
wm8994_aif1_dac1_filter1_mute
int32_t wm8994_aif1_dac1_filter1_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5981
wm8994_clocking1_sysclk_src
int32_t wm8994_clocking1_sysclk_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4883
wm8994_spkmixl_att_dac2l_vol
int32_t wm8994_spkmixl_att_dac2l_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2321
wm8994_inmixer2_in1rn_to_in1r
int32_t wm8994_inmixer2_in1rn_to_in1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2746
wm8994_outmixer2_in2rn_to_mixoutr
int32_t wm8994_outmixer2_in2rn_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3623
wm8994_pwr_mgmt_5_aif1dac1r_ena
int32_t wm8994_pwr_mgmt_5_aif1dac1r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1224
wm8994_aif1drc1_sig_det_mode
int32_t wm8994_aif1drc1_sig_det_mode(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6306
wm8994_pwr_mgmt_2_mixinl_ena
int32_t wm8994_pwr_mgmt_2_mixinl_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:473
wm8994_aif1_ms_lrclk_frc
int32_t wm8994_aif1_ms_lrclk_frc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5375
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int32_t wm8994_rli_in2r_zc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1899
wm8994_aif1drc2_sig_det_mode
int32_t wm8994_aif1drc2_sig_det_mode(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6581
wm8994_aif1_clocking1_src
int32_t wm8994_aif1_clocking1_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4858
wm8994_antipop2_startup_bias_ena
int32_t wm8994_antipop2_startup_bias_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4048
wm8994_rli_in1r_vol
int32_t wm8994_rli_in1r_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1774
wm8994_analog_hp_hpout1l_outp
int32_t wm8994_analog_hp_hpout1l_outp(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4627
wm8994_adc1lmr_aif2dacl_to_aif1adc1l
int32_t wm8994_adc1lmr_aif2dacl_to_aif1adc1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7231
wm8994_pwr_mgmt_5_aif2dacl_ena
int32_t wm8994_pwr_mgmt_5_aif2dacl_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1349
wm8994_pwr_mgmt_3_mixoutlvol_ena
int32_t wm8994_pwr_mgmt_3_mixoutlvol_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:648
wm8994_read_reg
int32_t wm8994_read_reg(wm8994_ctx_t *ctx, uint16_t reg, uint16_t *data, uint16_t length)
Definition: wm8994_reg.c:46
wm8994_outmixer1_in2rn_to_mixoutl
int32_t wm8994_outmixer1_in2rn_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3423
wm8994_pwr_mgmt_5_aif1dac1l_ena
int32_t wm8994_pwr_mgmt_5_aif1dac1l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1249
wm8994_aif1drc1_knee2_op_ena
int32_t wm8994_aif1drc1_knee2_op_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6256
wm8994_aif1_adc1_right_vol_adc1r
int32_t wm8994_aif1_adc1_right_vol_adc1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5523
wm8994_aif1_control1_adcr_src
int32_t wm8994_aif1_control1_adcr_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5324
wm8994_ctx_t::ReadReg
WM8994_Read_Func ReadReg
Definition: wm8994_reg.h:374
wm8994_pwr_mgmt_4_dmic1l_ena
int32_t wm8994_pwr_mgmt_4_dmic1l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:898
wm8994_clocking1_toclk_ena
int32_t wm8994_clocking1_toclk_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4983
wm8994_pwr_mgmt_2_tshut_ena
int32_t wm8994_pwr_mgmt_2_tshut_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:548
wm8994_inmixer3_in2l_to_mixinl
int32_t wm8994_inmixer3_in2l_to_mixinl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3047
wm8994_aif1_adc2_filters_hpf_cut
int32_t wm8994_aif1_adc2_filters_hpf_cut(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5830
wm8994_dac2_right_vol_vset
int32_t wm8994_dac2_right_vol_vset(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7656
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int32_t wm8994_inmixer5_in1lp_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3223
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int32_t wm8994_aif1drc1_adc1l_drc_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6156
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int32_t wm8994_dac2_right_vol_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7681
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int32_t wm8994_inmixer2_in2lp_to_in2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2921
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int32_t wm8994_adc2lmr_aif2dacl_to_aif1adc2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7331
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int32_t wm8994_rli_in1_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1849
wm8994_aif1_ms_clk_frc
int32_t wm8994_aif1_ms_clk_frc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5401
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int32_t wm8994_pwr_mgmt_1_hpout1r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:223
wm8994_register_set
int32_t wm8994_register_set(wm8994_ctx_t *ctx, uint16_t reg, uint16_t value)
Definition: wm8994_reg.c:86
wm8994_pwr_mgmt_6_aif3_tri
int32_t wm8994_pwr_mgmt_6_aif3_tri(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1474
wm8994_spk_right_vol_spkout_mute_n
int32_t wm8994_spk_right_vol_spkout_mute_n(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2671
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int32_t wm8994_spkmixl_att_dac1_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2221
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int32_t wm8994_aif1_dac2_filter1_mono(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6081
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int32_t wm8994_lli_in1l_zc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1599
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int32_t wm8994_gpio1_gp1_op_cfg(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7856
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int32_t wm8994_pwr_mgmt_6_aif1_dacdat_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1374
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int32_t wm8994_aif1_adc2_filters_adc2r_hpf(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5778
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int32_t wm8994_aif1_dac2_lmrdacl_to_dac2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7031
wm8994_spkmixer_mixoutl_to_spkmixl
int32_t wm8994_spkmixer_mixoutl_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3823
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int32_t wm8994_aif1drc2_sig_det_rms(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6656
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int32_t wm8994_aif1_adc2_right_vol_adc2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5623
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int32_t wm8994_pwr_mgmt_5_dac2l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1199
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int32_t wm8994_rli_in2r_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1874
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int32_t wm8994_dc_servo1_dcs_ena_chan_0(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4273
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int32_t wm8994_inmixer1_inputs_clamp(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1499
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int32_t wm8994_aif1_adc1_filters_4fs(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5752
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int32_t wm8994_pwr_mgmt_5_aif2dacr_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1324
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int32_t wm8994_aif1_control1_fmt(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5155
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int32_t wm8994_aif1_dac1_lmradcl_to_dac1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6806
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int32_t wm8994_aif1drc1_qr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6231
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int32_t wm8994_dc_servo1_dcs_ena_chan_1(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4298
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int32_t wm8994_spk_right_vol_spkout_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2721
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int32_t wm8994_dac2_right_vol_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7706
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int32_t wm8994_spkmixl_att_mixoutl_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2246
WM8994_Write_Func
int32_t(* WM8994_Write_Func)(void *, uint16_t, uint8_t *, uint16_t)
Definition: wm8994_reg.h:368
wm8994_inmixer1_in1lp_mixinl_boost
int32_t wm8994_inmixer1_in1lp_mixinl_boost(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1524
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int32_t wm8994_outmixer2_dac1r_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3523
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int32_t wm8994_spk_right_vol_spkout_zc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2696
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int32_t wm8994_class_w_cp_dyn_src_sel(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4248
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int32_t wm8994_lo_hpout1l_vol_r(wm8994_ctx_t *ctx, uint16_t *value)
Definition: wm8994_reg.c:1999
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int32_t wm8994_aif1_adc1_filters_hpf_cut(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5726
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int32_t wm8994_aif1_sr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5108
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int32_t wm8994_outmixer1_dac1l_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3298
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int32_t wm8994_aif1drc1_sig_det(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6281
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int32_t wm8994_aif1_adc2_left_vol_adc2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5573
wm8994_pwr_mgmt_4_aif1adc1l_ena
int32_t wm8994_pwr_mgmt_4_aif1adc1l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:998
wm8994_adc2rmr_adc2r_to_aif1adc2r
int32_t wm8994_adc2rmr_adc2r_to_aif1adc2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7406
wm8994_pwr_mgmt_2_in1l_ena
int32_t wm8994_pwr_mgmt_2_in1l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:398
wm8994_outmixer2_in1r_to_mixoutr
int32_t wm8994_outmixer2_in1r_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3573
wm8994_dac2_left_vol_mute
int32_t wm8994_dac2_left_vol_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7631
wm8994_aif1_dac1_lmradcr_to_dac1l
int32_t wm8994_aif1_dac1_lmradcr_to_dac1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6831
wm8994_pwr_mgmt_5_aif1dac2r_ena
int32_t wm8994_pwr_mgmt_5_aif1dac2r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1274
wm8994_aif1_adc2_filters_adc2l_hpf
int32_t wm8994_aif1_adc2_filters_adc2l_hpf(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5804
wm8994_dc_servo1_dcs_trig_dac_wr_0
int32_t wm8994_dc_servo1_dcs_trig_dac_wr_0(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4323
wm8994_outmixer2_dac1r_to_hpout1r
int32_t wm8994_outmixer2_dac1r_to_hpout1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3723
wm8994_spkmixr_att_dac1_vol
int32_t wm8994_spkmixr_att_dac1_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2396
wm8994_outmixer1_mixinr_to_mixoutl
int32_t wm8994_outmixer1_mixinr_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3473
wm8994_clocking2_toclk_div
int32_t wm8994_clocking2_toclk_div(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5058
wm8994_pwr_mgmt_3_mixoutrvol_ena
int32_t wm8994_pwr_mgmt_3_mixoutrvol_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:623
wm8994_dc_servo1_dcs_trig_series_0
int32_t wm8994_dc_servo1_dcs_trig_series_0(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4424
wm8994_aif1_dac2_filter1_muterate
int32_t wm8994_aif1_dac2_filter1_muterate(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6056
wm8994_wseq_ctrl1_start
int32_t wm8994_wseq_ctrl1_start(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4707
wm8994_ro_hpout1r_vu
int32_t wm8994_ro_hpout1r_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2171
wm8994_write_reg
int32_t wm8994_write_reg(wm8994_ctx_t *ctx, uint16_t reg, uint16_t *data, uint16_t length)
Definition: wm8994_reg.c:69
wm8994_inmixer4_mixoutr_mixinr_vol
int32_t wm8994_inmixer4_mixoutr_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3072
wm8994_gpio1_gp1_pd
int32_t wm8994_gpio1_gp1_pd(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7906
wm8994_aif1drc2_anticlip
int32_t wm8994_aif1drc2_anticlip(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6481
wm8994_aif1_adc1_left_vol_vu
int32_t wm8994_aif1_adc1_left_vol_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5498
wm8994_spk_left_vol_spkout_vol
int32_t wm8994_spk_left_vol_spkout_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2546
wm8994_aif1_adc2_filters_4fs
int32_t wm8994_aif1_adc2_filters_4fs(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5856
wm8994_analog_hp_hpout1r_rmv_short
int32_t wm8994_analog_hp_hpout1r_rmv_short(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4577
wm8994_analog_hp_hpout1l_rmv_short
int32_t wm8994_analog_hp_hpout1l_rmv_short(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4652
wm8994_aif1_control1_adcl_src
int32_t wm8994_aif1_control1_adcl_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5349
wm8994_dac1_mixer_vol_adcl
int32_t wm8994_dac1_mixer_vol_adcl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6681
wm8994_pwr_mgmt_3_spklvol_ena
int32_t wm8994_pwr_mgmt_3_spklvol_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:673
wm8994_dac1_left_vol_vset
int32_t wm8994_dac1_left_vol_vset(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7431
wm8994_pwr_mgmt_2_in2r_ena
int32_t wm8994_pwr_mgmt_2_in2r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:373
wm8994_aif1drc2_qr
int32_t wm8994_aif1drc2_qr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6506
wm8994_pwr_mgmt_5_dac1r_ena
int32_t wm8994_pwr_mgmt_5_dac1r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1123
wm8994_aif1_dac1_filter1_unmute_ramp
int32_t wm8994_aif1_dac1_filter1_unmute_ramp(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5906
wm8994_aif1_dac2_lmradcl_to_dac2l
int32_t wm8994_aif1_dac2_lmradcl_to_dac2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7056
wm8994_analog_hp_hpout1l_dly
int32_t wm8994_analog_hp_hpout1l_dly(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4602
wm8994_gpio1_gp1_pu
int32_t wm8994_gpio1_gp1_pu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7931
wm8994_aif1drc2_adc2r_drc_ena
int32_t wm8994_aif1drc2_adc2r_drc_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6406
wm8994_pwr_mgmt_4_adcl_ena
int32_t wm8994_pwr_mgmt_4_adcl_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:848
wm8994_pwr_mgmt_4_dmic2l_ena
int32_t wm8994_pwr_mgmt_4_dmic2l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:948
wm8994_pwr_mgmt_4_aif2adcl_ena
int32_t wm8994_pwr_mgmt_4_aif2adcl_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1098
wm8994_rli_in1r_zc
int32_t wm8994_rli_in1r_zc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1799
wm8994_aif1_adc1_left_vol_adc1l_r
int32_t wm8994_aif1_adc1_left_vol_adc1l_r(wm8994_ctx_t *ctx, uint16_t *value)
Definition: wm8994_reg.c:5476
wm8994_aif1_adc2_left_vol_vu
int32_t wm8994_aif1_adc2_left_vol_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5598
wm8994_lo_hpout1l_mute_n
int32_t wm8994_lo_hpout1l_mute_n(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2021
wm8994_outmixer1_in2ln_to_mixoutl
int32_t wm8994_outmixer1_in2ln_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3398
wm8994_pwr_mgmt_6_aif2_adcdat_src
int32_t wm8994_pwr_mgmt_6_aif2_adcdat_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1424
wm8994_aif1_dac2_filter1_deemp
int32_t wm8994_aif1_dac2_filter1_deemp(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6006
wm8994_outmixer1_mixinl_to_mixoutl
int32_t wm8994_outmixer1_mixinl_to_mixoutl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3448
wm8994_lo_hpout1l_vu
int32_t wm8994_lo_hpout1l_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2071
wm8994_inmixer4_in1r_mixinr_vol
int32_t wm8994_inmixer4_in1r_mixinr_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3098
wm8994_pwr_mgmt_6_aif3_adcdat_src
int32_t wm8994_pwr_mgmt_6_aif3_adcdat_src(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1449
wm8994_spk_right_vol_spkout_vol
int32_t wm8994_spk_right_vol_spkout_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2646
wm8994_aif1_control1_wl_r
int32_t wm8994_aif1_control1_wl_r(wm8994_ctx_t *ctx, uint16_t *value)
Definition: wm8994_reg.c:5227
wm8994_dc_servo1_dcs_trig_startup_0
int32_t wm8994_dc_servo1_dcs_trig_startup_0(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4373
wm8994_aif1_clk_rate
int32_t wm8994_aif1_clk_rate(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5083
wm8994_outmixer2_in2rp_to_mixoutr
int32_t wm8994_outmixer2_in2rp_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3548
wm8994_clocking2_dbclk_div
int32_t wm8994_clocking2_dbclk_div(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5033
wm8994_pwr_mgmt_1_hpout1l_ena
int32_t wm8994_pwr_mgmt_1_hpout1l_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:248
wm8994_pwr_mgmt_2_opclk_ena
int32_t wm8994_pwr_mgmt_2_opclk_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:498
wm8994_aif1_dac1_rmradcr_to_dac1r
int32_t wm8994_aif1_dac1_rmradcr_to_dac1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6956
wm8994_pwr_mgmt_1_micb2_ena
int32_t wm8994_pwr_mgmt_1_micb2_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:198
wm8994_ctx_t
Definition: wm8994_reg.h:371
wm8994_oversampling_dac_osr128
int32_t wm8994_oversampling_dac_osr128(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7731
wm8994_gpio1_gp1_lvl
int32_t wm8994_gpio1_gp1_lvl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7806
wm8994_inmixer2_in2rn_to_in2r
int32_t wm8994_inmixer2_in2rn_to_in2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2796
wm8994_spkmixr_att_mixinl_vol
int32_t wm8994_spkmixr_att_mixinl_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2471
wm8994_lli_in2l_vol
int32_t wm8994_lli_in2l_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1674
wm8994_pwr_mgmt_1_hpout2_ena
int32_t wm8994_pwr_mgmt_1_hpout2_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:273
wm8994_dac1_left_vol_mute
int32_t wm8994_dac1_left_vol_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7481
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int32_t wm8994_aif1_clocking1_div(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4808
wm8994_inmixer3_in1l_to_mixinl
int32_t wm8994_inmixer3_in1l_to_mixinl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2997
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int32_t wm8994_inmixer2_in1lp_to_in1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2871
wm8994_outmixer2_in1l_to_mixoutr
int32_t wm8994_outmixer2_in1l_to_mixoutr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3598
wm8994_aif1_dac2_rmrdac1r_to_dac2r
int32_t wm8994_aif1_dac2_rmrdac1r_to_dac2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7106
wm8994_spkmixr_att_in1rp_vol
int32_t wm8994_spkmixr_att_in1rp_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2446
wm8994_aif1drc2_dac2_drc_ena
int32_t wm8994_aif1drc2_dac2_drc_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6456
wm8994_inmixer4_in1r_to_mixinr
int32_t wm8994_inmixer4_in1r_to_mixinr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3123
wm8994_lli_in1l_vol
int32_t wm8994_lli_in1l_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1574
wm8994_spk_left_vol_spkout_vu
int32_t wm8994_spk_left_vol_spkout_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2621
wm8994_aif1_ms_mstr
int32_t wm8994_aif1_ms_mstr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5426
wm8994_aif1drc2_knee2_op_ena
int32_t wm8994_aif1drc2_knee2_op_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6531
wm8994_aif1_adc1_right_vol_vu
int32_t wm8994_aif1_adc1_right_vol_vu(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5548
wm8994_spkmixer_in1rp_to_spkmixr
int32_t wm8994_spkmixer_in1rp_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3848
wm8994_aif1drc1_anticlip
int32_t wm8994_aif1drc1_anticlip(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6206
wm8994_spkmixl_att_spkab_refsel
int32_t wm8994_spkmixl_att_spkab_refsel(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2346
wm8994_aif1drc1_sig_det_rms
int32_t wm8994_aif1drc1_sig_det_rms(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6381
wm8994_pwr_mgmt_1_vmid_sel
int32_t wm8994_pwr_mgmt_1_vmid_sel(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:148
wm8994_aif1_adc1_left_vol_adc1l
int32_t wm8994_aif1_adc1_left_vol_adc1l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5451
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int32_t wm8994_spkmixer_dac2l_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3973
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int32_t wm8994_gpio1_gp1_db(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7831
wm8994_spkmixer_dac1l_to_spkmixl
int32_t wm8994_spkmixer_dac1l_to_spkmixl(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3773
wm8994_clocking1_aif1dspclk_ena
int32_t wm8994_clocking1_aif1dspclk_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4958
wm8994_pwr_mgmt_5_dac2r_ena
int32_t wm8994_pwr_mgmt_5_dac2r_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1174
wm8994_aif1_dac1_rmrdac1r_to_dac1r
int32_t wm8994_aif1_dac1_rmrdac1r_to_dac1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6856
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int32_t wm8994_pwr_mgmt_4_adcr_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:823
wm8994_pwr_mgmt_3_lineout1p_ena
int32_t wm8994_pwr_mgmt_3_lineout1p_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:773
wm8994_adc2rmr_aif2dacl_to_aif1adc2r
int32_t wm8994_adc2rmr_aif2dacl_to_aif1adc2r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7381
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int32_t wm8994_aif1_dac1_filter1_mono(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5956
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int32_t wm8994_pwr_mgmt_3_spkrvol_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:698
wm8994_inmixer2_in2ln_to_in2l
int32_t wm8994_inmixer2_in2ln_to_in2l(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2896
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int32_t wm8994_aif1drc2_ng_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6606
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int32_t wm8994_spkmixer_mixoutr_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3798
wm8994_spkmixl_att_vol
int32_t wm8994_spkmixl_att_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2196
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int32_t wm8994_pwr_mgmt_3_lineout1n_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:798
wm8994_spkmixl_att_in1lp_vol
int32_t wm8994_spkmixl_att_in1lp_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2271
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int32_t wm8994_antipop2_vmid_ramp(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4098
wm8994_aif1_dac1_rmradcl_to_dac1r
int32_t wm8994_aif1_dac1_rmradcl_to_dac1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6931
wm8994_lli_in1l_mute
int32_t wm8994_lli_in1l_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1624
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int32_t wm8994_dac1_right_vol_mute(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:7556
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int32_t wm8994_aif1_dac1_rmrdacr_to_dac1r(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:6906
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int32_t wm8994_aif1_control1_adc_tdm(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:5299
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int32_t wm8994_spkmixer_dac1r_to_spkmixr(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:3748
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int32_t wm8994_wseq_ctrl1_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4758
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int32_t wm8994_lli_in2l_zc(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:1699
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int32_t wm8994_aif1_clocking1_ena(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:4783
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int32_t wm8994_ro_hpout1r_vol(wm8994_ctx_t *ctx, uint16_t value)
Definition: wm8994_reg.c:2096

picovoice_driver
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autogenerated on Fri Apr 1 2022 02:14:55