Public Attributes | List of all members
GPV_TypeDef Struct Reference

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#include <stm32h735xx.h>

Public Attributes

__IO uint32_t AXI_COMP_ID_0
 
__IO uint32_t AXI_COMP_ID_1
 
__IO uint32_t AXI_COMP_ID_2
 
__IO uint32_t AXI_COMP_ID_3
 
__IO uint32_t AXI_INI1_FN_MOD
 
__IO uint32_t AXI_INI1_FN_MOD2
 
__IO uint32_t AXI_INI1_FN_MOD_AHB
 
__IO uint32_t AXI_INI1_READ_QOS
 
__IO uint32_t AXI_INI1_WRITE_QOS
 
__IO uint32_t AXI_INI2_FN_MOD
 
__IO uint32_t AXI_INI2_READ_QOS
 
__IO uint32_t AXI_INI2_WRITE_QOS
 
__IO uint32_t AXI_INI3_FN_MOD
 
__IO uint32_t AXI_INI3_FN_MOD2
 
__IO uint32_t AXI_INI3_FN_MOD_AHB
 
__IO uint32_t AXI_INI3_READ_QOS
 
__IO uint32_t AXI_INI3_WRITE_QOS
 
__IO uint32_t AXI_INI4_FN_MOD
 
__IO uint32_t AXI_INI4_READ_QOS
 
__IO uint32_t AXI_INI4_WRITE_QOS
 
__IO uint32_t AXI_INI5_FN_MOD
 
__IO uint32_t AXI_INI5_READ_QOS
 
__IO uint32_t AXI_INI5_WRITE_QOS
 
__IO uint32_t AXI_INI6_FN_MOD
 
__IO uint32_t AXI_INI6_READ_QOS
 
__IO uint32_t AXI_INI6_WRITE_QOS
 
__IO uint32_t AXI_PERIPH_ID_0
 
__IO uint32_t AXI_PERIPH_ID_1
 
__IO uint32_t AXI_PERIPH_ID_2
 
__IO uint32_t AXI_PERIPH_ID_3
 
__IO uint32_t AXI_PERIPH_ID_4
 
uint32_t AXI_PERIPH_ID_5
 
uint32_t AXI_PERIPH_ID_6
 
uint32_t AXI_PERIPH_ID_7
 
__IO uint32_t AXI_TARG1_FN_MOD
 
__IO uint32_t AXI_TARG1_FN_MOD2
 
__IO uint32_t AXI_TARG1_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG1_FN_MOD_LB
 
__IO uint32_t AXI_TARG2_FN_MOD
 
__IO uint32_t AXI_TARG2_FN_MOD2
 
__IO uint32_t AXI_TARG2_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG2_FN_MOD_LB
 
__IO uint32_t AXI_TARG3_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG4_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG5_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG6_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG7_FN_MOD
 
__IO uint32_t AXI_TARG7_FN_MOD2
 
__IO uint32_t AXI_TARG7_FN_MOD_ISS_BM
 
__IO uint32_t AXI_TARG7_FN_MOD_LB
 
__IO uint32_t AXI_TARG8_FN_MOD
 
__IO uint32_t AXI_TARG8_FN_MOD2
 
__IO uint32_t AXI_TARG8_FN_MOD_ISS_BM
 
uint32_t RESERVED0 [2036]
 
uint32_t RESERVED1 [2]
 
uint32_t RESERVED10 [1023]
 
uint32_t RESERVED11 [1023]
 
uint32_t RESERVED117 [6]
 
uint32_t RESERVED118 [56]
 
uint32_t RESERVED119 [58310]
 
uint32_t RESERVED12 [1023]
 
uint32_t RESERVED13 [1023]
 
uint32_t RESERVED14 [6]
 
uint32_t RESERVED15
 
uint32_t RESERVED16 [54]
 
uint32_t RESERVED17 [959]
 
uint32_t RESERVED18 [53]
 
uint32_t RESERVED19 [1021]
 
uint32_t RESERVED2 [6]
 
uint32_t RESERVED20 [966]
 
uint32_t RESERVED21 [53]
 
uint32_t RESERVED22 [1021]
 
uint32_t RESERVED23 [1021]
 
uint32_t RESERVED24 [1021]
 
uint32_t RESERVED3
 
uint32_t RESERVED4 [54]
 
uint32_t RESERVED5 [959]
 
uint32_t RESERVED6 [6]
 
uint32_t RESERVED7
 
uint32_t RESERVED8 [54]
 
uint32_t RESERVED9 [959]
 

Detailed Description

Global Programmer View.

Definition at line 2073 of file stm32h735xx.h.

Member Data Documentation

◆ AXI_COMP_ID_0

__IO uint32_t GPV_TypeDef::AXI_COMP_ID_0

AXI interconnect - component ID0 register, Address offset: 0x1FF0

Definition at line 2084 of file stm32h735xx.h.

◆ AXI_COMP_ID_1

__IO uint32_t GPV_TypeDef::AXI_COMP_ID_1

AXI interconnect - component ID1 register, Address offset: 0x1FF4

Definition at line 2085 of file stm32h735xx.h.

◆ AXI_COMP_ID_2

__IO uint32_t GPV_TypeDef::AXI_COMP_ID_2

AXI interconnect - component ID2 register, Address offset: 0x1FF8

Definition at line 2086 of file stm32h735xx.h.

◆ AXI_COMP_ID_3

__IO uint32_t GPV_TypeDef::AXI_COMP_ID_3

AXI interconnect - component ID3 register, Address offset: 0x1FFC

Definition at line 2087 of file stm32h735xx.h.

◆ AXI_INI1_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_INI1_FN_MOD

AXI interconnect - INI 1 issuing functionality modification register, Address offset: 0x42108

Definition at line 2132 of file stm32h735xx.h.

◆ AXI_INI1_FN_MOD2

__IO uint32_t GPV_TypeDef::AXI_INI1_FN_MOD2

AXI interconnect - INI 1 functionality modification 2 register, Address offset: 0x42024

Definition at line 2127 of file stm32h735xx.h.

◆ AXI_INI1_FN_MOD_AHB

__IO uint32_t GPV_TypeDef::AXI_INI1_FN_MOD_AHB

AXI interconnect - INI 1 AHB functionality modification register, Address offset: 0x42028

Definition at line 2128 of file stm32h735xx.h.

◆ AXI_INI1_READ_QOS

__IO uint32_t GPV_TypeDef::AXI_INI1_READ_QOS

AXI interconnect - INI 1 read QoS register, Address offset: 0x42100

Definition at line 2130 of file stm32h735xx.h.

◆ AXI_INI1_WRITE_QOS

__IO uint32_t GPV_TypeDef::AXI_INI1_WRITE_QOS

AXI interconnect - INI 1 write QoS register, Address offset: 0x42104

Definition at line 2131 of file stm32h735xx.h.

◆ AXI_INI2_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_INI2_FN_MOD

AXI interconnect - INI 2 issuing functionality modification register, Address offset: 0x43108

Definition at line 2136 of file stm32h735xx.h.

◆ AXI_INI2_READ_QOS

__IO uint32_t GPV_TypeDef::AXI_INI2_READ_QOS

AXI interconnect - INI 2 read QoS register, Address offset: 0x43100

Definition at line 2134 of file stm32h735xx.h.

◆ AXI_INI2_WRITE_QOS

__IO uint32_t GPV_TypeDef::AXI_INI2_WRITE_QOS

AXI interconnect - INI 2 write QoS register, Address offset: 0x43104

Definition at line 2135 of file stm32h735xx.h.

◆ AXI_INI3_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_INI3_FN_MOD

AXI interconnect - INI 3 issuing functionality modification register, Address offset: 0x44108

Definition at line 2143 of file stm32h735xx.h.

◆ AXI_INI3_FN_MOD2

__IO uint32_t GPV_TypeDef::AXI_INI3_FN_MOD2

AXI interconnect - INI 3 functionality modification 2 register, Address offset: 0x44024

Definition at line 2138 of file stm32h735xx.h.

◆ AXI_INI3_FN_MOD_AHB

__IO uint32_t GPV_TypeDef::AXI_INI3_FN_MOD_AHB

AXI interconnect - INI 3 AHB functionality modification register, Address offset: 0x44028

Definition at line 2139 of file stm32h735xx.h.

◆ AXI_INI3_READ_QOS

__IO uint32_t GPV_TypeDef::AXI_INI3_READ_QOS

AXI interconnect - INI 3 read QoS register, Address offset: 0x44100

Definition at line 2141 of file stm32h735xx.h.

◆ AXI_INI3_WRITE_QOS

__IO uint32_t GPV_TypeDef::AXI_INI3_WRITE_QOS

AXI interconnect - INI 3 write QoS register, Address offset: 0x44104

Definition at line 2142 of file stm32h735xx.h.

◆ AXI_INI4_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_INI4_FN_MOD

AXI interconnect - INI 4 issuing functionality modification register, Address offset: 0x45108

Definition at line 2147 of file stm32h735xx.h.

◆ AXI_INI4_READ_QOS

__IO uint32_t GPV_TypeDef::AXI_INI4_READ_QOS

AXI interconnect - INI 4 read QoS register, Address offset: 0x45100

Definition at line 2145 of file stm32h735xx.h.

◆ AXI_INI4_WRITE_QOS

__IO uint32_t GPV_TypeDef::AXI_INI4_WRITE_QOS

AXI interconnect - INI 4 write QoS register, Address offset: 0x45104

Definition at line 2146 of file stm32h735xx.h.

◆ AXI_INI5_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_INI5_FN_MOD

AXI interconnect - INI 5 issuing functionality modification register, Address offset: 0x46108

Definition at line 2151 of file stm32h735xx.h.

◆ AXI_INI5_READ_QOS

__IO uint32_t GPV_TypeDef::AXI_INI5_READ_QOS

AXI interconnect - INI 5 read QoS register, Address offset: 0x46100

Definition at line 2149 of file stm32h735xx.h.

◆ AXI_INI5_WRITE_QOS

__IO uint32_t GPV_TypeDef::AXI_INI5_WRITE_QOS

AXI interconnect - INI 5 write QoS register, Address offset: 0x46104

Definition at line 2150 of file stm32h735xx.h.

◆ AXI_INI6_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_INI6_FN_MOD

AXI interconnect - INI 6 issuing functionality modification register, Address offset: 0x47108

Definition at line 2155 of file stm32h735xx.h.

◆ AXI_INI6_READ_QOS

__IO uint32_t GPV_TypeDef::AXI_INI6_READ_QOS

AXI interconnect - INI 6 read QoS register, Address offset: 0x47100

Definition at line 2153 of file stm32h735xx.h.

◆ AXI_INI6_WRITE_QOS

__IO uint32_t GPV_TypeDef::AXI_INI6_WRITE_QOS

AXI interconnect - INI 6 write QoS register, Address offset: 0x47104

Definition at line 2154 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_0

__IO uint32_t GPV_TypeDef::AXI_PERIPH_ID_0

AXI interconnect - peripheral ID0 register, Address offset: 0x1FE0

Definition at line 2080 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_1

__IO uint32_t GPV_TypeDef::AXI_PERIPH_ID_1

AXI interconnect - peripheral ID1 register, Address offset: 0x1FE4

Definition at line 2081 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_2

__IO uint32_t GPV_TypeDef::AXI_PERIPH_ID_2

AXI interconnect - peripheral ID2 register, Address offset: 0x1FE8

Definition at line 2082 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_3

__IO uint32_t GPV_TypeDef::AXI_PERIPH_ID_3

AXI interconnect - peripheral ID3 register, Address offset: 0x1FEC

Definition at line 2083 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_4

__IO uint32_t GPV_TypeDef::AXI_PERIPH_ID_4

AXI interconnect - peripheral ID4 register, Address offset: 0x1FD0

Definition at line 2076 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_5

uint32_t GPV_TypeDef::AXI_PERIPH_ID_5

Reserved, Address offset: 0x1FD4

Definition at line 2077 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_6

uint32_t GPV_TypeDef::AXI_PERIPH_ID_6

Reserved, Address offset: 0x1FD8

Definition at line 2078 of file stm32h735xx.h.

◆ AXI_PERIPH_ID_7

uint32_t GPV_TypeDef::AXI_PERIPH_ID_7

Reserved, Address offset: 0x1FDC

Definition at line 2079 of file stm32h735xx.h.

◆ AXI_TARG1_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_TARG1_FN_MOD

AXI interconnect - TARG 1 issuing functionality modification register, Address offset: 0x2108

Definition at line 2095 of file stm32h735xx.h.

◆ AXI_TARG1_FN_MOD2

__IO uint32_t GPV_TypeDef::AXI_TARG1_FN_MOD2

AXI interconnect - TARG 1 bus matrix functionality 2 register, Address offset: 0x2024

Definition at line 2091 of file stm32h735xx.h.

◆ AXI_TARG1_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG1_FN_MOD_ISS_BM

AXI interconnect - TARG 1 bus matrix issuing functionality register, Address offset: 0x2008

Definition at line 2089 of file stm32h735xx.h.

◆ AXI_TARG1_FN_MOD_LB

__IO uint32_t GPV_TypeDef::AXI_TARG1_FN_MOD_LB

AXI interconnect - TARG 1 long burst functionality modification register, Address offset: 0x202C

Definition at line 2093 of file stm32h735xx.h.

◆ AXI_TARG2_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_TARG2_FN_MOD

AXI interconnect - TARG 2 issuing functionality modification register, Address offset: 0x3108

Definition at line 2103 of file stm32h735xx.h.

◆ AXI_TARG2_FN_MOD2

__IO uint32_t GPV_TypeDef::AXI_TARG2_FN_MOD2

AXI interconnect - TARG 2 bus matrix functionality 2 register, Address offset: 0x3024

Definition at line 2099 of file stm32h735xx.h.

◆ AXI_TARG2_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG2_FN_MOD_ISS_BM

AXI interconnect - TARG 2 bus matrix issuing functionality register, Address offset: 0x3008

Definition at line 2097 of file stm32h735xx.h.

◆ AXI_TARG2_FN_MOD_LB

__IO uint32_t GPV_TypeDef::AXI_TARG2_FN_MOD_LB

AXI interconnect - TARG 2 long burst functionality modification register, Address offset: 0x302C

Definition at line 2101 of file stm32h735xx.h.

◆ AXI_TARG3_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG3_FN_MOD_ISS_BM

AXI interconnect - TARG 3 bus matrix issuing functionality register, Address offset: 0x4008

Definition at line 2105 of file stm32h735xx.h.

◆ AXI_TARG4_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG4_FN_MOD_ISS_BM

AXI interconnect - TARG 4 bus matrix issuing functionality register, Address offset: 0x5008

Definition at line 2107 of file stm32h735xx.h.

◆ AXI_TARG5_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG5_FN_MOD_ISS_BM

AXI interconnect - TARG 5 bus matrix issuing functionality register, Address offset: 0x6008

Definition at line 2109 of file stm32h735xx.h.

◆ AXI_TARG6_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG6_FN_MOD_ISS_BM

AXI interconnect - TARG 6 bus matrix issuing functionality register, Address offset: 0x7008

Definition at line 2111 of file stm32h735xx.h.

◆ AXI_TARG7_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_TARG7_FN_MOD

AXI interconnect - TARG 7 issuing functionality modification register, Address offset: 0x8108

Definition at line 2119 of file stm32h735xx.h.

◆ AXI_TARG7_FN_MOD2

__IO uint32_t GPV_TypeDef::AXI_TARG7_FN_MOD2

AXI interconnect - TARG 7 bus matrix functionality 2 register, Address offset: 0x8024

Definition at line 2115 of file stm32h735xx.h.

◆ AXI_TARG7_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG7_FN_MOD_ISS_BM

AXI interconnect - TARG 7 bus matrix issuing functionality register, Address offset: 0x8008

Definition at line 2113 of file stm32h735xx.h.

◆ AXI_TARG7_FN_MOD_LB

__IO uint32_t GPV_TypeDef::AXI_TARG7_FN_MOD_LB

AXI interconnect - TARG 7 long burst functionality modification register, Address offset: 0x802C

Definition at line 2117 of file stm32h735xx.h.

◆ AXI_TARG8_FN_MOD

__IO uint32_t GPV_TypeDef::AXI_TARG8_FN_MOD

AXI interconnect - TARG 8 issuing functionality modification register, Address offset: 0x9108

Definition at line 2125 of file stm32h735xx.h.

◆ AXI_TARG8_FN_MOD2

__IO uint32_t GPV_TypeDef::AXI_TARG8_FN_MOD2

AXI interconnect - TARG 8 bus matrix functionality 2 register, Address offset: 0x9024

Definition at line 2123 of file stm32h735xx.h.

◆ AXI_TARG8_FN_MOD_ISS_BM

__IO uint32_t GPV_TypeDef::AXI_TARG8_FN_MOD_ISS_BM

AXI interconnect - TARG 8 bus matrix issuing functionality register, Address offset: 0x9008

Definition at line 2121 of file stm32h735xx.h.

◆ RESERVED0

uint32_t GPV_TypeDef::RESERVED0[2036]

Reserved, Address offset: 0x00-0x1FCC

Definition at line 2075 of file stm32h735xx.h.

◆ RESERVED1

uint32_t GPV_TypeDef::RESERVED1[2]

Reserved, Address offset: 0x2000-0x2004

Definition at line 2088 of file stm32h735xx.h.

◆ RESERVED10

uint32_t GPV_TypeDef::RESERVED10[1023]

Reserved, Address offset: 0x400C-0x5004

Definition at line 2106 of file stm32h735xx.h.

◆ RESERVED11

uint32_t GPV_TypeDef::RESERVED11[1023]

Reserved, Address offset: 0x500C-0x6004

Definition at line 2108 of file stm32h735xx.h.

◆ RESERVED117

uint32_t GPV_TypeDef::RESERVED117[6]

Reserved, Address offset: 0x900C-0x9020

Definition at line 2122 of file stm32h735xx.h.

◆ RESERVED118

uint32_t GPV_TypeDef::RESERVED118[56]

Reserved, Address offset: 0x9028-0x9104

Definition at line 2124 of file stm32h735xx.h.

◆ RESERVED119

uint32_t GPV_TypeDef::RESERVED119[58310]

Reserved, Address offset: 0x910C-0x42020

Definition at line 2126 of file stm32h735xx.h.

◆ RESERVED12

uint32_t GPV_TypeDef::RESERVED12[1023]

Reserved, Address offset: 0x600C-0x7004

Definition at line 2110 of file stm32h735xx.h.

◆ RESERVED13

uint32_t GPV_TypeDef::RESERVED13[1023]

Reserved, Address offset: 0x700C-0x8004

Definition at line 2112 of file stm32h735xx.h.

◆ RESERVED14

uint32_t GPV_TypeDef::RESERVED14[6]

Reserved, Address offset: 0x800C-0x8020

Definition at line 2114 of file stm32h735xx.h.

◆ RESERVED15

uint32_t GPV_TypeDef::RESERVED15

Reserved, Address offset: 0x8028

Definition at line 2116 of file stm32h735xx.h.

◆ RESERVED16

uint32_t GPV_TypeDef::RESERVED16[54]

Reserved, Address offset: 0x8030-0x8104

Definition at line 2118 of file stm32h735xx.h.

◆ RESERVED17

uint32_t GPV_TypeDef::RESERVED17[959]

Reserved, Address offset: 0x810C-0x9004

Definition at line 2120 of file stm32h735xx.h.

◆ RESERVED18

uint32_t GPV_TypeDef::RESERVED18[53]

Reserved, Address offset: 0x4202C-0x420FC

Definition at line 2129 of file stm32h735xx.h.

◆ RESERVED19

uint32_t GPV_TypeDef::RESERVED19[1021]

Reserved, Address offset: 0x4210C-0x430FC

Definition at line 2133 of file stm32h735xx.h.

◆ RESERVED2

uint32_t GPV_TypeDef::RESERVED2[6]

Reserved, Address offset: 0x200C-0x2020

Definition at line 2090 of file stm32h735xx.h.

◆ RESERVED20

uint32_t GPV_TypeDef::RESERVED20[966]

Reserved, Address offset: 0x4310C-0x44020

Definition at line 2137 of file stm32h735xx.h.

◆ RESERVED21

uint32_t GPV_TypeDef::RESERVED21[53]

Reserved, Address offset: 0x4402C-0x440FC

Definition at line 2140 of file stm32h735xx.h.

◆ RESERVED22

uint32_t GPV_TypeDef::RESERVED22[1021]

Reserved, Address offset: 0x4410C-0x450FC

Definition at line 2144 of file stm32h735xx.h.

◆ RESERVED23

uint32_t GPV_TypeDef::RESERVED23[1021]

Reserved, Address offset: 0x4510C-0x460FC

Definition at line 2148 of file stm32h735xx.h.

◆ RESERVED24

uint32_t GPV_TypeDef::RESERVED24[1021]

Reserved, Address offset: 0x4610C-0x470FC

Definition at line 2152 of file stm32h735xx.h.

◆ RESERVED3

uint32_t GPV_TypeDef::RESERVED3

Reserved, Address offset: 0x2028

Definition at line 2092 of file stm32h735xx.h.

◆ RESERVED4

uint32_t GPV_TypeDef::RESERVED4[54]

Reserved, Address offset: 0x2030-0x2104

Definition at line 2094 of file stm32h735xx.h.

◆ RESERVED5

uint32_t GPV_TypeDef::RESERVED5[959]

Reserved, Address offset: 0x210C-0x3004

Definition at line 2096 of file stm32h735xx.h.

◆ RESERVED6

uint32_t GPV_TypeDef::RESERVED6[6]

Reserved, Address offset: 0x300C-0x3020

Definition at line 2098 of file stm32h735xx.h.

◆ RESERVED7

uint32_t GPV_TypeDef::RESERVED7

Reserved, Address offset: 0x3028

Definition at line 2100 of file stm32h735xx.h.

◆ RESERVED8

uint32_t GPV_TypeDef::RESERVED8[54]

Reserved, Address offset: 0x3030-0x3104

Definition at line 2102 of file stm32h735xx.h.

◆ RESERVED9

uint32_t GPV_TypeDef::RESERVED9[959]

Reserved, Address offset: 0x310C-0x4004

Definition at line 2104 of file stm32h735xx.h.


The documentation for this struct was generated from the following file:


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:19