FMC NAND Timing parameters structure definition. More...
#include <stm32f7xx_ll_fmc.h>
Public Attributes | |
| uint32_t | HiZSetupTime |
| uint32_t | HoldSetupTime |
| uint32_t | SetupTime |
| uint32_t | WaitSetupTime |
FMC NAND Timing parameters structure definition.
Definition at line 532 of file stm32f7xx_ll_fmc.h.
| uint32_t FMC_NAND_PCC_TimingTypeDef::HiZSetupTime |
Defines the number of HCLK clock cycles during which the data bus is kept in HiZ after the start of a NAND-Flash write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between Min_Data = 0 and Max_Data = 254
Definition at line 553 of file stm32f7xx_ll_fmc.h.
| uint32_t FMC_NAND_PCC_TimingTypeDef::HoldSetupTime |
Defines the number of HCLK clock cycles to hold address (and data for write access) after the command de-assertion for NAND-Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between Min_Data = 0 and Max_Data = 254
Definition at line 546 of file stm32f7xx_ll_fmc.h.
| uint32_t FMC_NAND_PCC_TimingTypeDef::SetupTime |
Defines the number of HCLK cycles to setup address before the command assertion for NAND-Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a value between Min_Data = 0 and Max_Data = 254
Definition at line 534 of file stm32f7xx_ll_fmc.h.
| uint32_t FMC_NAND_PCC_TimingTypeDef::WaitSetupTime |
Defines the minimum number of HCLK cycles to assert the command for NAND-Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between Min_Data = 0 and Max_Data = 254
Definition at line 540 of file stm32f7xx_ll_fmc.h.