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21 #ifndef STM32H7xx_HAL_PWR_EX_H
22 #define STM32H7xx_HAL_PWR_EX_H
80 #if defined (PWR_CSR1_MMCVDO)
86 PWR_MMC_VOLTAGE_BELOW_1V2,
87 PWR_MMC_VOLTAGE_EQUAL_ABOVE_1V2
88 } PWREx_MMC_VoltageLevel;
104 #define PWR_WAKEUP_PIN6 PWR_WKUPEPR_WKUPEN6
105 #if defined (PWR_WKUPEPR_WKUPEN5)
106 #define PWR_WAKEUP_PIN5 PWR_WKUPEPR_WKUPEN5
108 #define PWR_WAKEUP_PIN4 PWR_WKUPEPR_WKUPEN4
109 #if defined (PWR_WKUPEPR_WKUPEN3)
110 #define PWR_WAKEUP_PIN3 PWR_WKUPEPR_WKUPEN3
112 #define PWR_WAKEUP_PIN2 PWR_WKUPEPR_WKUPEN2
113 #define PWR_WAKEUP_PIN1 PWR_WKUPEPR_WKUPEN1
116 #define PWR_WAKEUP_PIN6_HIGH PWR_WKUPEPR_WKUPEN6
117 #if defined (PWR_WKUPEPR_WKUPEN5)
118 #define PWR_WAKEUP_PIN5_HIGH PWR_WKUPEPR_WKUPEN5
120 #define PWR_WAKEUP_PIN4_HIGH PWR_WKUPEPR_WKUPEN4
121 #if defined (PWR_WKUPEPR_WKUPEN3)
122 #define PWR_WAKEUP_PIN3_HIGH PWR_WKUPEPR_WKUPEN3
124 #define PWR_WAKEUP_PIN2_HIGH PWR_WKUPEPR_WKUPEN2
125 #define PWR_WAKEUP_PIN1_HIGH PWR_WKUPEPR_WKUPEN1
128 #define PWR_WAKEUP_PIN6_LOW (PWR_WKUPEPR_WKUPP6 | PWR_WKUPEPR_WKUPEN6)
129 #if defined (PWR_WKUPEPR_WKUPP5)
130 #define PWR_WAKEUP_PIN5_LOW (PWR_WKUPEPR_WKUPP5 | PWR_WKUPEPR_WKUPEN5)
132 #define PWR_WAKEUP_PIN4_LOW (PWR_WKUPEPR_WKUPP4 | PWR_WKUPEPR_WKUPEN4)
133 #if defined (PWR_WKUPEPR_WKUPP3)
134 #define PWR_WAKEUP_PIN3_LOW (PWR_WKUPEPR_WKUPP3 | PWR_WKUPEPR_WKUPEN3)
136 #define PWR_WAKEUP_PIN2_LOW (PWR_WKUPEPR_WKUPP2 | PWR_WKUPEPR_WKUPEN2)
137 #define PWR_WAKEUP_PIN1_LOW (PWR_WKUPEPR_WKUPP1 | PWR_WKUPEPR_WKUPEN1)
145 #define PWR_PIN_POLARITY_HIGH (0x00000000U)
146 #define PWR_PIN_POLARITY_LOW (0x00000001U)
154 #define PWR_PIN_NO_PULL (0x00000000U)
155 #define PWR_PIN_PULL_UP (0x00000001U)
156 #define PWR_PIN_PULL_DOWN (0x00000002U)
164 #define PWR_WAKEUP_FLAG1 PWR_WKUPFR_WKUPF1
165 #define PWR_WAKEUP_FLAG2 PWR_WKUPFR_WKUPF2
166 #if defined (PWR_WKUPFR_WKUPF3)
167 #define PWR_WAKEUP_FLAG3 PWR_WKUPFR_WKUPF3
169 #define PWR_WAKEUP_FLAG4 PWR_WKUPFR_WKUPF4
170 #if defined (PWR_WKUPFR_WKUPF5)
171 #define PWR_WAKEUP_FLAG5 PWR_WKUPFR_WKUPF5
173 #define PWR_WAKEUP_FLAG6 PWR_WKUPFR_WKUPF6
174 #if defined (PWR_WKUPFR_WKUPF3)
175 #define PWR_WAKEUP_FLAG_ALL (PWR_WKUPFR_WKUPF1 | PWR_WKUPFR_WKUPF2 |\
176 PWR_WKUPFR_WKUPF3 | PWR_WKUPFR_WKUPF4 |\
177 PWR_WKUPFR_WKUPF5 | PWR_WKUPFR_WKUPF6)
179 #define PWR_WAKEUP_FLAG_ALL (PWR_WKUPFR_WKUPF1 | PWR_WKUPFR_WKUPF2 |\
180 PWR_WKUPFR_WKUPF4 | PWR_WKUPFR_WKUPF6)
186 #if defined (DUAL_CORE)
190 #define PWR_CORE_CPU1 (0x00000000U)
191 #define PWR_CORE_CPU2 (0x00000001U)
200 #define PWR_D1_DOMAIN (0x00000000U)
201 #if defined (PWR_CPUCR_PDDS_D2)
202 #define PWR_D2_DOMAIN (0x00000001U)
204 #define PWR_D3_DOMAIN (0x00000002U)
212 #if defined (DUAL_CORE)
213 #define PWR_D1_DOMAIN_FLAGS (0x00000000U)
214 #define PWR_D2_DOMAIN_FLAGS (0x00000001U)
215 #define PWR_ALL_DOMAIN_FLAGS (0x00000002U)
217 #define PWR_CPU_FLAGS (0x00000000U)
226 #define PWR_D3_DOMAIN_STOP (0x00000000U)
227 #define PWR_D3_DOMAIN_RUN (0x00000800U)
236 #define PWR_LDO_SUPPLY PWR_CR3_LDOEN
238 #define PWR_DIRECT_SMPS_SUPPLY PWR_CR3_SMPSEN
239 #define PWR_SMPS_1V8_SUPPLIES_LDO (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)
240 #define PWR_SMPS_2V5_SUPPLIES_LDO (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)
241 #define PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)
242 #define PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)
243 #define PWR_SMPS_1V8_SUPPLIES_EXT (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS)
244 #define PWR_SMPS_2V5_SUPPLIES_EXT (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS)
246 #define PWR_EXTERNAL_SOURCE_SUPPLY PWR_CR3_BYPASS
249 #define PWR_SUPPLY_CONFIG_MASK (PWR_CR3_SMPSLEVEL | PWR_CR3_SMPSEXTHP | \
250 PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)
252 #define PWR_SUPPLY_CONFIG_MASK (PWR_CR3_SCUEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)
262 #define PWR_AVDLEVEL_0 PWR_CR1_ALS_LEV0
264 #define PWR_AVDLEVEL_1 PWR_CR1_ALS_LEV1
266 #define PWR_AVDLEVEL_2 PWR_CR1_ALS_LEV2
268 #define PWR_AVDLEVEL_3 PWR_CR1_ALS_LEV3
277 #define PWR_AVD_MODE_NORMAL (0x00000000U)
278 #define PWR_AVD_MODE_IT_RISING (0x00010001U)
279 #define PWR_AVD_MODE_IT_FALLING (0x00010002U)
280 #define PWR_AVD_MODE_IT_RISING_FALLING (0x00010003U)
281 #define PWR_AVD_MODE_EVENT_RISING (0x00020001U)
282 #define PWR_AVD_MODE_EVENT_FALLING (0x00020002U)
283 #define PWR_AVD_MODE_EVENT_RISING_FALLING (0x00020003U)
291 #define PWR_REGULATOR_SVOS_SCALE5 (PWR_CR1_SVOS_0)
292 #define PWR_REGULATOR_SVOS_SCALE4 (PWR_CR1_SVOS_1)
293 #define PWR_REGULATOR_SVOS_SCALE3 (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1)
301 #define PWR_BATTERY_CHARGING_RESISTOR_5 (0x00000000U)
302 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR3_VBRS
310 #define PWR_VBAT_BETWEEN_HIGH_LOW_THRESHOLD (0x00000000U)
311 #define PWR_VBAT_BELOW_LOW_THRESHOLD PWR_CR2_VBATL
312 #define PWR_VBAT_ABOVE_HIGH_THRESHOLD PWR_CR2_VBATH
320 #define PWR_TEMP_BETWEEN_HIGH_LOW_THRESHOLD (0x00000000U)
321 #define PWR_TEMP_BELOW_LOW_THRESHOLD PWR_CR2_TEMPL
322 #define PWR_TEMP_ABOVE_HIGH_THRESHOLD PWR_CR2_TEMPH
329 #define PWR_EXTI_LINE_AVD EXTI_IMR1_IM16
335 #if defined (PWR_CR1_SRDRAMSO)
339 #define PWR_SRD_AHB_MEMORY_BLOCK PWR_CR1_SRDRAMSO
340 #define PWR_USB_FDCAN_MEMORY_BLOCK PWR_CR1_HSITFSO
341 #define PWR_GFXMMU_JPEG_MEMORY_BLOCK PWR_CR1_GFXSO
342 #define PWR_TCM_ECM_MEMORY_BLOCK PWR_CR1_ITCMSO
343 #define PWR_RAM1_AHB_MEMORY_BLOCK PWR_CR1_AHBRAM1SO
344 #define PWR_RAM2_AHB_MEMORY_BLOCK PWR_CR1_AHBRAM2SO
345 #define PWR_RAM1_AXI_MEMORY_BLOCK PWR_CR1_AXIRAM1SO
346 #define PWR_RAM2_AXI_MEMORY_BLOCK PWR_CR1_AXIRAM2SO
347 #define PWR_RAM3_AXI_MEMORY_BLOCK PWR_CR1_AXIRAM3SO
348 #define PWR_MEMORY_BLOCK_KEEP_ON 0U
349 #define PWR_MEMORY_BLOCK_SHUT_OFF 1U
368 #define __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
370 #if defined (DUAL_CORE)
375 #define __HAL_PWR_AVD_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2->IMR1, PWR_EXTI_LINE_AVD)
382 #define __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
384 #if defined (DUAL_CORE)
389 #define __HAL_PWR_AVD_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2->IMR1, PWR_EXTI_LINE_AVD)
396 #define __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
398 #if defined (DUAL_CORE)
403 #define __HAL_PWR_AVD_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2->EMR1, PWR_EXTI_LINE_AVD)
410 #define __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
412 #if defined (DUAL_CORE)
417 #define __HAL_PWR_AVD_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2->EMR1, PWR_EXTI_LINE_AVD)
424 #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
430 #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
436 #define __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
442 #define __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
448 #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
450 __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE(); \
451 __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE(); \
458 #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
460 __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE(); \
461 __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE(); \
468 #define __HAL_PWR_AVD_EXTI_GET_FLAG() ((READ_BIT(EXTI->PR1, PWR_EXTI_LINE_AVD) == PWR_EXTI_LINE_AVD) ? 1UL : 0UL)
470 #if defined (DUAL_CORE)
475 #define __HAL_PWR_AVD_EXTID2_GET_FLAG() ((READ_BIT(EXTI_D2->PR1, PWR_EXTI_LINE_AVD) == PWR_EXTI_LINE_AVD) ? 1UL : 0UL)
482 #define __HAL_PWR_AVD_EXTI_CLEAR_FLAG() SET_BIT(EXTI->PR1, PWR_EXTI_LINE_AVD)
484 #if defined (DUAL_CORE)
489 #define __HAL_PWR_AVD_EXTID2_CLEAR_FLAG() SET_BIT(EXTI_D2->PR1, PWR_EXTI_LINE_AVD)
496 #define __HAL_PWR_AVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_AVD)
524 #if defined (PWR_CPUCR_RETDS_CD)
525 void HAL_PWREx_EnterSTOP2Mode (uint32_t Regulator, uint8_t STOPEntry);
532 #if defined (DUAL_CORE)
534 void HAL_PWREx_ClearDomainFlags (uint32_t DomainFlags);
537 void HAL_PWREx_ReleaseCore (uint32_t CPU);
542 #if defined (PWR_CR1_SRDRAMSO)
544 void HAL_PWREx_EnableMemoryShutOff (uint32_t MemoryBlock);
545 void HAL_PWREx_DisableMemoryShutOff (uint32_t MemoryBlock);
556 #if defined (PWR_WKUPEPR_WKUPEN3)
557 void HAL_PWREx_WKUP3_Callback (
void);
560 #if defined (PWR_WKUPEPR_WKUPEN5)
561 void HAL_PWREx_WKUP5_Callback (
void);
582 #if defined (PWR_CR1_BOOSTE)
584 void HAL_PWREx_EnableAnalogBooster (
void);
585 void HAL_PWREx_DisableAnalogBooster (
void);
599 #if defined (PWR_CSR1_MMCVDO)
600 PWREx_MMC_VoltageLevel HAL_PWREx_GetMMCVoltage (
void);
629 #define IS_PWR_SUPPLY(PWR_SOURCE) (((PWR_SOURCE) == PWR_LDO_SUPPLY) ||\
630 ((PWR_SOURCE) == PWR_DIRECT_SMPS_SUPPLY) ||\
631 ((PWR_SOURCE) == PWR_SMPS_1V8_SUPPLIES_LDO) ||\
632 ((PWR_SOURCE) == PWR_SMPS_2V5_SUPPLIES_LDO) ||\
633 ((PWR_SOURCE) == PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO) ||\
634 ((PWR_SOURCE) == PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO) ||\
635 ((PWR_SOURCE) == PWR_SMPS_1V8_SUPPLIES_EXT) ||\
636 ((PWR_SOURCE) == PWR_SMPS_2V5_SUPPLIES_EXT) ||\
637 ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY))
640 #define IS_PWR_SUPPLY(PWR_SOURCE) (((PWR_SOURCE) == PWR_LDO_SUPPLY) ||\
641 ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY))
645 #define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE3) ||\
646 ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE4) ||\
647 ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE5))
650 #if defined (PWR_CPUCR_PDDS_D2)
651 #define IS_PWR_DOMAIN(DOMAIN) (((DOMAIN) == PWR_D1_DOMAIN) ||\
652 ((DOMAIN) == PWR_D2_DOMAIN) ||\
653 ((DOMAIN) == PWR_D3_DOMAIN))
655 #define IS_PWR_DOMAIN(DOMAIN) (((DOMAIN) == PWR_D1_DOMAIN) ||\
656 ((DOMAIN) == PWR_D3_DOMAIN))
660 #define IS_D3_STATE(STATE) (((STATE) == PWR_D3_DOMAIN_STOP) ||\
661 ((STATE) == PWR_D3_DOMAIN_RUN))
664 #if defined (PWR_WKUPEPR_WKUPEN3)
665 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) ||\
666 ((PIN) == PWR_WAKEUP_PIN2) ||\
667 ((PIN) == PWR_WAKEUP_PIN3) ||\
668 ((PIN) == PWR_WAKEUP_PIN4) ||\
669 ((PIN) == PWR_WAKEUP_PIN5) ||\
670 ((PIN) == PWR_WAKEUP_PIN6) ||\
671 ((PIN) == PWR_WAKEUP_PIN1_HIGH) ||\
672 ((PIN) == PWR_WAKEUP_PIN2_HIGH) ||\
673 ((PIN) == PWR_WAKEUP_PIN3_HIGH) ||\
674 ((PIN) == PWR_WAKEUP_PIN4_HIGH) ||\
675 ((PIN) == PWR_WAKEUP_PIN5_HIGH) ||\
676 ((PIN) == PWR_WAKEUP_PIN6_HIGH) ||\
677 ((PIN) == PWR_WAKEUP_PIN1_LOW) ||\
678 ((PIN) == PWR_WAKEUP_PIN2_LOW) ||\
679 ((PIN) == PWR_WAKEUP_PIN3_LOW) ||\
680 ((PIN) == PWR_WAKEUP_PIN4_LOW) ||\
681 ((PIN) == PWR_WAKEUP_PIN5_LOW) ||\
682 ((PIN) == PWR_WAKEUP_PIN6_LOW))
684 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) ||\
685 ((PIN) == PWR_WAKEUP_PIN2) ||\
686 ((PIN) == PWR_WAKEUP_PIN4) ||\
687 ((PIN) == PWR_WAKEUP_PIN6) ||\
688 ((PIN) == PWR_WAKEUP_PIN1_HIGH) ||\
689 ((PIN) == PWR_WAKEUP_PIN2_HIGH) ||\
690 ((PIN) == PWR_WAKEUP_PIN4_HIGH) ||\
691 ((PIN) == PWR_WAKEUP_PIN6_HIGH) ||\
692 ((PIN) == PWR_WAKEUP_PIN1_LOW) ||\
693 ((PIN) == PWR_WAKEUP_PIN2_LOW) ||\
694 ((PIN) == PWR_WAKEUP_PIN4_LOW) ||\
695 ((PIN) == PWR_WAKEUP_PIN6_LOW))
699 #define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) (((POLARITY) == PWR_PIN_POLARITY_HIGH) ||\
700 ((POLARITY) == PWR_PIN_POLARITY_LOW))
703 #define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL) ||\
704 ((PULL) == PWR_PIN_PULL_UP) ||\
705 ((PULL) == PWR_PIN_PULL_DOWN))
708 #if defined (PWR_WKUPEPR_WKUPEN3)
709 #define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) ||\
710 ((FLAG) == PWR_WAKEUP_FLAG2) ||\
711 ((FLAG) == PWR_WAKEUP_FLAG3) ||\
712 ((FLAG) == PWR_WAKEUP_FLAG4) ||\
713 ((FLAG) == PWR_WAKEUP_FLAG5) ||\
714 ((FLAG) == PWR_WAKEUP_FLAG6) ||\
715 ((FLAG) == PWR_WAKEUP_FLAG_ALL))
717 #define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) ||\
718 ((FLAG) == PWR_WAKEUP_FLAG2) ||\
719 ((FLAG) == PWR_WAKEUP_FLAG4) ||\
720 ((FLAG) == PWR_WAKEUP_FLAG6) ||\
721 ((FLAG) == PWR_WAKEUP_FLAG_ALL))
725 #define IS_PWR_AVD_LEVEL(LEVEL) (((LEVEL) == PWR_AVDLEVEL_0) ||\
726 ((LEVEL) == PWR_AVDLEVEL_1) ||\
727 ((LEVEL) == PWR_AVDLEVEL_2) ||\
728 ((LEVEL) == PWR_AVDLEVEL_3))
731 #define IS_PWR_AVD_MODE(MODE) (((MODE) == PWR_AVD_MODE_IT_RISING) ||\
732 ((MODE) == PWR_AVD_MODE_IT_FALLING) ||\
733 ((MODE) == PWR_AVD_MODE_IT_RISING_FALLING) ||\
734 ((MODE) == PWR_AVD_MODE_EVENT_RISING) ||\
735 ((MODE) == PWR_AVD_MODE_EVENT_FALLING) ||\
736 ((MODE) == PWR_AVD_MODE_NORMAL) ||\
737 ((MODE) == PWR_AVD_MODE_EVENT_RISING_FALLING))
740 #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
741 ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
743 #define IS_PWR_D1_CPU(CPU) ((CPU) == CM7_CPUID)
745 #if defined (DUAL_CORE)
747 #define IS_PWR_CORE(CPU) (((CPU) == PWR_CORE_CPU1) || ((CPU) == PWR_CORE_CPU2))
750 #define IS_PWR_D2_CPU(CPU) ((CPU) == CM4_CPUID)
753 #define IS_PWR_DOMAIN_FLAG(FLAG) (((FLAG) == PWR_D1_DOMAIN_FLAGS) || \
754 ((FLAG) == PWR_D2_DOMAIN_FLAGS) || \
755 ((FLAG) == PWR_ALL_DOMAIN_FLAGS))
758 #if defined (PWR_CR1_SRDRAMSO)
760 #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_SRD_AHB_MEMORY_BLOCK) || \
761 ((BLOCK) == PWR_USB_FDCAN_MEMORY_BLOCK) || \
762 ((BLOCK) == PWR_GFXMMU_JPEG_MEMORY_BLOCK) || \
763 ((BLOCK) == PWR_TCM_ECM_MEMORY_BLOCK) || \
764 ((BLOCK) == PWR_RAM1_AHB_MEMORY_BLOCK) || \
765 ((BLOCK) == PWR_RAM2_AHB_MEMORY_BLOCK) || \
766 ((BLOCK) == PWR_RAM1_AXI_MEMORY_BLOCK) || \
767 ((BLOCK) == PWR_RAM2_AXI_MEMORY_BLOCK) || \
768 ((BLOCK) == PWR_RAM3_AXI_MEMORY_BLOCK))
void HAL_PWREx_EnableUSBVoltageDetector(void)
HAL_StatusTypeDef
HAL Status structures definition
void HAL_PWREx_ConfigD3Domain(uint32_t D3State)
void HAL_PWREx_ConfigAVD(PWREx_AVDTypeDef *sConfigAVD)
PWREx AVD configuration structure definition.
void HAL_PWREx_WKUP6_Callback(void)
void HAL_PWREx_DisableFlashPowerDown(void)
void HAL_PWREx_WAKEUP_PIN_IRQHandler(void)
This file contains HAL common defines, enumeration, macros and structures definitions.
PWREx Wakeup pin configuration structure definition.
void HAL_PWREx_EnterSTANDBYMode(uint32_t Domain)
uint32_t HAL_PWREx_GetVBATLevel(void)
HAL_StatusTypeDef HAL_PWREx_DisableUSBReg(void)
HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource)
void HAL_PWREx_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry, uint32_t Domain)
uint32_t HAL_PWREx_GetTemperatureLevel(void)
HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling)
void HAL_PWREx_EnableFlashPowerDown(void)
void HAL_PWREx_WKUP4_Callback(void)
void HAL_PWREx_ClearPendingEvent(void)
void HAL_PWREx_EnableAVD(void)
uint32_t HAL_PWREx_GetStopModeVoltageRange(void)
HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
void HAL_PWREx_DisableUSBVoltageDetector(void)
HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
uint32_t HAL_PWREx_GetWakeupFlag(uint32_t WakeUpFlag)
HAL_StatusTypeDef HAL_PWREx_EnableUSBReg(void)
void HAL_PWREx_DisableBatteryCharging(void)
void HAL_PWREx_EnableMonitoring(void)
uint32_t HAL_PWREx_GetVoltageRange(void)
void HAL_PWREx_WKUP2_Callback(void)
void HAL_PWREx_EnableWakeUpPin(PWREx_WakeupPinTypeDef *sPinParams)
void HAL_PWREx_DisableMonitoring(void)
uint32_t HAL_PWREx_GetSupplyConfig(void)
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
void HAL_PWREx_DisableAVD(void)
void HAL_PWREx_AVDCallback(void)
HAL_StatusTypeDef HAL_PWREx_ClearWakeupFlag(uint32_t WakeUpFlag)
void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue)
void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPin)
void HAL_PWREx_WKUP1_Callback(void)
void HAL_PWREx_PVD_AVD_IRQHandler(void)