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Classes | |
struct | ARM_MPU_Region_t |
Macros | |
#define | ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U)) |
Memory access permissions. More... | |
#define | ARM_MPU_ARMV8_H |
#define | ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U))) |
Memory Attribute. More... | |
#define | ARM_MPU_ATTR_DEVICE ( 0U ) |
Attribute for device memory (outer only) More... | |
#define | ARM_MPU_ATTR_DEVICE_GRE (3U) |
Device memory type Gathering, Re-ordering, Early Write Acknowledgement. More... | |
#define | ARM_MPU_ATTR_DEVICE_nGnRE (1U) |
Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. More... | |
#define | ARM_MPU_ATTR_DEVICE_nGnRnE (0U) |
Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. More... | |
#define | ARM_MPU_ATTR_DEVICE_nGRE (2U) |
Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. More... | |
#define | ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U)) |
Attribute for normal memory (outer and inner) More... | |
#define | ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) |
Attribute for non-cacheable, normal memory. More... | |
#define | ARM_MPU_RBAR(BASE, SH, RO, NP, XN) |
Region Base Address Register value. More... | |
#define | ARM_MPU_RLAR(LIMIT, IDX) |
Region Limit Address Register value. More... | |
#define | ARM_MPU_SH_INNER (3U) |
Normal memory inner shareable More... | |
#define | ARM_MPU_SH_NON (0U) |
Normal memory non-shareable More... | |
#define | ARM_MPU_SH_OUTER (2U) |
Normal memory outer shareable More... | |
Functions | |
__STATIC_INLINE void | ARM_MPU_ClrRegion (uint32_t rnr) |
__STATIC_INLINE void | ARM_MPU_ClrRegionEx (MPU_Type *mpu, uint32_t rnr) |
__STATIC_INLINE void | ARM_MPU_Disable (void) |
__STATIC_INLINE void | ARM_MPU_Enable (uint32_t MPU_Control) |
__STATIC_INLINE void | ARM_MPU_Load (uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt) |
__STATIC_INLINE void | ARM_MPU_LoadEx (MPU_Type *mpu, uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt) |
__STATIC_INLINE void | ARM_MPU_OrderedMemcpy (volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len) |
__STATIC_INLINE void | ARM_MPU_SetMemAttr (uint8_t idx, uint8_t attr) |
__STATIC_INLINE void | ARM_MPU_SetMemAttrEx (MPU_Type *mpu, uint8_t idx, uint8_t attr) |
__STATIC_INLINE void | ARM_MPU_SetRegion (uint32_t rnr, uint32_t rbar, uint32_t rlar) |
__STATIC_INLINE void | ARM_MPU_SetRegionEx (MPU_Type *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) |
#define ARM_MPU_AP_ | ( | RO, | |
NP | |||
) | (((RO & 1U) << 1U) | (NP & 1U)) |
Memory access permissions.
RO | Read-Only: Set to 1 for read-only memory. |
NP | Non-Privileged: Set to 1 for non-privileged memory. |
Definition at line 80 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ARMV8_H |
Definition at line 32 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR | ( | O, | |
I | |||
) | (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U))) |
Memory Attribute.
O | Outer memory attributes |
I | O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes |
Definition at line 65 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_DEVICE ( 0U ) |
Attribute for device memory (outer only)
Definition at line 35 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_DEVICE_GRE (3U) |
Device memory type Gathering, Re-ordering, Early Write Acknowledgement.
Definition at line 59 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U) |
Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.
Definition at line 53 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U) |
Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.
Definition at line 50 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_DEVICE_nGRE (2U) |
Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.
Definition at line 56 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_MEMORY_ | ( | NT, | |
WB, | |||
RA, | |||
WA | |||
) | (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U)) |
Attribute for normal memory (outer and inner)
NT | Non-Transient: Set to 1 for non-transient data. |
WB | Write-Back: Set to 1 to use write-back update policy. |
RA | Read Allocation: Set to 1 to use cache allocation on read miss. |
WA | Write Allocation: Set to 1 to use cache allocation on write miss. |
Definition at line 46 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) |
Attribute for non-cacheable, normal memory.
Definition at line 38 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_RBAR | ( | BASE, | |
SH, | |||
RO, | |||
NP, | |||
XN | |||
) |
Region Base Address Register value.
BASE | The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. |
SH | Defines the Shareability domain for this memory region. |
RO | Read-Only: Set to 1 for a read-only memory region. |
NP | Non-Privileged: Set to 1 for a non-privileged memory region. \oaram XN eXecute Never: Set to 1 for a non-executable memory region. |
Definition at line 89 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_RLAR | ( | LIMIT, | |
IDX | |||
) |
Region Limit Address Register value.
LIMIT | The limit address bits [31:5] for this memory region. The value is one extended. |
IDX | The attribute index to be associated with this memory region. |
Definition at line 99 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_SH_INNER (3U) |
Normal memory inner shareable
Definition at line 74 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_SH_NON (0U) |
Normal memory non-shareable
Definition at line 68 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
#define ARM_MPU_SH_OUTER (2U) |
Normal memory outer shareable
Definition at line 71 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_ClrRegion | ( | uint32_t | rnr | ) |
Clear and disable the given MPU region.
rnr | Region number to be cleared. |
Definition at line 228 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_ClrRegionEx | ( | MPU_Type * | mpu, |
uint32_t | rnr | ||
) |
Clear and disable the given MPU region of the given MPU.
mpu | Pointer to MPU to be used. |
rnr | Region number to be cleared. |
Definition at line 219 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_Disable | ( | void | ) |
Disable the MPU.
Definition at line 142 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_Enable | ( | uint32_t | MPU_Control | ) |
Enable the MPU.
MPU_Control | Default access permissions for unconfigured regions. |
Definition at line 130 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_Load | ( | uint32_t | rnr, |
ARM_MPU_Region_t const * | table, | ||
uint32_t | cnt | ||
) |
Load the given number of MPU regions from a table.
rnr | First region number to be configured. |
table | Pointer to the MPU configuration table. |
cnt | Amount of regions to be configured. |
Definition at line 328 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_LoadEx | ( | MPU_Type * | mpu, |
uint32_t | rnr, | ||
ARM_MPU_Region_t const * | table, | ||
uint32_t | cnt | ||
) |
Load the given number of MPU regions from a table to the given MPU.
mpu | Pointer to the MPU registers to be used. |
rnr | First region number to be configured. |
table | Pointer to the MPU configuration table. |
cnt | Amount of regions to be configured. |
Definition at line 298 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_OrderedMemcpy | ( | volatile uint32_t * | dst, |
const uint32_t *__RESTRICT | src, | ||
uint32_t | len | ||
) |
Memcopy with strictly ordered memory access, e.g. for register targets.
dst | Destination data is copied to. |
src | Source data is copied from. |
len | Amount of data words to be copied. |
Definition at line 283 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_SetMemAttr | ( | uint8_t | idx, |
uint8_t | attr | ||
) |
Set the memory attribute encoding.
idx | The attribute index to be set [0-7] |
attr | The attribute value to be set. |
Definition at line 199 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_SetMemAttrEx | ( | MPU_Type * | mpu, |
uint8_t | idx, | ||
uint8_t | attr | ||
) |
Set the memory attribute encoding to the given MPU.
mpu | Pointer to the MPU to be configured. |
idx | The attribute index to be set [0-7] |
attr | The attribute value to be set. |
Definition at line 182 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_SetRegion | ( | uint32_t | rnr, |
uint32_t | rbar, | ||
uint32_t | rlar | ||
) |
Configure the given MPU region.
rnr | Region number to be configured. |
rbar | Value for RBAR register. |
rlar | Value for RLAR register. |
Definition at line 261 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.
__STATIC_INLINE void ARM_MPU_SetRegionEx | ( | MPU_Type * | mpu, |
uint32_t | rnr, | ||
uint32_t | rbar, | ||
uint32_t | rlar | ||
) |
Configure the given MPU region of the given MPU.
mpu | Pointer to MPU to be used. |
rnr | Region number to be configured. |
rbar | Value for RBAR register. |
rlar | Value for RLAR register. |
Definition at line 249 of file stm32h735/stm32h735g-dk/Drivers/CMSIS/Include/mpu_armv8.h.