Macros
AHB/APB Peripheral Clock Sleep Enable Disable Status

Get the enable or disable status of the AHB/APB peripheral clock during Low Power (Sleep) mode. More...

Collaboration diagram for AHB/APB Peripheral Clock Sleep Enable Disable Status:

Macros

#define __HAL_RCC_ADC1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) == RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) != RESET)
 
#define __HAL_RCC_ADC2_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC2LPEN)) == RESET)
 
#define __HAL_RCC_ADC2_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC2LPEN)) != RESET)
 
#define __HAL_RCC_ADC3_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC3LPEN)) == RESET)
 
#define __HAL_RCC_ADC3_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC3LPEN)) != RESET)
 
#define __HAL_RCC_AXI_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_AXILPEN)) == RESET)
 
#define __HAL_RCC_AXI_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_AXILPEN)) != RESET)
 
#define __HAL_RCC_BKPSRAM_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_BKPSRAMLPEN)) == RESET)
 
#define __HAL_RCC_BKPSRAM_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_BKPSRAMLPEN)) != RESET)
 
#define __HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_CAN1LPEN)) == RESET)
 
#define __HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_CAN1LPEN)) != RESET)
 
#define __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) == RESET)
 
#define __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DMA2LPEN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DMA2LPEN)) != RESET)
 
#define __HAL_RCC_DTCM_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DTCMLPEN)) == RESET)
 
#define __HAL_RCC_DTCM_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DTCMLPEN)) != RESET)
 
#define __HAL_RCC_FLITF_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_FLITFLPEN)) == RESET)
 
#define __HAL_RCC_FLITF_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_FLITFLPEN)) != RESET)
 Get the enable or disable status of the AHB1 peripheral clock during Low Power (Sleep) mode. More...
 
#define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB3LPENR & (RCC_AHB3LPENR_FMCLPEN)) == RESET)
 
#define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB3LPENR & (RCC_AHB3LPENR_FMCLPEN)) != RESET)
 Get the enable or disable status of the AHB3 peripheral clock during Low Power (Sleep) mode. More...
 
#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOALPEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOALPEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOBLPEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOBLPEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOCLPEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOCLPEN)) != RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIODLPEN)) == RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIODLPEN)) != RESET)
 
#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOELPEN)) == RESET)
 
#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOELPEN)) != RESET)
 
#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOFLPEN)) == RESET)
 
#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOFLPEN)) != RESET)
 
#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOGLPEN)) == RESET)
 
#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOGLPEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOHLPEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOHLPEN)) != RESET)
 
#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOILPEN)) == RESET)
 
#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOILPEN)) != RESET)
 
#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) == RESET)
 
#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) != RESET)
 
#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) == RESET)
 
#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) != RESET)
 
#define __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C3LPEN)) == RESET)
 
#define __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C3LPEN)) != RESET)
 
#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_LPTIM1LPEN)) == RESET)
 
#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_LPTIM1LPEN)) != RESET)
 
#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB3LPENR & (RCC_AHB3LPENR_QSPILPEN)) == RESET)
 
#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB3LPENR & (RCC_AHB3LPENR_QSPILPEN)) != RESET)
 
#define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB2LPENR & (RCC_AHB2LPENR_RNGLPEN)) == RESET)
 
#define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB2LPENR & (RCC_AHB2LPENR_RNGLPEN)) != RESET)
 Get the enable or disable status of the AHB2 peripheral clock during Low Power (Sleep) mode. More...
 
#define __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI1LPEN)) == RESET)
 
#define __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI1LPEN)) != RESET)
 
#define __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI2LPEN)) == RESET)
 
#define __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI2LPEN)) != RESET)
 
#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SDMMC1LPEN)) == RESET)
 
#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SDMMC1LPEN)) != RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) == RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) != RESET)
 
#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) == RESET)
 
#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) != RESET)
 
#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) == RESET)
 
#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) != RESET)
 
#define __HAL_RCC_SPI4_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI4LPEN)) == RESET)
 
#define __HAL_RCC_SPI4_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI4LPEN)) != RESET)
 
#define __HAL_RCC_SPI5_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI5LPEN)) == RESET)
 
#define __HAL_RCC_SPI5_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI5LPEN)) != RESET)
 
#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM1LPEN)) == RESET)
 
#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM1LPEN)) != RESET)
 
#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM2LPEN)) == RESET)
 
#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM2LPEN)) != RESET)
 
#define __HAL_RCC_TIM10_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) == RESET)
 
#define __HAL_RCC_TIM10_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) != RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) == RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) != RESET)
 
#define __HAL_RCC_TIM12_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM12LPEN)) == RESET)
 
#define __HAL_RCC_TIM12_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM12LPEN)) != RESET)
 
#define __HAL_RCC_TIM13_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM13LPEN)) == RESET)
 
#define __HAL_RCC_TIM13_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM13LPEN)) != RESET)
 
#define __HAL_RCC_TIM14_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM14LPEN)) == RESET)
 
#define __HAL_RCC_TIM14_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM14LPEN)) != RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM1LPEN)) == RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM1LPEN)) != RESET)
 Get the enable or disable status of the APB2 peripheral clock during Low Power (Sleep) mode. More...
 
#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) == RESET)
 
#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) != RESET)
 Get the enable or disable status of the APB1 peripheral clock during Low Power (Sleep) mode. More...
 
#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) == RESET)
 
#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) != RESET)
 
#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) == RESET)
 
#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) != RESET)
 
#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) == RESET)
 
#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) != RESET)
 
#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) == RESET)
 
#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) != RESET)
 
#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) == RESET)
 
#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) != RESET)
 
#define __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM8LPEN)) == RESET)
 
#define __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM8LPEN)) != RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) == RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) != RESET)
 
#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) == RESET)
 
#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) != RESET)
 
#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) == RESET)
 
#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) != RESET)
 
#define __HAL_RCC_UART7_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART7LPEN)) == RESET)
 
#define __HAL_RCC_UART7_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART7LPEN)) != RESET)
 
#define __HAL_RCC_UART8_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART8LPEN)) == RESET)
 
#define __HAL_RCC_UART8_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_UART8LPEN)) != RESET)
 
#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) == RESET)
 
#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) != RESET)
 
#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) == RESET)
 
#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) != RESET)
 
#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) == RESET)
 
#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED()   ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) != RESET)
 
#define __HAL_RCC_USART6_IS_CLK_SLEEP_DISABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_USART6LPEN)) == RESET)
 
#define __HAL_RCC_USART6_IS_CLK_SLEEP_ENABLED()   ((RCC->APB2LPENR & (RCC_APB2LPENR_USART6LPEN)) != RESET)
 
#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB2LPENR & (RCC_AHB2LPENR_OTGFSLPEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB2LPENR & (RCC_AHB2LPENR_OTGFSLPEN)) != RESET)
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSLPEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSLPEN)) != RESET)
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSULPILPEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED()   ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSULPILPEN)) != RESET)
 

Detailed Description

Get the enable or disable status of the AHB/APB peripheral clock during Low Power (Sleep) mode.

Note
Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.
After wakeup from SLEEP mode, the peripheral clock is enabled again.
By default, all peripheral clocks are enabled during SLEEP mode.

Macro Definition Documentation

◆ __HAL_RCC_ADC1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_ADC1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) == RESET)

Definition at line 2475 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_ADC1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) != RESET)

Definition at line 2444 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_ADC2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC2LPEN)) == RESET)

Definition at line 2476 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_ADC2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC2LPEN)) != RESET)

Definition at line 2445 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC3_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_ADC3_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC3LPEN)) == RESET)

Definition at line 2477 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC3_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_ADC3_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC3LPEN)) != RESET)

Definition at line 2446 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_AXI_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_AXI_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_AXILPEN)) == RESET)

Definition at line 2261 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_AXI_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_AXI_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_AXILPEN)) != RESET)

Definition at line 2242 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_BKPSRAM_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_BKPSRAM_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_BKPSRAMLPEN)) == RESET)

Definition at line 2264 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_BKPSRAM_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_BKPSRAM_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_BKPSRAMLPEN)) != RESET)

Definition at line 2245 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_CAN1LPEN)) == RESET)

Definition at line 2415 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_CAN1LPEN)) != RESET)

Definition at line 2382 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) == RESET)

Definition at line 2416 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) != RESET)

Definition at line 2383 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DMA2LPEN)) == RESET)

Definition at line 2266 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DMA2LPEN)) != RESET)

Definition at line 2247 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DTCM_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_DTCM_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DTCMLPEN)) == RESET)

Definition at line 2265 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DTCM_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_DTCM_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_DTCMLPEN)) != RESET)

Definition at line 2246 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_FLITF_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_FLITF_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_FLITFLPEN)) == RESET)

Definition at line 2260 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_FLITF_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_FLITF_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_FLITFLPEN)) != RESET)

Get the enable or disable status of the AHB1 peripheral clock during Low Power (Sleep) mode.

Note
Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.
After wakeup from SLEEP mode, the peripheral clock is enabled again.
By default, all peripheral clocks are enabled during SLEEP mode.

Definition at line 2241 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB3LPENR & (RCC_AHB3LPENR_FMCLPEN)) == RESET)

Definition at line 2343 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB3LPENR & (RCC_AHB3LPENR_FMCLPEN)) != RESET)

Get the enable or disable status of the AHB3 peripheral clock during Low Power (Sleep) mode.

Note
Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.
After wakeup from SLEEP mode, the peripheral clock is enabled again.
By default, all peripheral clocks are enabled during SLEEP mode.

Definition at line 2342 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOALPEN)) == RESET)

Definition at line 2269 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOALPEN)) != RESET)

Definition at line 2250 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOBLPEN)) == RESET)

Definition at line 2270 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOBLPEN)) != RESET)

Definition at line 2251 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOCLPEN)) == RESET)

Definition at line 2271 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOCLPEN)) != RESET)

Definition at line 2252 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIODLPEN)) == RESET)

Definition at line 2272 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIODLPEN)) != RESET)

Definition at line 2253 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOELPEN)) == RESET)

Definition at line 2273 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOELPEN)) != RESET)

Definition at line 2254 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOFLPEN)) == RESET)

Definition at line 2274 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOFLPEN)) != RESET)

Definition at line 2255 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOGLPEN)) == RESET)

Definition at line 2275 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOGLPEN)) != RESET)

Definition at line 2256 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOHLPEN)) == RESET)

Definition at line 2276 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOHLPEN)) != RESET)

Definition at line 2257 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOI_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOILPEN)) == RESET)

Definition at line 2277 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOI_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_GPIOILPEN)) != RESET)

Definition at line 2258 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) == RESET)

Definition at line 2412 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) != RESET)

Definition at line 2379 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) == RESET)

Definition at line 2413 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) != RESET)

Definition at line 2380 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C3LPEN)) == RESET)

Definition at line 2414 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C3LPEN)) != RESET)

Definition at line 2381 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_LPTIM1LPEN)) == RESET)

Definition at line 2396 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_LPTIM1LPEN)) != RESET)

Definition at line 2363 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB3LPENR & (RCC_AHB3LPENR_QSPILPEN)) == RESET)

Definition at line 2346 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB3LPENR & (RCC_AHB3LPENR_QSPILPEN)) != RESET)

Definition at line 2345 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB2LPENR & (RCC_AHB2LPENR_RNGLPEN)) == RESET)

Definition at line 2318 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB2LPENR & (RCC_AHB2LPENR_RNGLPEN)) != RESET)

Get the enable or disable status of the AHB2 peripheral clock during Low Power (Sleep) mode.

Note
Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.
After wakeup from SLEEP mode, the peripheral clock is enabled again.
By default, all peripheral clocks are enabled during SLEEP mode.

Definition at line 2317 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI1LPEN)) == RESET)

Definition at line 2485 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI1LPEN)) != RESET)

Definition at line 2454 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI2LPEN)) == RESET)

Definition at line 2486 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SAI2LPEN)) != RESET)

Definition at line 2455 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SDMMC1LPEN)) == RESET)

Definition at line 2478 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SDMMC1LPEN)) != RESET)

Definition at line 2447 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) == RESET)

Definition at line 2479 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) != RESET)

Definition at line 2448 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) == RESET)

Definition at line 2406 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) != RESET)

Definition at line 2373 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) == RESET)

Definition at line 2407 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) != RESET)

Definition at line 2374 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI4_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SPI4_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI4LPEN)) == RESET)

Definition at line 2480 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI4_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SPI4_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI4LPEN)) != RESET)

Definition at line 2449 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI5_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SPI5_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI5LPEN)) == RESET)

Definition at line 2484 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI5_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SPI5_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI5LPEN)) != RESET)

Definition at line 2453 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SRAM1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM1LPEN)) == RESET)

Definition at line 2262 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SRAM1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM1LPEN)) != RESET)

Definition at line 2243 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM2LPEN)) == RESET)

Definition at line 2263 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_SRAM2LPEN)) != RESET)

Definition at line 2244 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM10_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM10_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) == RESET)

Definition at line 2482 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM10_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM10_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) != RESET)

Definition at line 2451 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM11_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM11_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) == RESET)

Definition at line 2483 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM11_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM11_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) != RESET)

Definition at line 2452 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM12_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM12_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM12LPEN)) == RESET)

Definition at line 2393 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM12_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM12_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM12LPEN)) != RESET)

Definition at line 2360 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM13_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM13_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM13LPEN)) == RESET)

Definition at line 2394 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM13_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM13_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM13LPEN)) != RESET)

Definition at line 2361 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM14_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM14_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM14LPEN)) == RESET)

Definition at line 2395 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM14_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM14_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM14LPEN)) != RESET)

Definition at line 2362 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM1LPEN)) == RESET)

Definition at line 2471 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM1LPEN)) != RESET)

Get the enable or disable status of the APB2 peripheral clock during Low Power (Sleep) mode.

Note
Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.
After wakeup from SLEEP mode, the peripheral clock is enabled again.
By default, all peripheral clocks are enabled during SLEEP mode.

Definition at line 2440 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) == RESET)

Definition at line 2387 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) != RESET)

Get the enable or disable status of the APB1 peripheral clock during Low Power (Sleep) mode.

Note
Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.
After wakeup from SLEEP mode, the peripheral clock is enabled again.
By default, all peripheral clocks are enabled during SLEEP mode.

Definition at line 2354 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) == RESET)

Definition at line 2388 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) != RESET)

Definition at line 2355 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) == RESET)

Definition at line 2389 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) != RESET)

Definition at line 2356 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) == RESET)

Definition at line 2390 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) != RESET)

Definition at line 2357 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) == RESET)

Definition at line 2391 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) != RESET)

Definition at line 2358 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) == RESET)

Definition at line 2392 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) != RESET)

Definition at line 2359 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM8LPEN)) == RESET)

Definition at line 2472 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM8LPEN)) != RESET)

Definition at line 2441 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM9_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_TIM9_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) == RESET)

Definition at line 2481 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM9_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_TIM9_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) != RESET)

Definition at line 2450 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) == RESET)

Definition at line 2410 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) != RESET)

Definition at line 2377 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) == RESET)

Definition at line 2411 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) != RESET)

Definition at line 2378 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART7_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_UART7_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART7LPEN)) == RESET)

Definition at line 2417 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART7_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_UART7_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART7LPEN)) != RESET)

Definition at line 2384 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART8_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_UART8_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART8LPEN)) == RESET)

Definition at line 2418 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART8_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_UART8_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_UART8LPEN)) != RESET)

Definition at line 2385 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) == RESET)

Definition at line 2473 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) != RESET)

Definition at line 2442 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) == RESET)

Definition at line 2408 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) != RESET)

Definition at line 2375 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) == RESET)

Definition at line 2409 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) != RESET)

Definition at line 2376 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART6_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USART6_IS_CLK_SLEEP_DISABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_USART6LPEN)) == RESET)

Definition at line 2474 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART6_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USART6_IS_CLK_SLEEP_ENABLED ( )    ((RCC->APB2LPENR & (RCC_APB2LPENR_USART6LPEN)) != RESET)

Definition at line 2443 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB2LPENR & (RCC_AHB2LPENR_OTGFSLPEN)) == RESET)

Definition at line 2321 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB2LPENR & (RCC_AHB2LPENR_OTGFSLPEN)) != RESET)

Definition at line 2320 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSLPEN)) == RESET)

Definition at line 2267 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSLPEN)) != RESET)

Definition at line 2248 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED

#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSULPILPEN)) == RESET)

Definition at line 2268 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED

#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED ( )    ((RCC->AHB1LPENR & (RCC_AHB1LPENR_OTGHSULPILPEN)) != RESET)

Definition at line 2249 of file stm32f7xx_hal_rcc_ex.h.



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autogenerated on Fri Apr 1 2022 02:15:08