Macros | |
#define | ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ |
#define | CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ |
#define | NAND_BUSY ((uint32_t)0x00000000U) |
#define | NAND_CMD_AREA_A ((uint8_t)0x00U) |
#define | NAND_CMD_AREA_B ((uint8_t)0x01U) |
#define | NAND_CMD_AREA_C ((uint8_t)0x50U) |
#define | NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U) |
#define | NAND_CMD_ERASE0 ((uint8_t)0x60U) |
#define | NAND_CMD_ERASE1 ((uint8_t)0xD0U) |
#define | NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU) |
#define | NAND_CMD_READID ((uint8_t)0x90U) |
#define | NAND_CMD_RESET ((uint8_t)0xFFU) |
#define | NAND_CMD_STATUS ((uint8_t)0x70U) |
#define | NAND_CMD_WRITE0 ((uint8_t)0x80U) |
#define | NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U) |
#define | NAND_DEVICE ((uint32_t)0x80000000U) |
#define | NAND_ERROR ((uint32_t)0x00000001U) |
#define | NAND_INVALID_ADDRESS ((uint32_t)0x00000200U) |
#define | NAND_READY ((uint32_t)0x00000040U) |
#define | NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U) |
#define | NAND_VALID_ADDRESS ((uint32_t)0x00000100U) |
#define | NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U) |
#define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ |
Definition at line 277 of file stm32f7xx_hal_nand.h.
#define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ |
Definition at line 276 of file stm32f7xx_hal_nand.h.
#define NAND_BUSY ((uint32_t)0x00000000U) |
Definition at line 297 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_AREA_A ((uint8_t)0x00U) |
Definition at line 279 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_AREA_B ((uint8_t)0x01U) |
Definition at line 280 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_AREA_C ((uint8_t)0x50U) |
Definition at line 281 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U) |
Definition at line 282 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_ERASE0 ((uint8_t)0x60U) |
Definition at line 286 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_ERASE1 ((uint8_t)0xD0U) |
Definition at line 287 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU) |
Definition at line 290 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_READID ((uint8_t)0x90U) |
Definition at line 288 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_RESET ((uint8_t)0xFFU) |
Definition at line 291 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_STATUS ((uint8_t)0x70U) |
Definition at line 289 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_WRITE0 ((uint8_t)0x80U) |
Definition at line 284 of file stm32f7xx_hal_nand.h.
#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U) |
Definition at line 285 of file stm32f7xx_hal_nand.h.
#define NAND_DEVICE ((uint32_t)0x80000000U) |
Definition at line 273 of file stm32f7xx_hal_nand.h.
#define NAND_ERROR ((uint32_t)0x00000001U) |
Definition at line 298 of file stm32f7xx_hal_nand.h.
#define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U) |
Definition at line 295 of file stm32f7xx_hal_nand.h.
#define NAND_READY ((uint32_t)0x00000040U) |
Definition at line 299 of file stm32f7xx_hal_nand.h.
#define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U) |
Definition at line 296 of file stm32f7xx_hal_nand.h.
#define NAND_VALID_ADDRESS ((uint32_t)0x00000100U) |
Definition at line 294 of file stm32f7xx_hal_nand.h.
#define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U) |
Definition at line 274 of file stm32f7xx_hal_nand.h.