X86Mapping.h
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1 /* Capstone Disassembly Engine */
2 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
3 
4 #ifndef CS_X86_MAP_H
5 #define CS_X86_MAP_H
6 
7 #include "capstone/capstone.h"
8 #include "../../cs_priv.h"
9 
10 // map sib_base to x86_reg
12 
13 // map sib_index to x86_reg
15 
16 // map seg_override to x86_reg
18 
19 // return name of regiser in friendly string
20 const char *X86_reg_name(csh handle, unsigned int reg);
21 
22 // given internal insn id, return public instruction info
23 void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id);
24 
25 // return insn name, given insn id
26 const char *X86_insn_name(csh handle, unsigned int id);
27 
28 // return group name, given group id
29 const char *X86_group_name(csh handle, unsigned int id);
30 
31 // return register of given instruction id
32 // return 0 if not found
33 // this is to handle instructions embedding accumulate registers into AsmStrs[]
34 x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access);
35 x86_reg X86_insn_reg_att(unsigned int id, enum cs_ac_type *access);
36 bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2);
37 bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2);
38 
39 extern const uint64_t arch_masks[9];
40 
41 // handle LOCK/REP/REPNE prefixes
42 // return True if we patch mnemonic, like in MULPD case
43 bool X86_lockrep(MCInst *MI, SStream *O);
44 
45 // map registers to sizes
46 extern const uint8_t regsize_map_32[];
47 extern const uint8_t regsize_map_64[];
48 
49 void op_addReg(MCInst *MI, int reg);
50 void op_addImm(MCInst *MI, int v);
51 
53 
54 void op_addXopCC(MCInst *MI, int v);
55 void op_addSseCC(MCInst *MI, int v);
56 void op_addAvxCC(MCInst *MI, int v);
57 
58 void op_addAvxZeroOpmask(MCInst *MI);
59 
60 void op_addAvxSae(MCInst *MI);
61 
62 void op_addAvxRoundingMode(MCInst *MI, int v);
63 
64 // given internal insn id, return operand access info
65 uint8_t *X86_get_op_access(cs_struct *h, unsigned int id, uint64_t *eflags);
66 
67 void X86_reg_access(const cs_insn *insn,
68  cs_regs regs_read, uint8_t *regs_read_count,
69  cs_regs regs_write, uint8_t *regs_write_count);
70 
71 // given the instruction id, return the size of its immediate operand (or 0)
72 uint8_t X86_immediate_size(unsigned int id, uint8_t *enc_size);
73 
74 #endif
op_addAvxZeroOpmask
void op_addAvxZeroOpmask(MCInst *MI)
X86_insn_name
const char * X86_insn_name(csh handle, unsigned int id)
x86_avx_bcast
x86_avx_bcast
AVX broadcast type.
Definition: x86.h:179
op_addReg
void op_addReg(MCInst *MI, int reg)
op_addAvxSae
void op_addAvxSae(MCInst *MI)
X86_insn_reg_att
x86_reg X86_insn_reg_att(unsigned int id, enum cs_ac_type *access)
X86_get_insn_id
void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
X86_reg_name
const char * X86_reg_name(csh handle, unsigned int reg)
x86_map_sib_base
x86_reg x86_map_sib_base(int r)
uint8_t
unsigned char uint8_t
Definition: stdint-msvc2008.h:78
cs_struct
Definition: cs_priv.h:51
X86_insn_reg_intel
x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access)
capstone.h
SStream
Definition: SStream.h:9
arch_masks
const uint64_t arch_masks[9]
X86_immediate_size
uint8_t X86_immediate_size(unsigned int id, uint8_t *enc_size)
setup.v
v
Definition: third_party/bloaty/third_party/capstone/bindings/python/setup.py:42
x86_map_segment
x86_reg x86_map_segment(int r)
x86_reg
x86_reg
X86 registers.
Definition: x86.h:19
uint64_t
unsigned __int64 uint64_t
Definition: stdint-msvc2008.h:90
regsize_map_64
const uint8_t regsize_map_64[]
op_addImm
void op_addImm(MCInst *MI, int v)
cs_ac_type
cs_ac_type
Definition: capstone.h:203
op_addAvxCC
void op_addAvxCC(MCInst *MI, int v)
X86_lockrep
bool X86_lockrep(MCInst *MI, SStream *O)
op_addXopCC
void op_addXopCC(MCInst *MI, int v)
csh
size_t csh
Definition: capstone.h:71
MCInst
Definition: MCInst.h:88
X86_insn_reg_intel2
bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2)
x86_map_sib_index
x86_reg x86_map_sib_index(int r)
fix_build_deps.r
r
Definition: fix_build_deps.py:491
regsize_map_32
const uint8_t regsize_map_32[]
op_addSseCC
void op_addSseCC(MCInst *MI, int v)
X86_reg_access
void X86_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count)
X86_group_name
const char * X86_group_name(csh handle, unsigned int id)
X86_get_op_access
uint8_t * X86_get_op_access(cs_struct *h, unsigned int id, uint64_t *eflags)
handle
static csh handle
Definition: test_arm_regression.c:16
op_addAvxRoundingMode
void op_addAvxRoundingMode(MCInst *MI, int v)
op_addAvxBroadcast
void op_addAvxBroadcast(MCInst *MI, x86_avx_bcast v)
access
Definition: bloaty/third_party/zlib/examples/zran.c:75
X86_insn_reg_att2
bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2)


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autogenerated on Thu Mar 13 2025 03:01:54