SystemZInstPrinter.c
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1 //===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class prints an SystemZ MCInst to a .s file.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 /* Capstone Disassembly Engine */
15 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
16 
17 #ifdef CAPSTONE_HAS_SYSZ
18 
19 #include <stdio.h>
20 #include <stdlib.h>
21 #include <string.h>
22 #include <capstone/platform.h>
23 
24 #include "SystemZInstPrinter.h"
25 #include "../../MCInst.h"
26 #include "../../utils.h"
27 #include "../../SStream.h"
28 #include "../../MCRegisterInfo.h"
29 #include "../../MathExtras.h"
30 #include "SystemZMapping.h"
31 
32 static const char *getRegisterName(unsigned RegNo);
33 
34 void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci)
35 {
36  /*
37  if (((cs_struct *)ud)->detail != CS_OPT_ON)
38  return;
39  */
40 }
41 
42 static void printAddress(MCInst *MI, unsigned Base, int64_t Disp, unsigned Index, SStream *O)
43 {
44  printInt64(O, Disp);
45 
46  if (Base) {
47  SStream_concat0(O, "(");
48  if (Index)
49  SStream_concat(O, "%%%s, ", getRegisterName(Index));
50  SStream_concat(O, "%%%s)", getRegisterName(Base));
51 
52  if (MI->csh->detail) {
53  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
54  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
55  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index);
56  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp;
57  MI->flat_insn->detail->sysz.op_count++;
58  }
59  } else if (!Index) {
60  if (MI->csh->detail) {
61  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
62  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp;
63  MI->flat_insn->detail->sysz.op_count++;
64  }
65  }
66 }
67 
68 static void _printOperand(MCInst *MI, MCOperand *MO, SStream *O)
69 {
70  if (MCOperand_isReg(MO)) {
71  unsigned reg;
72 
73  reg = MCOperand_getReg(MO);
74  SStream_concat(O, "%%%s", getRegisterName(reg));
75  reg = SystemZ_map_register(reg);
76 
77  if (MI->csh->detail) {
78  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_REG;
79  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].reg = reg;
80  MI->flat_insn->detail->sysz.op_count++;
81  }
82  } else if (MCOperand_isImm(MO)) {
83  int64_t Imm = MCOperand_getImm(MO);
84 
85  printInt64(O, Imm);
86 
87  if (MI->csh->detail) {
88  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
89  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Imm;
90  MI->flat_insn->detail->sysz.op_count++;
91  }
92  }
93 }
94 
95 static void printU1ImmOperand(MCInst *MI, int OpNum, SStream *O)
96 {
97  int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
98  // assert(isUInt<1>(Value) && "Invalid u1imm argument");
99  printInt64(O, Value);
100 
101  if (MI->csh->detail) {
102  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
103  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
104  MI->flat_insn->detail->sysz.op_count++;
105  }
106 }
107 
108 static void printU2ImmOperand(MCInst *MI, int OpNum, SStream *O)
109 {
110  int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
111  // assert(isUInt<2>(Value) && "Invalid u2imm argument");
112  printInt64(O, Value);
113 
114  if (MI->csh->detail) {
115  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
116  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
117  MI->flat_insn->detail->sysz.op_count++;
118  }
119 }
120 
121 static void printU3ImmOperand(MCInst *MI, int OpNum, SStream *O)
122 {
123  int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
124  // assert(isUInt<3>(Value) && "Invalid u4imm argument");
125  printInt64(O, Value);
126 
127  if (MI->csh->detail) {
128  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
129  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
130  MI->flat_insn->detail->sysz.op_count++;
131  }
132 }
133 
134 static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O)
135 {
136  int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
137  // assert(isUInt<4>(Value) && "Invalid u4imm argument");
138  printInt64(O, Value);
139 
140  if (MI->csh->detail) {
141  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
142  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
143  MI->flat_insn->detail->sysz.op_count++;
144  }
145 }
146 
147 static void printU6ImmOperand(MCInst *MI, int OpNum, SStream *O)
148 {
149  uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
150  // assert(isUInt<6>(Value) && "Invalid u6imm argument");
151 
152  printUInt32(O, Value);
153 
154  if (MI->csh->detail) {
155  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
156  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
157  MI->flat_insn->detail->sysz.op_count++;
158  }
159 }
160 
161 static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O)
162 {
163  int8_t Value = (int8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
164  // assert(isInt<8>(Value) && "Invalid s8imm argument");
165 
166  if (Value >= 0) {
167  if (Value > HEX_THRESHOLD)
168  SStream_concat(O, "0x%x", Value);
169  else
170  SStream_concat(O, "%u", Value);
171  } else {
172  if (Value < -HEX_THRESHOLD)
173  SStream_concat(O, "-0x%x", -Value);
174  else
175  SStream_concat(O, "-%u", -Value);
176  }
177 
178  if (MI->csh->detail) {
179  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
180  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
181  MI->flat_insn->detail->sysz.op_count++;
182  }
183 }
184 
185 static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O)
186 {
187  uint8_t Value = (uint8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
188  // assert(isUInt<8>(Value) && "Invalid u8imm argument");
189 
190  if (Value > HEX_THRESHOLD)
191  SStream_concat(O, "0x%x", Value);
192  else
193  SStream_concat(O, "%u", Value);
194 
195  if (MI->csh->detail) {
196  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
197  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
198  MI->flat_insn->detail->sysz.op_count++;
199  }
200 }
201 
202 static void printU12ImmOperand(MCInst *MI, int OpNum, SStream *O)
203 {
204  int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
205  // assert(isUInt<12>(Value) && "Invalid u12imm argument");
206  printInt64(O, Value);
207 
208  if (MI->csh->detail) {
209  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
210  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
211  MI->flat_insn->detail->sysz.op_count++;
212  }
213 }
214 
215 static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O)
216 {
217  int16_t Value = (int16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
218  // assert(isInt<16>(Value) && "Invalid s16imm argument");
219 
220  if (Value >= 0) {
221  if (Value > HEX_THRESHOLD)
222  SStream_concat(O, "0x%x", Value);
223  else
224  SStream_concat(O, "%u", Value);
225  } else {
226  if (Value < -HEX_THRESHOLD)
227  SStream_concat(O, "-0x%x", -Value);
228  else
229  SStream_concat(O, "-%u", -Value);
230  }
231 
232  if (MI->csh->detail) {
233  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
234  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
235  MI->flat_insn->detail->sysz.op_count++;
236  }
237 }
238 
239 static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O)
240 {
241  uint16_t Value = (uint16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
242  // assert(isUInt<16>(Value) && "Invalid u16imm argument");
243 
244  if (Value > HEX_THRESHOLD)
245  SStream_concat(O, "0x%x", Value);
246  else
247  SStream_concat(O, "%u", Value);
248 
249  if (MI->csh->detail) {
250  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
251  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
252  MI->flat_insn->detail->sysz.op_count++;
253  }
254 }
255 
256 static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O)
257 {
258  int32_t Value = (int32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
259  // assert(isInt<32>(Value) && "Invalid s32imm argument");
260 
261  printInt32(O, Value);
262 
263  if (MI->csh->detail) {
264  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
265  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
266  MI->flat_insn->detail->sysz.op_count++;
267  }
268 }
269 
270 static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O)
271 {
272  uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
273  // assert(isUInt<32>(Value) && "Invalid u32imm argument");
274 
275  printUInt32(O, Value);
276 
277  if (MI->csh->detail) {
278  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
279  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value;
280  MI->flat_insn->detail->sysz.op_count++;
281  }
282 }
283 
284 static void printU48ImmOperand(MCInst *MI, int OpNum, SStream *O)
285 {
286  int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
287  // assert(isUInt<48>(Value) && "Invalid u48imm argument");
288  printInt64(O, Value);
289 
290  if (MI->csh->detail) {
291  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
292  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value;
293  MI->flat_insn->detail->sysz.op_count++;
294  }
295 }
296 
297 static void printPCRelOperand(MCInst *MI, int OpNum, SStream *O)
298 {
299  MCOperand *MO = MCInst_getOperand(MI, OpNum);
300  int32_t imm;
301 
302  if (MCOperand_isImm(MO)) {
303  imm = (int32_t)MCOperand_getImm(MO);
304 
305  printInt32(O, imm);
306 
307  if (MI->csh->detail) {
308  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM;
309  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)imm;
310  MI->flat_insn->detail->sysz.op_count++;
311  }
312  }
313 }
314 
315 static void printPCRelTLSOperand(MCInst *MI, int OpNum, SStream *O)
316 {
317  // Output the PC-relative operand.
318  printPCRelOperand(MI, OpNum, O);
319 }
320 
321 static void printOperand(MCInst *MI, int OpNum, SStream *O)
322 {
323  _printOperand(MI, MCInst_getOperand(MI, OpNum), O);
324 }
325 
326 static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O)
327 {
328  printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
329  MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), 0, O);
330 }
331 
332 static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O)
333 {
334  printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
335  MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)),
336  MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O);
337 }
338 
339 static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O)
340 {
341  unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
342  uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1));
343  uint64_t Length = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 2));
344 
345  if (Disp > HEX_THRESHOLD)
346  SStream_concat(O, "0x%"PRIx64, Disp);
347  else
348  SStream_concat(O, "%"PRIu64, Disp);
349 
350  if (Length > HEX_THRESHOLD)
351  SStream_concat(O, "(0x%"PRIx64, Length);
352  else
353  SStream_concat(O, "(%"PRIu64, Length);
354 
355  if (Base)
356  SStream_concat(O, ", %%%s", getRegisterName(Base));
357  SStream_concat0(O, ")");
358 
359  if (MI->csh->detail) {
360  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
361  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
362  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = Length;
363  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp;
364  MI->flat_insn->detail->sysz.op_count++;
365  }
366 }
367 
368 static void printBDRAddrOperand(MCInst *MI, int OpNum, SStream *O)
369 {
370  unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
371  uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1));
372  uint64_t Length = MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2));
373 
374  if (Disp > HEX_THRESHOLD)
375  SStream_concat(O, "0x%"PRIx64, Disp);
376  else
377  SStream_concat(O, "%"PRIu64, Disp);
378 
379  SStream_concat0(O, "(");
380  SStream_concat(O, "%%%s", getRegisterName(Length));
381 
382  if (Base)
383  SStream_concat(O, ", %%%s", getRegisterName(Base));
384  SStream_concat0(O, ")");
385 
386  if (MI->csh->detail) {
387  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM;
388  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
389  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = (uint8_t)SystemZ_map_register(Length);
390  MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp;
391  MI->flat_insn->detail->sysz.op_count++;
392  }
393 }
394 
395 static void printBDVAddrOperand(MCInst *MI, int OpNum, SStream *O)
396 {
397  printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
398  MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)),
399  MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O);
400 }
401 
402 static void printCond4Operand(MCInst *MI, int OpNum, SStream *O)
403 {
404  static const char *const CondNames[] = {
405  "o", "h", "nle", "l", "nhe", "lh", "ne",
406  "e", "nlh", "he", "nl", "le", "nh", "no"
407  };
408 
409  uint64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
410  // assert(Imm > 0 && Imm < 15 && "Invalid condition");
411  SStream_concat0(O, CondNames[Imm - 1]);
412 
413  if (MI->csh->detail)
414  MI->flat_insn->detail->sysz.cc = (sysz_cc)Imm;
415 }
416 
417 #define PRINT_ALIAS_INSTR
418 #include "SystemZGenAsmWriter.inc"
419 
420 void SystemZ_printInst(MCInst *MI, SStream *O, void *Info)
421 {
422  printInstruction(MI, O, Info);
423 }
424 
425 #endif
MCOperand_getReg
unsigned MCOperand_getReg(const MCOperand *op)
getReg - Returns the register number.
Definition: MCInst.c:114
MCOperand
Definition: MCInst.h:30
uint16_t
unsigned short uint16_t
Definition: stdint-msvc2008.h:79
SystemZ_map_register
sysz_reg SystemZ_map_register(unsigned int r)
printInt32
void printInt32(SStream *O, int32_t val)
Definition: SStream.c:134
string.h
MCInst_getOperand
MCOperand * MCInst_getOperand(MCInst *inst, unsigned i)
Definition: MCInst.c:75
SYSZ_OP_REG
@ SYSZ_OP_REG
= CS_OP_REG (Register operand).
Definition: systemz.h:40
SystemZInstPrinter.h
uint8_t
unsigned char uint8_t
Definition: stdint-msvc2008.h:78
MCInst::csh
cs_struct * csh
Definition: MCInst.h:97
MCOperand_getImm
int64_t MCOperand_getImm(MCOperand *op)
Definition: MCInst.c:125
uint32_t
unsigned int uint32_t
Definition: stdint-msvc2008.h:80
absl::Length
size_t Length(TestCordSize size)
Definition: abseil-cpp/absl/strings/cord_test_helpers.h:80
SystemZ_printInst
void SystemZ_printInst(MCInst *MI, SStream *O, void *Info)
int16_t
signed short int16_t
Definition: stdint-msvc2008.h:76
int64_t
signed __int64 int64_t
Definition: stdint-msvc2008.h:89
SStream
Definition: SStream.h:9
HEX_THRESHOLD
#define HEX_THRESHOLD
Definition: utils.h:16
sysz_cc
sysz_cc
Enums corresponding to SystemZ condition codes.
Definition: systemz.h:18
platform.h
uint64_t
unsigned __int64 uint64_t
Definition: stdint-msvc2008.h:90
printInt64
void printInt64(SStream *O, int64_t val)
Definition: SStream.c:84
cs_struct::detail
cs_opt_value detail
Definition: cs_priv.h:65
SystemZMapping.h
SStream_concat0
void SStream_concat0(SStream *ss, const char *s)
Definition: SStream.c:31
SYSZ_OP_MEM
@ SYSZ_OP_MEM
= CS_OP_MEM (Memory operand).
Definition: systemz.h:42
csh
size_t csh
Definition: capstone.h:71
SystemZ_post_printer
void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci)
MCInst
Definition: MCInst.h:88
SYSZ_OP_IMM
@ SYSZ_OP_IMM
= CS_OP_IMM (Immediate operand).
Definition: systemz.h:41
MCOperand_isImm
bool MCOperand_isImm(const MCOperand *op)
Definition: MCInst.c:103
SStream_concat
void SStream_concat(SStream *ss, const char *fmt,...)
Definition: SStream.c:42
int8_t
signed char int8_t
Definition: stdint-msvc2008.h:75
Value
struct Value Value
Definition: bloaty/third_party/protobuf/php/ext/google/protobuf/protobuf.h:676
google::protobuf::python::descriptor::Index
static PyObject * Index(PyContainer *self, PyObject *item)
Definition: bloaty/third_party/protobuf/python/google/protobuf/pyext/descriptor_containers.cc:672
int32_t
signed int int32_t
Definition: stdint-msvc2008.h:77
MCInst::flat_insn
cs_insn * flat_insn
Definition: MCInst.h:95
printUInt32
void printUInt32(SStream *O, uint32_t val)
Definition: SStream.c:161
MCOperand_isReg
bool MCOperand_isReg(const MCOperand *op)
Definition: MCInst.c:98

grpc
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autogenerated on Thu Mar 13 2025 03:01:28