twihs0.h

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/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */

#ifndef _SAME70_TWIHS0_INSTANCE_
#define _SAME70_TWIHS0_INSTANCE_

/* ========== Register definition for TWIHS0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  #define REG_TWIHS0_CR                     (0x40018000U) 
  #define REG_TWIHS0_MMR                    (0x40018004U) 
  #define REG_TWIHS0_SMR                    (0x40018008U) 
  #define REG_TWIHS0_IADR                   (0x4001800CU) 
  #define REG_TWIHS0_CWGR                   (0x40018010U) 
  #define REG_TWIHS0_SR                     (0x40018020U) 
  #define REG_TWIHS0_IER                    (0x40018024U) 
  #define REG_TWIHS0_IDR                    (0x40018028U) 
  #define REG_TWIHS0_IMR                    (0x4001802CU) 
  #define REG_TWIHS0_RHR                    (0x40018030U) 
  #define REG_TWIHS0_THR                    (0x40018034U) 
  #define REG_TWIHS0_SMBTR                  (0x40018038U) 
  #define REG_TWIHS0_FILTR                  (0x40018044U) 
  #define REG_TWIHS0_SWMR                   (0x4001804CU) 
  #define REG_TWIHS0_DR                     (0x400180D0U) 
  #define REG_TWIHS0_WPMR                   (0x400180E4U) 
  #define REG_TWIHS0_WPSR                   (0x400180E8U) 
  #define REG_TWIHS0_VER                    (0x400180FCU) 
#else
  #define REG_TWIHS0_CR    (*(__O  uint32_t*)0x40018000U) 
  #define REG_TWIHS0_MMR   (*(__IO uint32_t*)0x40018004U) 
  #define REG_TWIHS0_SMR   (*(__IO uint32_t*)0x40018008U) 
  #define REG_TWIHS0_IADR  (*(__IO uint32_t*)0x4001800CU) 
  #define REG_TWIHS0_CWGR  (*(__IO uint32_t*)0x40018010U) 
  #define REG_TWIHS0_SR    (*(__I  uint32_t*)0x40018020U) 
  #define REG_TWIHS0_IER   (*(__O  uint32_t*)0x40018024U) 
  #define REG_TWIHS0_IDR   (*(__O  uint32_t*)0x40018028U) 
  #define REG_TWIHS0_IMR   (*(__I  uint32_t*)0x4001802CU) 
  #define REG_TWIHS0_RHR   (*(__I  uint32_t*)0x40018030U) 
  #define REG_TWIHS0_THR   (*(__O  uint32_t*)0x40018034U) 
  #define REG_TWIHS0_SMBTR (*(__IO uint32_t*)0x40018038U) 
  #define REG_TWIHS0_FILTR (*(__IO uint32_t*)0x40018044U) 
  #define REG_TWIHS0_SWMR  (*(__IO uint32_t*)0x4001804CU) 
  #define REG_TWIHS0_DR    (*(__I  uint32_t*)0x400180D0U) 
  #define REG_TWIHS0_WPMR  (*(__IO uint32_t*)0x400180E4U) 
  #define REG_TWIHS0_WPSR  (*(__I  uint32_t*)0x400180E8U) 
  #define REG_TWIHS0_VER   (*(__I  uint32_t*)0x400180FCU) 
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */

#endif /* _SAME70_TWIHS0_INSTANCE_ */