Public Attributes | List of all members
XdmacChid Struct Reference

XdmacChid hardware registers. More...

#include <xdmac.h>

Public Attributes

__I uint32_t Reserved1 [2]
 
__IO uint32_t XDMAC_CBC
 (XdmacChid Offset: 0x24) Channel Block Control Register More...
 
__IO uint32_t XDMAC_CC
 (XdmacChid Offset: 0x28) Channel Configuration Register More...
 
__IO uint32_t XDMAC_CDA
 (XdmacChid Offset: 0x14) Channel Destination Address Register More...
 
__IO uint32_t XDMAC_CDS_MSP
 (XdmacChid Offset: 0x2C) Channel Data Stride Memory Set Pattern More...
 
__IO uint32_t XDMAC_CDUS
 (XdmacChid Offset: 0x34) Channel Destination Microblock Stride More...
 
__O uint32_t XDMAC_CID
 (XdmacChid Offset: 0x4) Channel Interrupt Disable Register More...
 
__O uint32_t XDMAC_CIE
 (XdmacChid Offset: 0x0) Channel Interrupt Enable Register More...
 
__I uint32_t XDMAC_CIM
 (XdmacChid Offset: 0x8) Channel Interrupt Mask Register More...
 
__I uint32_t XDMAC_CIS
 (XdmacChid Offset: 0xC) Channel Interrupt Status Register More...
 
__IO uint32_t XDMAC_CNDA
 (XdmacChid Offset: 0x18) Channel Next Descriptor Address Register More...
 
__IO uint32_t XDMAC_CNDC
 (XdmacChid Offset: 0x1C) Channel Next Descriptor Control Register More...
 
__IO uint32_t XDMAC_CSA
 (XdmacChid Offset: 0x10) Channel Source Address Register More...
 
__IO uint32_t XDMAC_CSUS
 (XdmacChid Offset: 0x30) Channel Source Microblock Stride More...
 
__IO uint32_t XDMAC_CUBC
 (XdmacChid Offset: 0x20) Channel Microblock Control Register More...
 

Detailed Description

XdmacChid hardware registers.

Definition at line 46 of file utils/cmsis/same70/include/component/xdmac.h.

Member Data Documentation

◆ Reserved1

__I uint32_t XdmacChid::Reserved1[2]

Definition at line 61 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CBC

__IO uint32_t XdmacChid::XDMAC_CBC

(XdmacChid Offset: 0x24) Channel Block Control Register

Definition at line 56 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CC

__IO uint32_t XdmacChid::XDMAC_CC

(XdmacChid Offset: 0x28) Channel Configuration Register

Definition at line 57 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CDA

__IO uint32_t XdmacChid::XDMAC_CDA

(XdmacChid Offset: 0x14) Channel Destination Address Register

Definition at line 52 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CDS_MSP

__IO uint32_t XdmacChid::XDMAC_CDS_MSP

(XdmacChid Offset: 0x2C) Channel Data Stride Memory Set Pattern

Definition at line 58 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CDUS

__IO uint32_t XdmacChid::XDMAC_CDUS

(XdmacChid Offset: 0x34) Channel Destination Microblock Stride

Definition at line 60 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CID

__O uint32_t XdmacChid::XDMAC_CID

(XdmacChid Offset: 0x4) Channel Interrupt Disable Register

Definition at line 48 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CIE

__O uint32_t XdmacChid::XDMAC_CIE

(XdmacChid Offset: 0x0) Channel Interrupt Enable Register

Definition at line 47 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CIM

__I uint32_t XdmacChid::XDMAC_CIM

(XdmacChid Offset: 0x8) Channel Interrupt Mask Register

Definition at line 49 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CIS

__I uint32_t XdmacChid::XDMAC_CIS

(XdmacChid Offset: 0xC) Channel Interrupt Status Register

Definition at line 50 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CNDA

__IO uint32_t XdmacChid::XDMAC_CNDA

(XdmacChid Offset: 0x18) Channel Next Descriptor Address Register

Definition at line 53 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CNDC

__IO uint32_t XdmacChid::XDMAC_CNDC

(XdmacChid Offset: 0x1C) Channel Next Descriptor Control Register

Definition at line 54 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CSA

__IO uint32_t XdmacChid::XDMAC_CSA

(XdmacChid Offset: 0x10) Channel Source Address Register

Definition at line 51 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CSUS

__IO uint32_t XdmacChid::XDMAC_CSUS

(XdmacChid Offset: 0x30) Channel Source Microblock Stride

Definition at line 59 of file utils/cmsis/same70/include/component/xdmac.h.

◆ XDMAC_CUBC

__IO uint32_t XdmacChid::XDMAC_CUBC

(XdmacChid Offset: 0x20) Channel Microblock Control Register

Definition at line 55 of file utils/cmsis/same70/include/component/xdmac.h.


The documentation for this struct was generated from the following file:


inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:18:03