Spi Struct Reference

Spi hardware registers. More...

#include <spi.h>

Public Attributes
__I uint32_t	Reserved1 [4]
__I uint32_t	Reserved2 [41]
__I uint32_t	Reserved3 [4]
__O uint32_t	SPI_CR
	(Spi Offset: 0x00) Control Register More...
__IO uint32_t	SPI_CSR [4]
	(Spi Offset: 0x30) Chip Select Register (CS_number = 0) More...
__O uint32_t	SPI_IDR
	(Spi Offset: 0x18) Interrupt Disable Register More...
__O uint32_t	SPI_IER
	(Spi Offset: 0x14) Interrupt Enable Register More...
__I uint32_t	SPI_IMR
	(Spi Offset: 0x1C) Interrupt Mask Register More...
__IO uint32_t	SPI_MR
	(Spi Offset: 0x04) Mode Register More...
__I uint32_t	SPI_RDR
	(Spi Offset: 0x08) Receive Data Register More...
__I uint32_t	SPI_SR
	(Spi Offset: 0x10) Status Register More...
__O uint32_t	SPI_TDR
	(Spi Offset: 0x0C) Transmit Data Register More...
__I uint32_t	SPI_VERSION
	(Spi Offset: 0xFC) Version Register More...
__IO uint32_t	SPI_WPMR
	(Spi Offset: 0xE4) Write Protection Mode Register More...
__I uint32_t	SPI_WPSR
	(Spi Offset: 0xE8) Write Protection Status Register More...

Detailed Description

Spi hardware registers.

Definition at line 46 of file utils/cmsis/same70/include/component/spi.h.

Member Data Documentation

Reserved1

__I uint32_t Spi::Reserved1[4]

Definition at line 55 of file utils/cmsis/same70/include/component/spi.h.

Reserved2

__I uint32_t Spi::Reserved2[41]

Definition at line 57 of file utils/cmsis/same70/include/component/spi.h.

Reserved3

__I uint32_t Spi::Reserved3[4]

Definition at line 60 of file utils/cmsis/same70/include/component/spi.h.

SPI_CR

__O uint32_t Spi::SPI_CR

(Spi Offset: 0x00) Control Register

Definition at line 47 of file utils/cmsis/same70/include/component/spi.h.

SPI_CSR

__IO uint32_t Spi::SPI_CSR[4]

(Spi Offset: 0x30) Chip Select Register (CS_number = 0)

Definition at line 56 of file utils/cmsis/same70/include/component/spi.h.

SPI_IDR

__O uint32_t Spi::SPI_IDR

(Spi Offset: 0x18) Interrupt Disable Register

Definition at line 53 of file utils/cmsis/same70/include/component/spi.h.

SPI_IER

__O uint32_t Spi::SPI_IER

(Spi Offset: 0x14) Interrupt Enable Register

Definition at line 52 of file utils/cmsis/same70/include/component/spi.h.

SPI_IMR

__I uint32_t Spi::SPI_IMR

(Spi Offset: 0x1C) Interrupt Mask Register

Definition at line 54 of file utils/cmsis/same70/include/component/spi.h.

SPI_MR

__IO uint32_t Spi::SPI_MR

(Spi Offset: 0x04) Mode Register

Definition at line 48 of file utils/cmsis/same70/include/component/spi.h.

SPI_RDR

__I uint32_t Spi::SPI_RDR

(Spi Offset: 0x08) Receive Data Register

Definition at line 49 of file utils/cmsis/same70/include/component/spi.h.

SPI_SR

__I uint32_t Spi::SPI_SR

(Spi Offset: 0x10) Status Register

Definition at line 51 of file utils/cmsis/same70/include/component/spi.h.

SPI_TDR

__O uint32_t Spi::SPI_TDR

(Spi Offset: 0x0C) Transmit Data Register

Definition at line 50 of file utils/cmsis/same70/include/component/spi.h.

SPI_VERSION

__I uint32_t Spi::SPI_VERSION

(Spi Offset: 0xFC) Version Register

Definition at line 61 of file utils/cmsis/same70/include/component/spi.h.

SPI_WPMR

__IO uint32_t Spi::SPI_WPMR

(Spi Offset: 0xE4) Write Protection Mode Register

Definition at line 58 of file utils/cmsis/same70/include/component/spi.h.

SPI_WPSR

__I uint32_t Spi::SPI_WPSR

(Spi Offset: 0xE8) Write Protection Status Register

Definition at line 59 of file utils/cmsis/same70/include/component/spi.h.

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The documentation for this struct was generated from the following file:

• utils/cmsis/same70/include/component/spi.h