Sdramc hardware registers. More...
#include <sdramc.h>
Public Attributes | |
| __I uint32_t | Reserved1 [1] | 
| __I uint32_t | Reserved2 [49] | 
| __IO uint32_t | SDRAMC_CFR1 | 
| (Sdramc Offset: 0x28) SDRAMC Configuration Register 1  More... | |
| __IO uint32_t | SDRAMC_CR | 
| (Sdramc Offset: 0x08) SDRAMC Configuration Register  More... | |
| __O uint32_t | SDRAMC_IDR | 
| (Sdramc Offset: 0x18) SDRAMC Interrupt Disable Register  More... | |
| __O uint32_t | SDRAMC_IER | 
| (Sdramc Offset: 0x14) SDRAMC Interrupt Enable Register  More... | |
| __I uint32_t | SDRAMC_IMR | 
| (Sdramc Offset: 0x1C) SDRAMC Interrupt Mask Register  More... | |
| __I uint32_t | SDRAMC_ISR | 
| (Sdramc Offset: 0x20) SDRAMC Interrupt Status Register  More... | |
| __IO uint32_t | SDRAMC_LPR | 
| (Sdramc Offset: 0x10) SDRAMC Low Power Register  More... | |
| __IO uint32_t | SDRAMC_MDR | 
| (Sdramc Offset: 0x24) SDRAMC Memory Device Register  More... | |
| __IO uint32_t | SDRAMC_MR | 
| (Sdramc Offset: 0x00) SDRAMC Mode Register  More... | |
| __IO uint32_t | SDRAMC_OCMS | 
| (Sdramc Offset: 0x2C) SDRAMC OCMS Register  More... | |
| __O uint32_t | SDRAMC_OCMS_KEY1 | 
| (Sdramc Offset: 0x30) SDRAMC OCMS KEY1 Register  More... | |
| __O uint32_t | SDRAMC_OCMS_KEY2 | 
| (Sdramc Offset: 0x34) SDRAMC OCMS KEY2 Register  More... | |
| __IO uint32_t | SDRAMC_TR | 
| (Sdramc Offset: 0x04) SDRAMC Refresh Timer Register  More... | |
| __I uint32_t | SDRAMC_VERSION | 
| (Sdramc Offset: 0xFC) SDRAMC Version Register  More... | |
Sdramc hardware registers.
Definition at line 46 of file component/sdramc.h.
| __I uint32_t Sdramc::Reserved1[1] | 
Definition at line 50 of file component/sdramc.h.
| __I uint32_t Sdramc::Reserved2[49] | 
Definition at line 61 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_CFR1 | 
(Sdramc Offset: 0x28) SDRAMC Configuration Register 1
Definition at line 57 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_CR | 
(Sdramc Offset: 0x08) SDRAMC Configuration Register
Definition at line 49 of file component/sdramc.h.
| __O uint32_t Sdramc::SDRAMC_IDR | 
(Sdramc Offset: 0x18) SDRAMC Interrupt Disable Register
Definition at line 53 of file component/sdramc.h.
| __O uint32_t Sdramc::SDRAMC_IER | 
(Sdramc Offset: 0x14) SDRAMC Interrupt Enable Register
Definition at line 52 of file component/sdramc.h.
| __I uint32_t Sdramc::SDRAMC_IMR | 
(Sdramc Offset: 0x1C) SDRAMC Interrupt Mask Register
Definition at line 54 of file component/sdramc.h.
| __I uint32_t Sdramc::SDRAMC_ISR | 
(Sdramc Offset: 0x20) SDRAMC Interrupt Status Register
Definition at line 55 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_LPR | 
(Sdramc Offset: 0x10) SDRAMC Low Power Register
Definition at line 51 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_MDR | 
(Sdramc Offset: 0x24) SDRAMC Memory Device Register
Definition at line 56 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_MR | 
(Sdramc Offset: 0x00) SDRAMC Mode Register
Definition at line 47 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_OCMS | 
(Sdramc Offset: 0x2C) SDRAMC OCMS Register
Definition at line 58 of file component/sdramc.h.
| __O uint32_t Sdramc::SDRAMC_OCMS_KEY1 | 
(Sdramc Offset: 0x30) SDRAMC OCMS KEY1 Register
Definition at line 59 of file component/sdramc.h.
| __O uint32_t Sdramc::SDRAMC_OCMS_KEY2 | 
(Sdramc Offset: 0x34) SDRAMC OCMS KEY2 Register
Definition at line 60 of file component/sdramc.h.
| __IO uint32_t Sdramc::SDRAMC_TR | 
(Sdramc Offset: 0x04) SDRAMC Refresh Timer Register
Definition at line 48 of file component/sdramc.h.
| __I uint32_t Sdramc::SDRAMC_VERSION | 
(Sdramc Offset: 0xFC) SDRAMC Version Register
Definition at line 62 of file component/sdramc.h.