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Macros
#define	REG_SPI0_CR ((__O uint32_t)0x40008000U)
	(SPI0) Control Register More...

#define	REG_SPI0_CSR ((__IO uint32_t)0x40008030U)
	(SPI0) Chip Select Register (CS_number = 0) More...

#define	REG_SPI0_IDR ((__O uint32_t)0x40008018U)
	(SPI0) Interrupt Disable Register More...

#define	REG_SPI0_IER ((__O uint32_t)0x40008014U)
	(SPI0) Interrupt Enable Register More...

#define	REG_SPI0_IMR ((__I uint32_t)0x4000801CU)
	(SPI0) Interrupt Mask Register More...

#define	REG_SPI0_MR ((__IO uint32_t)0x40008004U)
	(SPI0) Mode Register More...

#define	REG_SPI0_RDR ((__I uint32_t)0x40008008U)
	(SPI0) Receive Data Register More...

#define	REG_SPI0_SR ((__I uint32_t)0x40008010U)
	(SPI0) Status Register More...

#define	REG_SPI0_TDR ((__O uint32_t)0x4000800CU)
	(SPI0) Transmit Data Register More...

#define	REG_SPI0_VERSION ((__I uint32_t)0x400080FCU)
	(SPI0) Version Register More...

#define	REG_SPI0_WPMR ((__IO uint32_t)0x400080E4U)
	(SPI0) Write Protection Mode Register More...

#define	REG_SPI0_WPSR ((__I uint32_t)0x400080E8U)
	(SPI0) Write Protection Status Register More...

Detailed Description

Definition in file spi0.h.

Macro Definition Documentation

◆ REG_SPI0_CR

#define REG_SPI0_CR (*(__O uint32_t*)0x40008000U)

(SPI0) Control Register

Definition at line 53 of file spi0.h.

◆ REG_SPI0_CSR

#define REG_SPI0_CSR (*(__IO uint32_t*)0x40008030U)

(SPI0) Chip Select Register (CS_number = 0)

Definition at line 61 of file spi0.h.

◆ REG_SPI0_IDR

#define REG_SPI0_IDR (*(__O uint32_t*)0x40008018U)

(SPI0) Interrupt Disable Register

Definition at line 59 of file spi0.h.

◆ REG_SPI0_IER

#define REG_SPI0_IER (*(__O uint32_t*)0x40008014U)

(SPI0) Interrupt Enable Register

Definition at line 58 of file spi0.h.

◆ REG_SPI0_IMR

#define REG_SPI0_IMR (*(__I uint32_t*)0x4000801CU)

(SPI0) Interrupt Mask Register

Definition at line 60 of file spi0.h.

◆ REG_SPI0_MR

#define REG_SPI0_MR (*(__IO uint32_t*)0x40008004U)

(SPI0) Mode Register

Definition at line 54 of file spi0.h.

◆ REG_SPI0_RDR

#define REG_SPI0_RDR (*(__I uint32_t*)0x40008008U)

(SPI0) Receive Data Register

Definition at line 55 of file spi0.h.

◆ REG_SPI0_SR

#define REG_SPI0_SR (*(__I uint32_t*)0x40008010U)

(SPI0) Status Register

Definition at line 57 of file spi0.h.

◆ REG_SPI0_TDR

#define REG_SPI0_TDR (*(__O uint32_t*)0x4000800CU)

(SPI0) Transmit Data Register

Definition at line 56 of file spi0.h.

◆ REG_SPI0_VERSION

#define REG_SPI0_VERSION (*(__I uint32_t*)0x400080FCU)

(SPI0) Version Register

Definition at line 64 of file spi0.h.

◆ REG_SPI0_WPMR

#define REG_SPI0_WPMR (*(__IO uint32_t*)0x400080E4U)

(SPI0) Write Protection Mode Register

Definition at line 62 of file spi0.h.

◆ REG_SPI0_WPSR

#define REG_SPI0_WPSR (*(__I uint32_t*)0x400080E8U)

(SPI0) Write Protection Status Register

Definition at line 63 of file spi0.h.

Macros