Go to the documentation of this file. 35 #ifndef _SAME70_PIOA_INSTANCE_ 36 #define _SAME70_PIOA_INSTANCE_ 39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 40 #define REG_PIOA_PER (0x400E0E00U) 41 #define REG_PIOA_PDR (0x400E0E04U) 42 #define REG_PIOA_PSR (0x400E0E08U) 43 #define REG_PIOA_OER (0x400E0E10U) 44 #define REG_PIOA_ODR (0x400E0E14U) 45 #define REG_PIOA_OSR (0x400E0E18U) 46 #define REG_PIOA_IFER (0x400E0E20U) 47 #define REG_PIOA_IFDR (0x400E0E24U) 48 #define REG_PIOA_IFSR (0x400E0E28U) 49 #define REG_PIOA_SODR (0x400E0E30U) 50 #define REG_PIOA_CODR (0x400E0E34U) 51 #define REG_PIOA_ODSR (0x400E0E38U) 52 #define REG_PIOA_PDSR (0x400E0E3CU) 53 #define REG_PIOA_IER (0x400E0E40U) 54 #define REG_PIOA_IDR (0x400E0E44U) 55 #define REG_PIOA_IMR (0x400E0E48U) 56 #define REG_PIOA_ISR (0x400E0E4CU) 57 #define REG_PIOA_MDER (0x400E0E50U) 58 #define REG_PIOA_MDDR (0x400E0E54U) 59 #define REG_PIOA_MDSR (0x400E0E58U) 60 #define REG_PIOA_PUDR (0x400E0E60U) 61 #define REG_PIOA_PUER (0x400E0E64U) 62 #define REG_PIOA_PUSR (0x400E0E68U) 63 #define REG_PIOA_ABCDSR (0x400E0E70U) 64 #define REG_PIOA_IFSCDR (0x400E0E80U) 65 #define REG_PIOA_IFSCER (0x400E0E84U) 66 #define REG_PIOA_IFSCSR (0x400E0E88U) 67 #define REG_PIOA_SCDR (0x400E0E8CU) 68 #define REG_PIOA_PPDDR (0x400E0E90U) 69 #define REG_PIOA_PPDER (0x400E0E94U) 70 #define REG_PIOA_PPDSR (0x400E0E98U) 71 #define REG_PIOA_OWER (0x400E0EA0U) 72 #define REG_PIOA_OWDR (0x400E0EA4U) 73 #define REG_PIOA_OWSR (0x400E0EA8U) 74 #define REG_PIOA_AIMER (0x400E0EB0U) 75 #define REG_PIOA_AIMDR (0x400E0EB4U) 76 #define REG_PIOA_AIMMR (0x400E0EB8U) 77 #define REG_PIOA_ESR (0x400E0EC0U) 78 #define REG_PIOA_LSR (0x400E0EC4U) 79 #define REG_PIOA_ELSR (0x400E0EC8U) 80 #define REG_PIOA_FELLSR (0x400E0ED0U) 81 #define REG_PIOA_REHLSR (0x400E0ED4U) 82 #define REG_PIOA_FRLHSR (0x400E0ED8U) 83 #define REG_PIOA_LOCKSR (0x400E0EE0U) 84 #define REG_PIOA_WPMR (0x400E0EE4U) 85 #define REG_PIOA_WPSR (0x400E0EE8U) 86 #define REG_PIOA_VERSION (0x400E0EFCU) 87 #define REG_PIOA_SCHMITT (0x400E0F00U) 88 #define REG_PIOA_DRIVER (0x400E0F18U) 89 #define REG_PIOA_KER (0x400E0F20U) 90 #define REG_PIOA_KRCR (0x400E0F24U) 91 #define REG_PIOA_KDR (0x400E0F28U) 92 #define REG_PIOA_KIER (0x400E0F30U) 93 #define REG_PIOA_KIDR (0x400E0F34U) 94 #define REG_PIOA_KIMR (0x400E0F38U) 95 #define REG_PIOA_KSR (0x400E0F3CU) 96 #define REG_PIOA_KKPR (0x400E0F40U) 97 #define REG_PIOA_KKRR (0x400E0F44U) 98 #define REG_PIOA_PCMR (0x400E0F50U) 99 #define REG_PIOA_PCIER (0x400E0F54U) 100 #define REG_PIOA_PCIDR (0x400E0F58U) 101 #define REG_PIOA_PCIMR (0x400E0F5CU) 102 #define REG_PIOA_PCISR (0x400E0F60U) 103 #define REG_PIOA_PCRHR (0x400E0F64U) 105 #define REG_PIOA_PER (*(__O uint32_t*)0x400E0E00U) 106 #define REG_PIOA_PDR (*(__O uint32_t*)0x400E0E04U) 107 #define REG_PIOA_PSR (*(__I uint32_t*)0x400E0E08U) 108 #define REG_PIOA_OER (*(__O uint32_t*)0x400E0E10U) 109 #define REG_PIOA_ODR (*(__O uint32_t*)0x400E0E14U) 110 #define REG_PIOA_OSR (*(__I uint32_t*)0x400E0E18U) 111 #define REG_PIOA_IFER (*(__O uint32_t*)0x400E0E20U) 112 #define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) 113 #define REG_PIOA_IFSR (*(__I uint32_t*)0x400E0E28U) 114 #define REG_PIOA_SODR (*(__O uint32_t*)0x400E0E30U) 115 #define REG_PIOA_CODR (*(__O uint32_t*)0x400E0E34U) 116 #define REG_PIOA_ODSR (*(__IO uint32_t*)0x400E0E38U) 117 #define REG_PIOA_PDSR (*(__I uint32_t*)0x400E0E3CU) 118 #define REG_PIOA_IER (*(__O uint32_t*)0x400E0E40U) 119 #define REG_PIOA_IDR (*(__O uint32_t*)0x400E0E44U) 120 #define REG_PIOA_IMR (*(__I uint32_t*)0x400E0E48U) 121 #define REG_PIOA_ISR (*(__I uint32_t*)0x400E0E4CU) 122 #define REG_PIOA_MDER (*(__O uint32_t*)0x400E0E50U) 123 #define REG_PIOA_MDDR (*(__O uint32_t*)0x400E0E54U) 124 #define REG_PIOA_MDSR (*(__I uint32_t*)0x400E0E58U) 125 #define REG_PIOA_PUDR (*(__O uint32_t*)0x400E0E60U) 126 #define REG_PIOA_PUER (*(__O uint32_t*)0x400E0E64U) 127 #define REG_PIOA_PUSR (*(__I uint32_t*)0x400E0E68U) 128 #define REG_PIOA_ABCDSR (*(__IO uint32_t*)0x400E0E70U) 129 #define REG_PIOA_IFSCDR (*(__O uint32_t*)0x400E0E80U) 130 #define REG_PIOA_IFSCER (*(__O uint32_t*)0x400E0E84U) 131 #define REG_PIOA_IFSCSR (*(__I uint32_t*)0x400E0E88U) 132 #define REG_PIOA_SCDR (*(__IO uint32_t*)0x400E0E8CU) 133 #define REG_PIOA_PPDDR (*(__O uint32_t*)0x400E0E90U) 134 #define REG_PIOA_PPDER (*(__O uint32_t*)0x400E0E94U) 135 #define REG_PIOA_PPDSR (*(__I uint32_t*)0x400E0E98U) 136 #define REG_PIOA_OWER (*(__O uint32_t*)0x400E0EA0U) 137 #define REG_PIOA_OWDR (*(__O uint32_t*)0x400E0EA4U) 138 #define REG_PIOA_OWSR (*(__I uint32_t*)0x400E0EA8U) 139 #define REG_PIOA_AIMER (*(__O uint32_t*)0x400E0EB0U) 140 #define REG_PIOA_AIMDR (*(__O uint32_t*)0x400E0EB4U) 141 #define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) 142 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) 143 #define REG_PIOA_LSR (*(__O uint32_t*)0x400E0EC4U) 144 #define REG_PIOA_ELSR (*(__I uint32_t*)0x400E0EC8U) 145 #define REG_PIOA_FELLSR (*(__O uint32_t*)0x400E0ED0U) 146 #define REG_PIOA_REHLSR (*(__O uint32_t*)0x400E0ED4U) 147 #define REG_PIOA_FRLHSR (*(__I uint32_t*)0x400E0ED8U) 148 #define REG_PIOA_LOCKSR (*(__I uint32_t*)0x400E0EE0U) 149 #define REG_PIOA_WPMR (*(__IO uint32_t*)0x400E0EE4U) 150 #define REG_PIOA_WPSR (*(__I uint32_t*)0x400E0EE8U) 151 #define REG_PIOA_VERSION (*(__I uint32_t*)0x400E0EFCU) 152 #define REG_PIOA_SCHMITT (*(__IO uint32_t*)0x400E0F00U) 153 #define REG_PIOA_DRIVER (*(__IO uint32_t*)0x400E0F18U) 154 #define REG_PIOA_KER (*(__IO uint32_t*)0x400E0F20U) 155 #define REG_PIOA_KRCR (*(__IO uint32_t*)0x400E0F24U) 156 #define REG_PIOA_KDR (*(__IO uint32_t*)0x400E0F28U) 157 #define REG_PIOA_KIER (*(__O uint32_t*)0x400E0F30U) 158 #define REG_PIOA_KIDR (*(__O uint32_t*)0x400E0F34U) 159 #define REG_PIOA_KIMR (*(__I uint32_t*)0x400E0F38U) 160 #define REG_PIOA_KSR (*(__I uint32_t*)0x400E0F3CU) 161 #define REG_PIOA_KKPR (*(__I uint32_t*)0x400E0F40U) 162 #define REG_PIOA_KKRR (*(__I uint32_t*)0x400E0F44U) 163 #define REG_PIOA_PCMR (*(__IO uint32_t*)0x400E0F50U) 164 #define REG_PIOA_PCIER (*(__O uint32_t*)0x400E0F54U) 165 #define REG_PIOA_PCIDR (*(__O uint32_t*)0x400E0F58U) 166 #define REG_PIOA_PCIMR (*(__I uint32_t*)0x400E0F5CU) 167 #define REG_PIOA_PCISR (*(__I uint32_t*)0x400E0F60U) 168 #define REG_PIOA_PCRHR (*(__I uint32_t*)0x400E0F64U)