Classes | Macros | Enumerations | Functions
d_dma.h File Reference
#include <xdmac.h>
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Classes

struct  dma_channel_config_t
 
struct  dma_transfer_info_t
 

Macros

#define ALIGN_32B(_bytes_)   ((_bytes_) + (sizeof(uint32_t) - ((_bytes_) % sizeof(uint32_t))))
 
#define ALIGN_32B_MASK   0xffffffe0
 
#define DBGPIO_END(x)
 
#define DBGPIO_START(x)
 
#define DCACHE_CLEAN_INVALIDATE_MEMCPY(dst, src, size)
 
#define DMA_INT_DISABLE(_ch_)
 
#define DMA_INT_ENABLE(_ch_)
 
#define IS_32B_ALIGNED(_addr_)   !(((uint32_t)(_addr_)) & 0x0000001f)
 
#define MEMCPY_DCACHE_CLEAN(dst, src, size)
 
#define MEMCPY_DCACHE_CLEAN_INVALIDATE(dst, src, size)
 
#define XDMAC_PERID_SPI0_RX   2
 
#define XDMAC_PERID_SPI0_TX   1
 
#define XDMAC_PERID_SPI1_RX   4
 
#define XDMAC_PERID_SPI1_TX   3
 
#define XDMAC_PERID_UART0_RX   21
 
#define XDMAC_PERID_UART0_TX   20
 
#define XDMAC_PERID_UART1_RX   23
 
#define XDMAC_PERID_UART1_TX   22
 
#define XDMAC_PERID_UART2_RX   25
 
#define XDMAC_PERID_UART2_TX   24
 
#define XDMAC_PERID_UART3_RX   27
 
#define XDMAC_PERID_UART3_TX   26
 
#define XDMAC_PERID_UART4_RX   29
 
#define XDMAC_PERID_UART4_TX   28
 
#define XDMAC_PERID_USART0_RX   8
 
#define XDMAC_PERID_USART0_TX   7
 
#define XDMAC_PERID_USART1_RX   10
 
#define XDMAC_PERID_USART1_TX   9
 
#define XDMAC_PERID_USART2_RX   12
 
#define XDMAC_PERID_USART2_TX   11
 

Enumerations

enum  {
  DMA_CH_SPI_SENSORS_TX = 0, DMA_CH_SPI_SENSORS_RX, DMA_CH_SPI_COMM_TX, DMA_CH_SPI_COMM_RX,
  DMA_CH_UART_UINS0_TX, DMA_CH_UART_UINS0_RX, DMA_CH_UART_UINS1_TX, DMA_CH_UART_UINS1_RX,
  DMA_CH_UART_XBEE_TX, DMA_CH_UART_XBEE_RX, DMA_CH_UART_XRADIO_TX, DMA_CH_UART_XRADIO_RX,
  DMA_CH_UART_WINC_BLE_TX, DMA_CH_UART_WINC_BLE_RX, DMA_CH_UART_SP330_TX, DMA_CH_UART_SP330_RX,
  DMA_CH_UART_GPIO_TTL_TX, DMA_CH_UART_GPIO_TTL_RX, DMA_CH_SD_CARD, DMA_CH_SPI_INS_TX,
  DMA_CH_SPI_INS_RX, DMA_CHAN_COUNT, DMA_CHAN_MAX = 24
}
 

Functions

void dma_chan_disable (uint32_t ch)
 
int dma_chan_enable (uint32_t ch)
 
int dma_configure (dma_channel_config_t *hd, lld_view1 *lld)
 
void dma_init (void)
 
int dma_transfer_is_complete (uint32_t ch)
 

Macro Definition Documentation

◆ ALIGN_32B

#define ALIGN_32B (   _bytes_)    ((_bytes_) + (sizeof(uint32_t) - ((_bytes_) % sizeof(uint32_t))))

Definition at line 85 of file d_dma.h.

◆ ALIGN_32B_MASK

#define ALIGN_32B_MASK   0xffffffe0

Definition at line 83 of file d_dma.h.

◆ DBGPIO_END

#define DBGPIO_END (   x)

Definition at line 23 of file d_dma.h.

◆ DBGPIO_START

#define DBGPIO_START (   x)

Definition at line 22 of file d_dma.h.

◆ DCACHE_CLEAN_INVALIDATE_MEMCPY

#define DCACHE_CLEAN_INVALIDATE_MEMCPY (   dst,
  src,
  size 
)
Value:
DBGPIO_START( DBG_RX_DCACHE_CLEAN_PIN ); \
SCB_CLEANINVALIDATE_DCACHE_BY_ADDR_32BYTE_ALIGNED((src), (size)); \
DBGPIO_END( DBG_RX_DCACHE_CLEAN_PIN ); \
memcpy((void*)(dst), (const void*)(src), (size));
DBGPIO_START
#define DBGPIO_START(x)
Definition: d_dma.h:22

Definition at line 40 of file d_dma.h.

◆ DMA_INT_DISABLE

#define DMA_INT_DISABLE (   _ch_)

Definition at line 57 of file d_dma.h.

◆ DMA_INT_ENABLE

#define DMA_INT_ENABLE (   _ch_)

Definition at line 56 of file d_dma.h.

◆ IS_32B_ALIGNED

#define IS_32B_ALIGNED (   _addr_)    !(((uint32_t)(_addr_)) & 0x0000001f)

Definition at line 84 of file d_dma.h.

◆ MEMCPY_DCACHE_CLEAN

#define MEMCPY_DCACHE_CLEAN (   dst,
  src,
  size 
)
Value:
memcpy((void*)(dst), (const void*)(src), (size)); \
DBGPIO_START(DBG_TX_DCACHE_CLEAN_PIN); \
SCB_CLEAN_DCACHE_BY_ADDR_32BYTE_ALIGNED((dst), (size)); \
DBGPIO_END(DBG_TX_DCACHE_CLEAN_PIN);

Definition at line 26 of file d_dma.h.

◆ MEMCPY_DCACHE_CLEAN_INVALIDATE

#define MEMCPY_DCACHE_CLEAN_INVALIDATE (   dst,
  src,
  size 
)
Value:
memcpy((void*)(dst), (const void*)(src), (size)); \
DBGPIO_START(DBG_TX_DCACHE_CLEAN_PIN); \
SCB_CLEANINVALIDATE_DCACHE_BY_ADDR_32BYTE_ALIGNED((dst), (size)); \
DBGPIO_END(DBG_TX_DCACHE_CLEAN_PIN);

Definition at line 33 of file d_dma.h.

◆ XDMAC_PERID_SPI0_RX

#define XDMAC_PERID_SPI0_RX   2

Definition at line 62 of file d_dma.h.

◆ XDMAC_PERID_SPI0_TX

#define XDMAC_PERID_SPI0_TX   1

Definition at line 61 of file d_dma.h.

◆ XDMAC_PERID_SPI1_RX

#define XDMAC_PERID_SPI1_RX   4

Definition at line 64 of file d_dma.h.

◆ XDMAC_PERID_SPI1_TX

#define XDMAC_PERID_SPI1_TX   3

Definition at line 63 of file d_dma.h.

◆ XDMAC_PERID_UART0_RX

#define XDMAC_PERID_UART0_RX   21

Definition at line 72 of file d_dma.h.

◆ XDMAC_PERID_UART0_TX

#define XDMAC_PERID_UART0_TX   20

Definition at line 71 of file d_dma.h.

◆ XDMAC_PERID_UART1_RX

#define XDMAC_PERID_UART1_RX   23

Definition at line 74 of file d_dma.h.

◆ XDMAC_PERID_UART1_TX

#define XDMAC_PERID_UART1_TX   22

Definition at line 73 of file d_dma.h.

◆ XDMAC_PERID_UART2_RX

#define XDMAC_PERID_UART2_RX   25

Definition at line 76 of file d_dma.h.

◆ XDMAC_PERID_UART2_TX

#define XDMAC_PERID_UART2_TX   24

Definition at line 75 of file d_dma.h.

◆ XDMAC_PERID_UART3_RX

#define XDMAC_PERID_UART3_RX   27

Definition at line 78 of file d_dma.h.

◆ XDMAC_PERID_UART3_TX

#define XDMAC_PERID_UART3_TX   26

Definition at line 77 of file d_dma.h.

◆ XDMAC_PERID_UART4_RX

#define XDMAC_PERID_UART4_RX   29

Definition at line 80 of file d_dma.h.

◆ XDMAC_PERID_UART4_TX

#define XDMAC_PERID_UART4_TX   28

Definition at line 79 of file d_dma.h.

◆ XDMAC_PERID_USART0_RX

#define XDMAC_PERID_USART0_RX   8

Definition at line 66 of file d_dma.h.

◆ XDMAC_PERID_USART0_TX

#define XDMAC_PERID_USART0_TX   7

Definition at line 65 of file d_dma.h.

◆ XDMAC_PERID_USART1_RX

#define XDMAC_PERID_USART1_RX   10

Definition at line 68 of file d_dma.h.

◆ XDMAC_PERID_USART1_TX

#define XDMAC_PERID_USART1_TX   9

Definition at line 67 of file d_dma.h.

◆ XDMAC_PERID_USART2_RX

#define XDMAC_PERID_USART2_RX   12

Definition at line 70 of file d_dma.h.

◆ XDMAC_PERID_USART2_TX

#define XDMAC_PERID_USART2_TX   11

Definition at line 69 of file d_dma.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
DMA_CH_SPI_SENSORS_TX 
DMA_CH_SPI_SENSORS_RX 
DMA_CH_SPI_COMM_TX 
DMA_CH_SPI_COMM_RX 
DMA_CH_UART_UINS0_TX 
DMA_CH_UART_UINS0_RX 
DMA_CH_UART_UINS1_TX 
DMA_CH_UART_UINS1_RX 
DMA_CH_UART_XBEE_TX 
DMA_CH_UART_XBEE_RX 
DMA_CH_UART_XRADIO_TX 
DMA_CH_UART_XRADIO_RX 
DMA_CH_UART_WINC_BLE_TX 
DMA_CH_UART_WINC_BLE_RX 
DMA_CH_UART_SP330_TX 
DMA_CH_UART_SP330_RX 
DMA_CH_UART_GPIO_TTL_TX 
DMA_CH_UART_GPIO_TTL_RX 
DMA_CH_SD_CARD 
DMA_CH_SPI_INS_TX 
DMA_CH_SPI_INS_RX 
DMA_CHAN_COUNT 
DMA_CHAN_MAX 

Definition at line 88 of file d_dma.h.

Function Documentation

◆ dma_chan_disable()

void dma_chan_disable ( uint32_t  ch)

◆ dma_chan_enable()

int dma_chan_enable ( uint32_t  ch)

◆ dma_configure()

int dma_configure ( dma_channel_config_t *  hd,
lld_view1 *  lld 
)

◆ dma_init()

void dma_init ( void  )

◆ dma_transfer_is_complete()

int dma_transfer_is_complete ( uint32_t  ch)

inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:17:59