39 #ifndef __ARCH_powerpc_ORO_ATOMIC__ 40 #define __ARCH_powerpc_ORO_ATOMIC__ 56 #ifdef __SUBARCH_HAS_LWSYNC 57 # define LWSYNC lwsync 67 __asm__ __volatile__ (
"eieio" : : :
"memory");
72 __asm__ __volatile__ (
"isync" : : :
"memory");
79 # define stringify_in_c(...) __VA_ARGS__ 80 # define ASM_CONST(x) x 83 # define __stringify_in_c(...) #__VA_ARGS__ 84 # define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " " 85 # define __ASM_CONST(x) x##UL 86 # define ASM_CONST(x) __ASM_CONST(x) 90 #define PPC_LL stringify_in_c(lwz) 91 #define PPC_STL stringify_in_c(stw) 92 #define PPC_LCMPI stringify_in_c(cmpwi) 93 #define PPC_LONG stringify_in_c(.long) 94 #define PPC_TLNEI stringify_in_c(twnei) 95 #define PPC_LLARX stringify_in_c(lwarx) 96 #define PPC_STLCX stringify_in_c(stwcx.) 97 #define PPC_CNTLZL stringify_in_c(cntlzw) 99 #ifdef CONFIG_IBM405_ERR77 103 #define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;) 104 #define PPC405_ERR77_SYNC stringify_in_c(sync;) 106 #define PPC405_ERR77(ra,rb) 107 #define PPC405_ERR77_SYNC 119 #define ORO_ATOMIC_INIT(i) { (i) } 120 #define ORO_ATOMIC_SETUP oro_atomic_set 121 #define ORO_ATOMIC_CLEANUP(v) 123 #define oro_atomic_read(v) ((v)->counter) 124 #define oro_atomic_set(v,i) (((v)->counter) = (i)) 130 __asm__ __volatile__(
131 "1: lwarx %0,0,%3 # oro_atomic_add\n\ 145 __asm__ __volatile__(
147 "1: lwarx %0,0,%2 # oro_atomic_add_return\n\ 160 #define oro_atomic_add_negative(a, v) (oro_atomic_add_return((a), (v)) < 0) 166 __asm__ __volatile__(
167 "1: lwarx %0,0,%3 # oro_atomic_sub\n\ 181 __asm__ __volatile__(
183 "1: lwarx %0,0,%2 # oro_atomic_sub_return\n\ 200 __asm__ __volatile__(
201 "1: lwarx %0,0,%2 # oro_atomic_inc\n\ 215 __asm__ __volatile__(
217 "1: lwarx %0,0,%1 # oro_atomic_inc_return\n\ 238 #define oro_atomic_inc_and_test(v) (oro_atomic_inc_return(v) == 0) 244 __asm__ __volatile__(
245 "1: lwarx %0,0,%2 # oro_atomic_dec\n\ 259 __asm__ __volatile__(
261 "1: lwarx %0,0,%1 # oro_atomic_dec_return\n\ 274 #define oro_atomic_oro_cmpxchg(v, o, n) ((int)oro_cmpxchg(&((v)->counter), (o), (n))) 275 #define oro_atomic_xchg(v, new) (xchg(&((v)->counter), new)) 286 #define oro_atomic_add_unless(v, a, u) \ 289 c = oro_atomic_read(v); \ 291 if (unlikely(c == (u))) \ 293 old = oro_atomic_oro_cmpxchg((v), c, c + (a)); \ 294 if (likely(old == c)) \ 300 #define oro_atomic_inc_not_zero(v) oro_atomic_add_unless((v), 1, 0) 302 #define oro_atomic_sub_and_test(a, v) (oro_atomic_sub_return((a), (v)) == 0) 303 #define oro_atomic_dec_and_test(v) (oro_atomic_dec_return((v)) == 0) 313 __asm__ __volatile__(
315 "1: lwarx %0,0,%1 # oro_atomic_dec_if_positive\n\ 330 #define smp_mb__before_oro_atomic_dec() smp_mb() 331 #define smp_mb__after_oro_atomic_dec() smp_mb() 332 #define smp_mb__before_oro_atomic_inc() smp_mb() 333 #define smp_mb__after_oro_atomic_inc() smp_mb() 341 #endif // __ARCH_powerpc_ORO_ATOMIC__
static __inline__ void oro_atomic_add(oro_atomic_t *v, int n)
#define PPC405_ERR77(ra, rb)
static __inline__ int oro_atomic_sub_return(oro_atomic_t *v, int n)
static __inline__ int oro_atomic_dec_if_positive(oro_atomic_t *v)
static __inline__ int oro_atomic_dec_return(oro_atomic_t *v)
static __inline__ void oro_atomic_inc(oro_atomic_t *v)
static __inline__ void oro_atomic_sub(int a, oro_atomic_t *v)
struct oro_atomic_t_interface oro_atomic_t
static __inline__ int oro_atomic_inc_return(oro_atomic_t *v)
static __inline__ void oro_atomic_dec(oro_atomic_t *v)
static __inline__ int oro_atomic_add_return(oro_atomic_t *v, int n)