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Macros | |
| #define | IS_RCC_PLLSAI_DIVR_VALUE(VALUE) |
| #define | RCC_PLLSAIDivR_Div16 ((uint32_t)0x00030000) |
| #define | RCC_PLLSAIDivR_Div2 ((uint32_t)0x00000000) |
| #define | RCC_PLLSAIDivR_Div4 ((uint32_t)0x00010000) |
| #define | RCC_PLLSAIDivR_Div8 ((uint32_t)0x00020000) |
| #define IS_RCC_PLLSAI_DIVR_VALUE | ( | VALUE | ) |
Definition at line 92 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.h.
| #define RCC_PLLSAIDivR_Div16 ((uint32_t)0x00030000) |
Definition at line 91 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.h.
| #define RCC_PLLSAIDivR_Div2 ((uint32_t)0x00000000) |
Definition at line 88 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.h.
| #define RCC_PLLSAIDivR_Div4 ((uint32_t)0x00010000) |
Definition at line 89 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.h.
| #define RCC_PLLSAIDivR_Div8 ((uint32_t)0x00020000) |
Definition at line 90 of file CMSIS/CM4/DeviceSupport/ST/STM32F4xx/stm32f4xx_rcc.h.