#include "typedefs_shadow.h"
Go to the source code of this file.
Define Documentation
| #define __attribute__ | ( | x | ) |
EtherCAT protocol for RoNeX SPI stacker, 02.
Definition at line 28 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define ANALOGUE_INPUT_JUSTIFICATION RIGHT |
Definition at line 35 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define ANALOGUE_INPUT_RESOLUTION 12 |
Definition at line 34 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define ANALOGUE_OUTPUT_JUSTIFICATION RIGHT |
Definition at line 38 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define ANALOGUE_OUTPUT_RESOLUTION 0 |
Definition at line 37 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define COMMAND_ADDRESS 0x1000 |
ET1200 address containing the Command Structure.
Definition at line 243 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define COMMAND_ARRAY_SIZE_BYTES (sizeof(RONEX_COMMAND_02000002)) |
Definition at line 233 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define COMMAND_ARRAY_SIZE_WORDS (sizeof(RONEX_COMMAND_02000002)/2) |
Definition at line 234 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_ANALOGUE_INPUTS 0x0400 |
Definition at line 136 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_CLOCK_DIVIDER 0x0002 |
Definition at line 124 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_INPUT_TRIGGERING 0x0100 |
Definition at line 133 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_INTER_BYTE_DELAY 0x0080 |
Definition at line 131 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_MOSI_SOMI_SAME_PIN 0x0200 |
Definition at line 134 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_PIN_OUTPUTS 0x0004 |
Definition at line 125 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_SPI_MODE_00 0x0008 |
Definition at line 127 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_SPI_MODE_01 0x0010 |
Definition at line 128 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_SPI_MODE_10 0x0020 |
Definition at line 129 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_SPI_MODE_11 0x0040 |
Definition at line 130 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define IMPLEMENTED_FEATURE_TRANSACTION_SIZE 0x0001 |
Implemented features -------------------- Due to the complexity of the requirements for this module, and the need to have something working very quickly, not all of the features will be implemented immediately. Essential features will be implemented first, with less important ones coming later.
You can ask the node which features are implemented using the RONEX_COMMAND_02000002_COMMAND_TYPE_CONFIG_INFO. The returned CONFIG_INFO_02000002 contains the implemented_features word.
Definition at line 123 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define MAXIMUM_NUM_STACKERS 2 |
Definition at line 44 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define NUM_ANALOGUE_INPUTS 6 |
Definition at line 33 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define NUM_ANALOGUE_OUTPUTS 0 |
Definition at line 36 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define NUM_DIGITAL_IO 6 |
Definition at line 39 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define NUM_DIO_SAMPLES 4 |
Definition at line 40 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define NUM_SPI_OUTPUTS 4 |
Definition at line 41 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_INPUT_STATE_MOSI_0 0x0001 |
Pin input states ----------------
The MOSI pins are sampled by the PSoC at four points during the SPI transaction. All Digital I/O are sampled even if they are set as outputs.
Definition at line 167 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_INPUT_STATE_MOSI_1 0x0002 |
Definition at line 168 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_INPUT_STATE_MOSI_2 0x0004 |
Definition at line 169 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_INPUT_STATE_MOSI_3 0x0008 |
Definition at line 170 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_CS_0 0x0100 |
Definition at line 153 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_CS_1 0x0200 |
Definition at line 154 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_CS_2 0x0400 |
Definition at line 155 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_CS_3 0x0800 |
Definition at line 156 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_DIO_0 0x0001 |
Pin output states -----------------
The CS pins and the Digital I/O pins can be controlled by the host. The states can be set before and after the transaction. The pins are always outputs
Definition at line 147 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_DIO_1 0x0002 |
Definition at line 148 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_DIO_2 0x0004 |
Definition at line 149 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_DIO_3 0x0008 |
Definition at line 150 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_DIO_4 0x0010 |
Definition at line 151 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PIN_OUTPUT_STATE_DIO_5 0x0020 |
Definition at line 152 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PRODUCT_ID 0x02000002 |
Definition at line 43 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PRODUCT_NAME "spi" |
Definition at line 42 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define PROTOCOL_TYPE EC_QUEUED |
Definition at line 242 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_OVER_TEMPERATURE_ERROR 0x0002 |
Definition at line 78 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_RESERVED_ERRORS 0x00FC |
Definition at line 77 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_0_ERROR 0x0100 |
Definition at line 73 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_0_PRESENT 0x1000 |
Flags ----- Available in RONEX_STATUS_02000002.config_info.flags To receive this information, use RONEX_COMMAND_02000002_COMMAND_TYPE_CONFIG_INFO in the RONEX_COMMAND_02000002 struct
Definition at line 69 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_1_ERROR 0x0200 |
Definition at line 74 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_1_PRESENT 0x2000 |
Definition at line 70 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_2_ERROR 0x0400 |
Definition at line 75 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_2_PRESENT 0x4000 |
Definition at line 71 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_3_ERROR 0x0800 |
Definition at line 76 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_STACKER_3_PRESENT 0x8000 |
Definition at line 72 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_02000002_FLAGS_UNKNOWN_ERROR 0x0001 |
Definition at line 79 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_02000002_ADC_SAMPLE_RATE_HZ 1000 |
Maximum possible ADC sample rate. Don't send EtherCAT packets faster than this.
Definition at line 32 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_02000002_COMMAND_TYPE_CONFIG_INFO 0x0002 |
This requests a CONFIG_INFO_02000002 block from the node.
Definition at line 58 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_02000002_COMMAND_TYPE_ERROR 0x00FF |
If this is returned from the node, then some kind of error has happened.
Definition at line 59 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_02000002_COMMAND_TYPE_INVALID 0x0000 |
Zeros imply a failed EtherCAT packet, so this it taken to be invalid.
Command Types ------------- COMMAND_TYPE values are sent by the host to tell the node the type of data contained in the COMMAND struct, or to request specific info from the node. The node will always return the same command_type in its status packet.
Definition at line 56 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_02000002_COMMAND_TYPE_NORMAL 0x0001 |
This is for normal operation.
Definition at line 57 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_02000002_MASTER_CLOCK_SPEED_HZ 64000000 |
Master clock. This is divided down to create the SPI clock.
Definition at line 31 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_COMMAND_STRUCT RONEX_COMMAND_02000002 |
Required for et1200_interface.h to be generic.
Definition at line 246 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define RONEX_STATUS_STRUCT RONEX_STATUS_02000002 |
Required for et1200_interface.h to be generic.
Definition at line 247 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_D0 0x0004 |
Definition at line 101 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_D1 0x0008 |
Definition at line 102 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_D2 0x000c |
Definition at line 103 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_D3 0x0010 |
Definition at line 104 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_D4 0x0014 |
Definition at line 105 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_D5 0x0018 |
Definition at line 106 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_INPUT_TRIGGER_NONE 0x0000 |
Definition at line 100 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_MODE_00 0x0000 |
SPI Configuration -----------------
Definition at line 96 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_MODE_01 0x0001 |
Definition at line 97 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_MODE_10 0x0002 |
Definition at line 98 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_MODE_11 0x0003 |
Definition at line 99 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_MOSI_SOMI_DIFFERENT_PIN 0x0000 |
Definition at line 107 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_CONFIG_MOSI_SOMI_SAME_PIN 0x0020 |
Definition at line 108 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_00_DESCRIPTION "Clock normally low, sample on rising edge" |
Definition at line 86 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_00_NAME "Mode 0: Pha=0 Pol=0" |
Definition at line 81 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_01_DESCRIPTION "Clock normally low, sample on falling edge" |
Definition at line 87 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_01_NAME "Mode 1: Pha=1 Pol=0" |
Definition at line 82 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_10_DESCRIPTION "Clock normally high, sample on falling edge" |
Definition at line 88 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_10_NAME "Mode 2: Pha=0 Pol=1" |
Definition at line 83 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_11_DESCRIPTION "Clock normally high, sample on rising edge" |
Definition at line 89 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_MODE_11_NAME "Mode 3: Pha=1 Pol=1" |
Definition at line 84 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define SPI_TRANSACTION_MAX_SIZE 32 |
Definition at line 46 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define STACKER_TYPE 2 |
range [1..13]
Definition at line 45 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define STATUS_ADDRESS (COMMAND_ADDRESS+sizeof(RONEX_COMMAND_02000002) *4) |
ET1200 address containing the Status Structure.
Definition at line 244 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define STATUS_ARRAY_SIZE_BYTES (sizeof(RONEX_STATUS_02000002)) |
Definition at line 235 of file Ronex_Protocol_0x02000002_SPI_00.h.
| #define STATUS_ARRAY_SIZE_WORDS (sizeof(RONEX_STATUS_02000002)/2) |
Definition at line 236 of file Ronex_Protocol_0x02000002_SPI_00.h.