Enhanced Embedded Flash Controller (EEFC) driver for SAM. More...
#include "efc.h"
Go to the source code of this file.
Defines | |
#define | EEFC_ERROR_FLAGS (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE) |
#define | FWP_KEY 0x5Au |
#define | READ_BUFF_ADDR0 IFLASH0_ADDR |
#define | READ_BUFF_ADDR1 IFLASH1_ADDR |
Functions | |
void | efc_disable_frdy_interrupt (Efc *p_efc) |
Disable the flash ready interrupt. | |
void | efc_enable_frdy_interrupt (Efc *p_efc) |
Enable the flash ready interrupt. | |
uint32_t | efc_get_flash_access_mode (Efc *p_efc) |
Get flash access mode. | |
uint32_t | efc_get_result (Efc *p_efc) |
Get the result of the last executed command. | |
uint32_t | efc_get_status (Efc *p_efc) |
Get the current status of the EEFC. | |
uint32_t | efc_get_wait_state (Efc *p_efc) |
Get flash wait state. | |
uint32_t | efc_init (Efc *p_efc, uint32_t ul_access_mode, uint32_t ul_fws) |
Initialize the EFC controller. | |
uint32_t | efc_perform_command (Efc *p_efc, uint32_t ul_command, uint32_t ul_argument) |
Perform the given command and wait until its completion (or an error). | |
uint32_t | efc_perform_fcr (Efc *p_efc, uint32_t ul_fcr) |
Perform command. | |
RAMFUNC uint32_t | efc_perform_read_sequence (Efc *p_efc, uint32_t ul_cmd_st, uint32_t ul_cmd_sp, uint32_t *p_ul_buf, uint32_t ul_size) |
Perform read sequence. Supported sequences are read Unique ID and read User Signature. | |
void | efc_set_flash_access_mode (Efc *p_efc, uint32_t ul_mode) |
Set flash access mode. | |
void | efc_set_wait_state (Efc *p_efc, uint32_t ul_fws) |
Set flash wait state. | |
void | efc_write_fmr (Efc *p_efc, uint32_t ul_fmr) |
Set mode register. |
Enhanced Embedded Flash Controller (EEFC) driver for SAM.
Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
Definition in file efc.cpp.