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00025 #include <stdio.h>
00026 #include <string.h>
00027 #include <math.h>
00028 #include <errno.h>
00029 #include <stdlib.h>
00030 #include <stdarg.h>
00031
00032 #ifdef _MSC_VER
00033 #define __LIBSUB_C__
00034 typedef unsigned char uint8_t;
00035 typedef unsigned short uint16_t;
00036 #endif
00037
00038 #ifdef LIBUSB_1_0
00039 #include <libusb-1.0/libusb.h>
00040 #else
00041 #include "../libusb/libusb-win32-src/src/usb.h"
00042 #endif
00043 #include "libsub.h"
00044 #include "subcfg.h"
00045 #include "sub_if.h"
00046
00047
00048 #if defined(_MSC_VER) && _MSC_VER > 800
00049 #define SHARED_MEM_NAME "SUB_SHARED_MEM"
00050 HANDLE hFileMapping=NULL;
00051 typedef struct
00052 {
00053 int sub_debug_level;
00054 }shared_mem_t;
00055 shared_mem_t *shared_mem=NULL;
00056 #endif
00057
00058
00059
00060
00061
00062
00063 typedef struct
00064 {
00065 unsigned char pack_sz;
00066 union
00067 {
00068 sub_tag_t tag;
00069 char pack_data[SUB_MAX_PACK_LONG-1];
00070 };
00071 }sub_pack;
00072
00073
00074 typedef struct
00075 {
00076 sub_handle handle;
00077 int version;
00078
00079
00080 #define SUB_FEATURE_SPI_SZ 0x00
00081 int spi_sz;
00082 }sub_dev_cache_entry;
00083
00084
00085
00086
00087
00088
00089 #define __VER__ 18
00090
00091 #define SUB_VID 0x04D8
00092 #define SUB_PID 0xFFC3
00093
00094 #define SUB_OUT_EP 0x01
00095 #define SUB_IN_EP 0x82
00096 #define SUB_FIFO_OUT_EP 0x03
00097 #define SUB_FIFO_IN_EP 0x84
00098
00099 #define SUB_F_CPU 16000000
00100
00101
00102
00103
00104
00105
00106
00107 #if !defined(_MSC_VER) || _MSC_VER == 800
00108 int sub_debug_level;
00109 #endif
00110
00111 int sub_errno;
00112 int sub_i2c_status;
00113
00114 #ifdef LIBUSB_1_0
00115 libusb_context* usb_context;
00116 static libusb_device** list;
00117 static int init_required=1;
00118 #endif
00119
00120 sub_dev_cache_entry sub_dev_cache[255];
00121
00122
00123
00124
00125
00126
00127
00128
00129
00130
00131
00132
00133
00134
00135 int sub_transaction( sub_handle hndl, sub_pack* outpk, sub_pack* inpk, int timeout );
00136
00137 void sub_trace( int level, char* format, ... );
00138 void hexdump_buf( int level, char* buf, int sz );
00139
00140
00141
00142
00143
00144
00145
00146
00147
00148 #define CTRL_REQ_TRANSFER_DIR_IN (1<<7)
00149 #define CTRL_REQ_TRANSFER_DIR_OUT 0
00150
00151 #define CTRL_REQ_TYPE_STANDARD (0<<5)
00152 #define CTRL_REQ_TYPE_CLASS (1<<5)
00153 #define CTRL_REQ_TYPE_VENDOR (2<<5)
00154
00155 #define CTRL_REQ_RCPT_DEVICE 0
00156 #define CTRL_REQ_RCPT_INTERFACE 1
00157 #define CTRL_REQ_RCPT_ENDPOINT 2
00158 #define CTRL_REQ_RCPT_OTHER 3
00159
00160
00161
00162
00163 #define BUF_2_INT(I,BUF) I=(BUF[3]<<24)+(BUF[2]<<16)+(BUF[1]<<8)+BUF[0]
00164 #define INT_2_BUF(I,BUF) BUF[0]=((char)I);BUF[1]=(char)((I)>>8);BUF[2]=(char)((I)>>16);BUF[3]=(char)((I)>>24)
00165 #define INT_2_LE16(I,LE16) \
00166 do { \
00167 ((char*)&LE16)[0]=(I); \
00168 ((char*)&LE16)[1]=(I)>>8; \
00169 } while(0)
00170
00171
00172
00173
00174
00175
00176
00177
00178
00179
00180 static int sub_dev_cache_lookup( sub_handle hndl )
00181 {
00182 int i;
00183 for( i=0; i<255; i++ )
00184 {
00185 if( sub_dev_cache[i].handle == hndl )
00186 return i;
00187 }
00188 return -1;
00189 }
00190
00191 static int sub_dev_cache_get_feature( sub_handle hndl, int feature, void* val )
00192 {
00193 int i;
00194 const struct sub_version* version;
00195
00196 i = sub_dev_cache_lookup( hndl );
00197 if( i == -1 )
00198 {
00199 sub_errno = SE_BAD_HNDL;
00200 return SE_BAD_HNDL;
00201 }
00202
00203 if( !sub_dev_cache[i].version )
00204 {
00205 version = sub_get_version( sub_dev_cache[i].handle );
00206 if( version->sub_device.major == 0xFF )
00207 return -1;
00208 sub_dev_cache[i].version =
00209 version->sub_device.major*100 +
00210 version->sub_device.minor*10 +
00211 version->sub_device.micro;
00212
00213 if( sub_dev_cache[i].version >= 24 )
00214 sub_dev_cache[i].spi_sz = SUB_MAX_SPI_RDWR_LONG;
00215 else
00216 sub_dev_cache[i].spi_sz = SUB_MAX_SPI_RDWR;
00217 }
00218
00219 switch( feature )
00220 {
00221 case SUB_FEATURE_SPI_SZ:
00222 *((int*)val) = sub_dev_cache[i].spi_sz;
00223 break;
00224
00225 default:
00226 return -1;
00227 }
00228
00229 return 0;
00230 }
00231
00232
00233
00234
00235
00236
00237
00238 sub_device sub_find_devices( sub_device first )
00239 {
00240 #ifdef LIBUSB_1_0
00241 static size_t dev_cnt;
00242 int i;
00243
00244 if( init_required )
00245 {
00246 if( libusb_init(&usb_context) )
00247 {
00248 sub_errno = SE_INIT;
00249 return 0;
00250 }
00251 init_required = 0;
00252 list = 0;
00253 }
00254
00255
00256 if( !first && list )
00257 {
00258 libusb_free_device_list( list, 1 );
00259 list = 0;
00260 }
00261
00262 if( !list )
00263 {
00264 first = 0;
00265 dev_cnt = libusb_get_device_list( usb_context, &list );
00266 if( dev_cnt < 0 )
00267 {
00268 list = 0;
00269 sub_errno = SE_OUT_OVF;
00270 return 0;
00271 }
00272 }
00273
00274 for( i=0; i<dev_cnt; i++ )
00275 {
00276 if( first )
00277 {
00278
00279 if( list[i] == first )
00280 first = 0;
00281 }
00282 else
00283 {
00284
00285 libusb_device* dev = list[i];
00286 struct libusb_device_descriptor descriptor;
00287 if( libusb_get_device_descriptor(dev,&descriptor) )
00288 {
00289 sub_errno =-1;
00290 return 0;
00291 }
00292 if((descriptor.idVendor==SUB_VID)&&(descriptor.idProduct==SUB_PID))
00293 return dev;
00294 }
00295 }
00296
00297
00298
00299
00300
00301
00302 libusb_free_device_list( list, 1 );
00303
00304 sub_errno = SE_NODEV;
00305 return 0;
00306
00307 #else
00308
00309 static int init_required=1;
00310
00311 struct usb_bus* bus=0;
00312 struct usb_device* dev=0,*rc_dev=0;
00313
00314 if( init_required )
00315 {
00316 usb_init();
00317 init_required = 0;
00318 }
00319
00320 if( !first )
00321 {
00322 usb_find_busses();
00323 usb_find_devices();
00324 bus = usb_get_busses();
00325 if( bus )
00326 dev = bus->devices;
00327 }
00328 else
00329 {
00330 bus=((struct usb_device*)first)->bus;
00331 dev=((struct usb_device*)first)->next;
00332 if(!dev)
00333 {
00334 bus=bus->next;
00335 }
00336 }
00337
00338 for( ; bus; bus=bus->next )
00339 {
00340 for( ; dev; dev=dev->next )
00341 {
00342 sub_trace( 4, "Device VID/PID: %04X/%04X\n",
00343 dev->descriptor.idVendor, dev->descriptor.idProduct );
00344 if( (dev->descriptor.idVendor == SUB_VID) &&
00345 (dev->descriptor.idProduct== SUB_PID) )
00346 {
00347 rc_dev = dev;
00348 dev=dev->next;
00349 return rc_dev;
00350 }
00351 }
00352 }
00353
00354 sub_errno = SE_NODEV;
00355
00356 return 0;
00357 #endif
00358 }
00359
00360
00361
00362
00363 sub_handle sub_open( sub_device dev )
00364 {
00365 int i;
00366
00367 #ifndef _MSC_VER
00368
00369 {
00370 char* level_env = getenv("SUB_DEBUG");
00371 if( level_env )
00372 sub_debug_level = atoi(level_env);
00373 }
00374 #endif
00375
00376 #ifdef LIBUSB_1_0
00377 libusb_device_handle* handle;
00378 int config;
00379
00380
00381 if( !dev )
00382 {
00383 if( init_required )
00384 {
00385 if( libusb_init(&usb_context) )
00386 {
00387 sub_errno = SE_INIT;
00388 return 0;
00389 }
00390 init_required = 0;
00391 list = 0;
00392 }
00393
00394 handle = libusb_open_device_with_vid_pid(usb_context,SUB_VID,SUB_PID);
00395 if( !handle )
00396 {
00397 sub_errno = SE_NODEV;
00398 return 0;
00399 }
00400 }
00401 else
00402 {
00403 if( libusb_open( dev, &handle ) )
00404 {
00405 sub_errno = SE_OPEN;
00406 return 0;
00407 }
00408 }
00409
00410
00411 if( libusb_get_configuration(handle, &config) )
00412 {
00413 sub_errno = SE_SETCONF;
00414 goto fin;
00415 }
00416 if( config!=1 )
00417 {
00418 if( libusb_set_configuration(handle,1) )
00419 {
00420 sub_errno = SE_SETCONF;
00421 goto fin;
00422 }
00423 }
00424
00425
00426 if( libusb_claim_interface(handle,0) )
00427 {
00428 sub_errno = SE_CLAIM;
00429 goto fin;
00430 }
00431
00432
00433 i = sub_dev_cache_lookup( 0 );
00434 sub_dev_cache[i].handle = handle;
00435
00436 return handle;
00437
00438 fin:
00439 libusb_close( handle );
00440 return 0;
00441
00442 #else
00443
00444 usb_dev_handle* handle;
00445
00446 if( !dev )
00447 {
00448 dev = sub_find_devices( 0 );
00449 if( !dev )
00450 return 0;
00451 }
00452 handle = usb_open( dev );
00453 if( !handle )
00454 {
00455 sub_errno = SE_OPEN;
00456 return 0;
00457 }
00458
00459 if( usb_set_configuration(handle,1) < 0 )
00460 {
00461 sub_errno = SE_SETCONF;
00462 goto fin;
00463 }
00464 if( usb_claim_interface(handle,0) < 0 )
00465 {
00466 sub_errno = SE_CLAIM;
00467 goto fin;
00468 }
00469
00470
00471 i = sub_dev_cache_lookup( 0 );
00472 sub_dev_cache[i].handle = handle;
00473
00474 return handle;
00475
00476 fin:
00477 usb_close( handle );
00478 return 0;
00479 #endif
00480 }
00481
00482
00483
00484
00485 int sub_close( sub_handle hndl )
00486 {
00487 int i;
00488
00489
00490 i = sub_dev_cache_lookup( hndl );
00491 if( i != -1 )
00492 memset( &sub_dev_cache[i], 0x00, sizeof(sub_dev_cache_entry) );
00493
00494 #ifdef LIBUSB_1_0
00495 libusb_close( hndl );
00496 return 0;
00497 #else
00498 return usb_close( hndl );
00499 #endif
00500 }
00501
00502
00503
00504
00505 int sub_get_mode( sub_handle hndl, int *mode )
00506 {
00507 int bc;
00508 uint8_t m;
00509 bc=sub_control_request(
00510 hndl,
00511 CTRL_REQ_TRANSFER_DIR_IN|CTRL_REQ_TYPE_VENDOR|CTRL_REQ_RCPT_DEVICE,
00512 SUB_VENDOR_REQUEST,
00513 0,
00514 SUB_WINDEX_MODE,
00515 (char*)&m,
00516 sizeof(m),
00517 10000 );
00518
00519 if( bc==1 )
00520 {
00521 *mode=m;
00522 }
00523 return bc>0?0:bc;
00524 }
00525
00526
00527
00528
00529
00530 const struct sub_version* sub_get_version( sub_handle hndl )
00531 {
00532 uint8_t rc;
00533 static struct sub_version sub_ver;
00534
00535 #ifdef LIBUSB_1_0
00536 sub_ver.dll.major = 1;
00537 sub_ver.dll.minor = 0;
00538 sub_ver.dll.micro = 0;
00539 #else
00540 const struct usb_version* usb_version;
00541 usb_version = usb_get_version();
00542 sub_ver.dll.major = usb_version->dll.major;
00543 sub_ver.dll.minor = usb_version->dll.minor;
00544 sub_ver.dll.micro = usb_version->dll.micro;
00545 sub_ver.driver.major = usb_version->driver.major;
00546 sub_ver.driver.minor = usb_version->driver.minor;
00547 sub_ver.driver.micro = usb_version->driver.micro;
00548 sub_ver.driver.nano = usb_version->driver.nano;
00549 #endif
00550 sub_ver.dll.nano = __VER__;
00551
00552 if(hndl)
00553 {
00554 struct get_version_resp_st ver;
00555
00556 rc=sub_control_request(
00557 hndl,
00558 CTRL_REQ_TRANSFER_DIR_IN|CTRL_REQ_TYPE_VENDOR|CTRL_REQ_RCPT_DEVICE,
00559 SUB_VENDOR_REQUEST,
00560 0,
00561 SUB_WINDEX_VER,
00562 (char*)&ver,
00563 sizeof(ver),
00564 10000 );
00565 if( rc == sizeof(ver) )
00566 {
00567 sub_ver.sub_device.micro = ver.micro;
00568 sub_ver.sub_device.minor = ver.minor;
00569 sub_ver.sub_device.major = ver.major;
00570 sub_ver.sub_device.boot = ver.boot;
00571 goto fin;
00572 }
00573 }
00574
00575
00576 memset( &sub_ver.sub_device, 0xFF, sizeof(sub_ver.sub_device) ) ;
00577
00578 fin:
00579 return &sub_ver;
00580 }
00581
00582 const struct sub_cfg_vpd* sub_get_cfg_vpd( sub_handle hndl )
00583 {
00584 uint8_t rc;
00585 static struct sub_cfg_vpd cfg_vpd;
00586 sub_vpd_t vpd;
00587
00588 rc=sub_control_request(
00589 hndl,
00590 CTRL_REQ_TRANSFER_DIR_IN|CTRL_REQ_TYPE_VENDOR|CTRL_REQ_RCPT_DEVICE,
00591 SUB_VENDOR_REQUEST,
00592 0,
00593 SUB_WINDEX_CFG_VPD,
00594 (char*)&vpd,
00595 sizeof(vpd),
00596 10000 );
00597
00598 if( rc == sizeof(vpd) )
00599 {
00600 cfg_vpd.lcd_w = vpd.lcd_w;
00601 cfg_vpd.lcd_h = vpd.lcd_h;
00602 cfg_vpd.serial = vpd.serial;
00603 cfg_vpd.buttons = vpd.buttons;
00604 cfg_vpd.ir_car = vpd.ir_car;
00605 }
00606 else
00607 return 0;
00608
00609 return &cfg_vpd;
00610 }
00611
00612
00613
00614
00615
00616
00617 int sub_i2c_freq( sub_handle hndl, sub_int32_t* freq )
00618 {
00619 int rc;
00620 sub_pack outpk,inpk;
00621 unsigned int TWBR,TWPS;
00622
00623
00624
00625
00626
00627 if( *freq )
00628 {
00629 if( *freq > SUB_F_CPU/(16+2*10) )
00630 return SE_PARAM;
00631
00632 TWPS = 0;
00633 TWBR = (SUB_F_CPU/(*freq)-16)/2;
00634 if( TWBR > 0xFF )
00635 {
00636 TWPS = 1;
00637 TWBR = (SUB_F_CPU/(*freq)-16)/(2*4);
00638 if( TWBR > 0xFF )
00639 {
00640 TWPS = 2;
00641 TWBR = (SUB_F_CPU/(*freq)-16)/(2*16);
00642 if( TWBR > 0xFF )
00643 {
00644 TWPS = 3;
00645 TWBR = (SUB_F_CPU/(*freq)-16)/(2*64);
00646 if( TWBR > 0xFF )
00647 return SE_PARAM;
00648 }
00649 }
00650 }
00651 outpk.tag.size = sizeof(struct i2c_baud_req_st);
00652 outpk.tag.i2c_baud_req.twi_TWBR = TWBR;
00653 outpk.tag.i2c_baud_req.twi_TWPS = TWPS;
00654 }
00655 else
00656 {
00657 outpk.tag.size = 0;
00658 }
00659
00660 outpk.tag.code = SUB_I2C_FREQ;
00661 inpk.tag.size = 2;
00662 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00663 if( !rc )
00664 {
00665 TWBR = inpk.tag.i2c_baud_resp.twi_TWBR;
00666 TWPS = inpk.tag.i2c_baud_resp.twi_TWPS & 0x03;
00667 *freq = (sub_int32_t) (SUB_F_CPU/( 16 + 2*TWBR * pow(4,TWPS) ));
00668 }
00669 return rc;
00670 }
00671
00672 int sub_i2c_config( sub_handle hndl, int sa, int flags )
00673 {
00674 int rc;
00675 sub_pack outpk,inpk;
00676
00677 outpk.tag.code = SUB_I2C_CONFIG;
00678 outpk.tag.size = sizeof(struct i2c_config_req_st);
00679 outpk.tag.i2c_config_req.sa = sa;
00680 outpk.tag.i2c_config_req.flags = flags;
00681
00682 inpk.tag.size = sizeof(struct i2c_config_req_st);
00683 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00684 return rc;
00685 }
00686
00687 int sub_i2c_start( sub_handle hndl )
00688 {
00689 int rc;
00690 sub_pack outpk,inpk;
00691
00692 outpk.tag.code = SUB_I2C_START;
00693 outpk.tag.size = sizeof(struct i2c_start_req_st);
00694 outpk.tag.i2c_start_req.restart = 0;
00695
00696 inpk.tag.size = sizeof(struct i2c_start_resp_st);
00697 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00698 if( !rc )
00699 {
00700 sub_i2c_status = inpk.tag.i2c_start_resp.status;
00701 if( sub_i2c_status )
00702 rc = SE_I2C;
00703 }
00704 return rc;
00705 }
00706
00707
00708 int sub_i2c_stop( sub_handle hndl )
00709 {
00710 int rc;
00711 sub_pack outpk,inpk;
00712
00713 outpk.tag.code = SUB_I2C_STOP;
00714 outpk.tag.size = 0;
00715
00716 inpk.tag.size = sizeof(struct i2c_stop_resp_st);
00717 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00718 if( !rc )
00719 {
00720 sub_i2c_status = inpk.tag.i2c_stop_resp.status;
00721 if( sub_i2c_status )
00722 rc = SE_I2C;
00723 }
00724 return rc;
00725 }
00726
00727 int sub_i2c_scan( sub_handle hndl, int* slave_cnt, char* slave_buf )
00728 {
00729 int rc;
00730 sub_pack outpk,inpk;
00731
00732 outpk.tag.code = SUB_I2C_SCAN;
00733 outpk.tag.size = 0;
00734
00735 inpk.tag.size = 0;
00736 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00737 if( !rc )
00738 {
00739 *slave_cnt = inpk.tag.i2c_scan_resp.slave_n;
00740 memcpy( slave_buf, inpk.tag.i2c_scan_resp.slave_buf, *slave_cnt );
00741 }
00742 return rc;
00743 }
00744
00745
00746
00747
00748 static void ma_copy( uint8_t* ma_buf, sub_int32_t ma, int ma_sz )
00749 {
00750 int i;
00751
00752 for( i=ma_sz; i>0; i-- )
00753 {
00754 ma_buf[i-1] = ma & 0xFF;
00755 ma >>= 8;
00756 }
00757 }
00758
00759 int sub_i2c_read( sub_handle hndl, int sa, sub_int32_t ma, int ma_sz,
00760 char* buf, int sz )
00761 {
00762 int rc=0;
00763 sub_pack outpk,inpk;
00764 int read=0, read_sz;
00765
00766 if( sz <= 0 )
00767 return SE_PARAM;
00768
00769 while( (read < sz) && !rc )
00770 {
00771 read_sz = sz - read;
00772 if( read_sz > SUB_MAX_I2C_READ )
00773 {
00774 read_sz = SUB_MAX_I2C_READ;
00775 outpk.tag.i2c_rdwr_req.flags = __GENF_NOSTOP;
00776 }
00777 else
00778 outpk.tag.i2c_rdwr_req.flags = 0;
00779
00780 if( read == 0 )
00781 {
00782 outpk.tag.size = (int)sizeof(struct i2c_rdwr_req_st)+ma_sz;
00783 outpk.tag.i2c_rdwr_req.ma_sz = ma_sz;
00784 ma_copy( outpk.tag.i2c_rdwr_req.ma, ma, ma_sz );
00785 }
00786 else
00787 {
00788 outpk.tag.size = (int)sizeof(struct i2c_rdwr_req_st);
00789 outpk.tag.i2c_rdwr_req.ma_sz = 0;
00790 outpk.tag.i2c_rdwr_req.flags |= __GENF_NOSLA;
00791 }
00792 outpk.tag.code = SUB_I2C_RDWR;
00793 outpk.tag.i2c_rdwr_req.sa = (sa<<1)|0x01;
00794 outpk.tag.i2c_rdwr_req.sz = read_sz;
00795
00796 inpk.tag.size = (uint8_t)sizeof(struct i2c_rdwr_resp_st)+read_sz;
00797 inpk.tag.i2c_rdwr_resp.status = 0;
00798
00799 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00800 sub_i2c_status = inpk.tag.i2c_rdwr_resp.status;
00801
00802 if( !rc )
00803 {
00804 if( sub_i2c_status )
00805 {
00806 rc = SE_I2C;
00807 sub_errno = rc;
00808 }
00809 else
00810 {
00811 memcpy( buf+read, inpk.tag.i2c_rdwr_resp.data, read_sz );
00812 read += read_sz;
00813 }
00814 }
00815 else
00816 {
00817 if( (rc==SE_BULKIN_SZ) && sub_i2c_status )
00818 {
00819 rc = SE_I2C;
00820 sub_errno = rc;
00821 }
00822 }
00823 }
00824 return rc;
00825 }
00826
00827 int sub_i2c_write( sub_handle hndl, int sa, sub_int32_t ma, int ma_sz,
00828 char* buf, int sz )
00829 {
00830 int rc=0;
00831 sub_pack outpk,inpk;
00832 int written=0, write_sz;
00833
00834 if( sz <= 0 )
00835 return SE_PARAM;
00836
00837 while( (written < sz) && !rc )
00838 {
00839 write_sz = sz - written;
00840 if( write_sz > (int)(SUB_MAX_I2C_WRITE-ma_sz) )
00841 {
00842 write_sz = SUB_MAX_I2C_WRITE-ma_sz;
00843 outpk.tag.i2c_rdwr_req.flags = __GENF_NOSTOP;
00844 }
00845 else
00846 outpk.tag.i2c_rdwr_req.flags = 0;
00847
00848 if( written == 0 )
00849 {
00850 outpk.tag.size = (int)sizeof(struct i2c_rdwr_req_st)+ma_sz+write_sz;
00851 outpk.tag.i2c_rdwr_req.ma_sz = ma_sz;
00852 ma_copy( outpk.tag.i2c_rdwr_req.ma, ma, ma_sz );
00853 }
00854 else
00855 {
00856 outpk.tag.size = (int)sizeof(struct i2c_rdwr_req_st)+write_sz;
00857 outpk.tag.i2c_rdwr_req.ma_sz = 0;
00858 outpk.tag.i2c_rdwr_req.flags |= __GENF_NOSLA;
00859 }
00860 memcpy( outpk.tag.i2c_rdwr_req.ma+ma_sz, buf+written, write_sz );
00861 outpk.tag.code = SUB_I2C_RDWR;
00862 outpk.tag.i2c_rdwr_req.sa = sa<<1;
00863 outpk.tag.i2c_rdwr_req.sz = write_sz;
00864 ma_sz=0;
00865
00866 inpk.tag.size = sizeof(struct i2c_rdwr_resp_st);
00867 inpk.tag.i2c_rdwr_resp.status = 0;
00868
00869 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00870 sub_i2c_status = inpk.tag.i2c_rdwr_resp.status;
00871
00872 if( !rc )
00873 {
00874 if( sub_i2c_status )
00875 {
00876 rc = SE_I2C;
00877 sub_errno = rc;
00878 }
00879 else
00880 written += write_sz;
00881 }
00882 }
00883 return rc;
00884 }
00885
00886
00887
00888
00889
00890
00891 int sub_spi_config( sub_handle hndl, int cfg_set, int* cfg_get )
00892 {
00893 int rc;
00894 sub_pack outpk,inpk;
00895
00896 outpk.tag.code = SUB_SPI_CONFIG;
00897 if( cfg_get )
00898 outpk.tag.size = 0;
00899 else
00900 {
00901 outpk.tag.size = sizeof(struct spi_config_req_st);
00902 outpk.tag.spi_config_req.spi_SPCR = cfg_set;
00903 }
00904
00905 inpk.tag.size = sizeof(struct spi_config_resp_st);
00906 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
00907 if( !rc )
00908 {
00909 if( cfg_get )
00910 *cfg_get = inpk.tag.spi_config_resp.spi_SPCR;
00911 }
00912 return rc;
00913 }
00914
00915 int sub_spi_transfer( sub_handle hndl, char* out_buf, char* in_buf, int sz, int ss_config )
00916 {
00917 int rc=0;
00918 sub_pack outpk,inpk;
00919 int tr_done=0, tr_sz, tr_ss=ss_config, max_tr_sz;
00920
00921 rc = sub_dev_cache_get_feature( hndl, SUB_FEATURE_SPI_SZ, &max_tr_sz );
00922 if( rc )
00923 return rc;
00924
00925 while( (tr_done < sz) && !rc )
00926 {
00927 if( tr_done == 0 )
00928 {
00929
00930 switch( ss_config & 0x0F )
00931 {
00932 case SS_HI:
00933 tr_ss = (tr_ss & 0xF0)|SS_H;
00934 break;
00935 case SS_LO:
00936 tr_ss = (tr_ss & 0xF0)|SS_L;
00937 break;
00938 }
00939 }
00940
00941 tr_sz = sz - tr_done;
00942 if( tr_sz > max_tr_sz )
00943 {
00944
00945 tr_sz = max_tr_sz;
00946 }
00947 else
00948 {
00949
00950 switch( ss_config & 0x0F )
00951 {
00952 case SS_HI:
00953 tr_ss = (tr_ss & 0xF0)|SS_HI;
00954 break;
00955 case SS_LO:
00956 tr_ss = (tr_ss & 0xF0)|SS_LO;
00957 }
00958 }
00959
00960 if( in_buf && !out_buf )
00961 {
00962
00963 outpk.tag.code = SUB_SPI_READ;
00964 outpk.tag.size = sizeof(struct spi_rdwr_req_st);
00965 outpk.tag.spi_rdwr_req.SS_config = tr_ss;
00966 outpk.tag.spi_rdwr_req.sz = tr_sz;
00967 inpk.tag.size = (uint8_t)sizeof(struct spi_rdwr_resp_st)+tr_sz;
00968 }
00969 else if( out_buf && !in_buf )
00970 {
00971
00972 outpk.tag.code = SUB_SPI_WRITE;
00973 outpk.tag.size = (uint8_t)sizeof(struct spi_rdwr_req_st)+tr_sz;
00974 outpk.tag.spi_rdwr_req.SS_config = tr_ss;
00975 outpk.tag.spi_rdwr_req.sz = tr_sz;
00976 memcpy( outpk.tag.spi_rdwr_req.data, out_buf+tr_done, tr_sz );
00977 inpk.tag.size = sizeof(struct spi_rdwr_resp_st);
00978 }
00979 else if( out_buf && in_buf )
00980 {
00981
00982 outpk.tag.code = SUB_SPI_RDWR;
00983 outpk.tag.size = (uint8_t)sizeof(struct spi_rdwr_req_st)+tr_sz;
00984 outpk.tag.spi_rdwr_req.SS_config = tr_ss;
00985 outpk.tag.spi_rdwr_req.sz = tr_sz;
00986 memcpy( outpk.tag.spi_rdwr_req.data, out_buf+tr_done, tr_sz );
00987 inpk.tag.size = (uint8_t)sizeof(struct spi_rdwr_resp_st)+tr_sz;
00988 }
00989 else
00990 return SE_PARAM;
00991
00992 rc = sub_transaction(hndl, &outpk, &inpk, 10000);
00993 if( !rc )
00994 {
00995 if( in_buf )
00996 memcpy( in_buf+tr_done, inpk.tag.spi_rdwr_resp.data, tr_sz );
00997 tr_done += tr_sz;
00998 tr_ss &= 0xF0;
00999 }
01000 if( (rc==SE_BULKIN_SZ) && (inpk.tag.spi_rdwr_resp.sz==0xFF) )
01001 {
01002 rc = SE_SPI_DIS;
01003 sub_errno = SE_SPI_DIS;
01004 }
01005 }
01006 return rc;
01007 }
01008
01009 int sub_sdio_transfer( sub_handle hndl, char* out_buf, char* in_buf,
01010 int out_sz, int in_sz, int ss_config )
01011 {
01012 int rc=0;
01013 sub_pack outpk,inpk;
01014
01015 if( (in_sz>SUB_MAX_SPI_SDIO_RDWR) || (out_sz>SUB_MAX_SPI_SDIO_RDWR) )
01016 {
01017 sub_errno = SE_PARAM;
01018 return SE_PARAM;
01019 }
01020
01021 outpk.tag.code = SUB_SPI_SDIO_RDWR;
01022 outpk.tag.size = (uint8_t)sizeof(struct spi_sdio_rdwr_req_st)+out_sz;
01023 outpk.tag.spi_sdio_rdwr_req.SS_config = ss_config;
01024 outpk.tag.spi_sdio_rdwr_req.out_sz = out_sz;
01025 outpk.tag.spi_sdio_rdwr_req.in_sz = in_sz;
01026 memcpy( outpk.tag.spi_sdio_rdwr_req.data, out_buf, out_sz );
01027
01028 inpk.tag.size = (uint8_t)sizeof(struct spi_sdio_rdwr_resp_st)+in_sz;
01029 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01030 if( !rc )
01031 memcpy( in_buf, inpk.tag.spi_sdio_rdwr_resp.data, in_sz );
01032
01033 return rc;
01034 }
01035
01036
01037
01038
01039
01040
01041 int sub_mdio22( sub_handle hndl, int op, int phyad, int regad, int data, int* content )
01042 {
01043 int rc;
01044 union sub_mdio_frame frame;
01045
01046 frame.clause22.op = op|SUB_MDIO22;
01047 frame.clause22.phyad = phyad;
01048 frame.clause22.regad = regad;
01049 frame.clause22.data = data;
01050
01051 rc = sub_mdio_xfer( hndl, 1, &frame );
01052 if( !rc && content )
01053 *content = frame.clause22.data;
01054 return rc;
01055 }
01056
01057 int sub_mdio45( sub_handle hndl, int op, int prtad, int devad, int data, int* content )
01058 {
01059 int rc;
01060 union sub_mdio_frame frame;
01061
01062 frame.clause45.op = op;
01063 frame.clause45.prtad = prtad;
01064 frame.clause45.devad = devad;
01065 frame.clause45.data = data;
01066
01067 rc = sub_mdio_xfer( hndl, 1, &frame );
01068 if( !rc && content )
01069 *content = frame.clause45.data;
01070 return rc;
01071 }
01072
01073 int sub_mdio_xfer_ex( sub_handle hndl, int channel, int count,
01074 union sub_mdio_frame* mdios )
01075 {
01076 int i;
01077 int rc;
01078
01079
01080 for( i=0; i<count; i++ )
01081 {
01082 mdios[i].clause45.devad &= 0x1F;
01083 mdios[i].clause45.devad |= (channel & 0x03)<<5;
01084 }
01085
01086 rc = sub_mdio_xfer(hndl, count, mdios);
01087
01088
01089 for( i=0; i<count; i++ )
01090 {
01091 mdios[i].clause45.devad &= 0x1F;
01092 }
01093 return rc;
01094 }
01095
01096 int sub_mdio_xfer( sub_handle hndl, int count, union sub_mdio_frame* mdios )
01097 {
01098 int rc;
01099 sub_pack outpk,inpk;
01100 int i;
01101
01102 if( count > (int) SUB_MAX_MDIO_XFER )
01103 {
01104 sub_errno = SE_PARAM;
01105 return SE_PARAM;
01106 }
01107
01108 outpk.tag.code = SUB_MDIO_XFER;
01109 outpk.tag.size = (uint8_t) sizeof(struct mdio_xfer_st)*count +1;
01110 outpk.tag.mdio_xfer_req.n = count;
01111
01112 for( i=0; i<count; i++ )
01113 {
01114 outpk.tag.mdio_xfer_req.xfer[i].op_prtad =
01115 mdios[i].clause45.prtad & 0x1F;
01116 outpk.tag.mdio_xfer_req.xfer[i].op_prtad|=
01117 (mdios[i].clause45.op & 0x03) << 5;
01118 outpk.tag.mdio_xfer_req.xfer[i].op_prtad|=
01119 (mdios[i].clause45.op & 0x80);
01120 outpk.tag.mdio_xfer_req.xfer[i].devad = mdios[i].clause45.devad;
01121 outpk.tag.mdio_xfer_req.xfer[i].data_lo =
01122 mdios[i].clause45.data & 0xFF;
01123 outpk.tag.mdio_xfer_req.xfer[i].data_hi =
01124 (mdios[i].clause45.data>>8) & 0xFF;
01125 }
01126
01127 inpk.tag.size = outpk.tag.size;
01128 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01129 if( !rc )
01130 {
01131 for( i=0; i<count; i++ )
01132 {
01133 if( mdios[i].clause45.op & 0x02 )
01134 {
01135
01136 mdios[i].clause45.data =
01137 inpk.tag.mdio_xfer_req.xfer[i].data_lo +
01138 (inpk.tag.mdio_xfer_req.xfer[i].data_hi<<8);
01139 }
01140 }
01141 }
01142 return rc;
01143 }
01144
01145
01146
01147
01148
01149
01150
01151 int sub_gpio_config( sub_handle hndl, sub_int32_t set, sub_int32_t* get, sub_int32_t mask )
01152 {
01153 int rc;
01154 sub_pack outpk,inpk;
01155
01156 outpk.tag.code = SUB_GPIO_CONFIG;
01157 outpk.tag.size = sizeof(struct gpio_req_st);
01158 INT_2_BUF( set, outpk.tag.gpio_req.val );
01159 INT_2_BUF( mask,outpk.tag.gpio_req.mask);
01160
01161 inpk.tag.size = sizeof(struct gpio_resp_st);
01162 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01163 if( !rc )
01164 BUF_2_INT( *get, inpk.tag.gpio_resp.val );
01165 return rc;
01166 }
01167
01168 int sub_gpio_read( sub_handle hndl, sub_int32_t* get )
01169 {
01170 int rc;
01171 sub_pack outpk,inpk;
01172
01173 outpk.tag.code = SUB_GPIO_READ;
01174 outpk.tag.size = 0;
01175
01176 inpk.tag.size = sizeof(struct gpio_resp_st);
01177 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01178 if( !rc )
01179 BUF_2_INT( *get, inpk.tag.gpio_resp.val );
01180 return rc;
01181 }
01182
01183 int sub_gpio_write( sub_handle hndl, sub_int32_t set, sub_int32_t* get, sub_int32_t mask )
01184 {
01185 int rc;
01186 sub_pack outpk,inpk;
01187
01188 outpk.tag.code = SUB_GPIO_WRITE;
01189 outpk.tag.size = sizeof(struct gpio_req_st);
01190 INT_2_BUF( set, outpk.tag.gpio_req.val );
01191 INT_2_BUF( mask,outpk.tag.gpio_req.mask);
01192
01193 inpk.tag.size = sizeof(struct gpio_resp_st);
01194 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01195 if( !rc )
01196 BUF_2_INT( *get, inpk.tag.gpio_resp.val );
01197 return rc;
01198 }
01199
01200
01201
01202
01203
01204
01205 int sub_gpiob_config( sub_handle hndl, sub_int32_t set, sub_int32_t* get, sub_int32_t mask )
01206 {
01207 int rc;
01208 sub_pack outpk,inpk;
01209
01210 outpk.tag.code = SUB_GPIOB_CONFIG;
01211 outpk.tag.size = sizeof(struct gpiob_req_st);
01212 outpk.tag.gpiob_req.val = set;
01213 outpk.tag.gpiob_req.mask = mask;
01214
01215 inpk.tag.size = sizeof(struct gpiob_resp_st);
01216 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01217 if( !rc )
01218 *get = inpk.tag.gpiob_resp.val;
01219 return rc;
01220 }
01221
01222 int sub_gpiob_read( sub_handle hndl, sub_int32_t* get )
01223 {
01224 int rc;
01225 sub_pack outpk,inpk;
01226
01227 outpk.tag.code = SUB_GPIOB_READ;
01228 outpk.tag.size = 0;
01229
01230 inpk.tag.size = sizeof(struct gpiob_resp_st);
01231 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01232 if( !rc )
01233 *get = inpk.tag.gpiob_resp.val;
01234 return rc;
01235 }
01236
01237 int sub_gpiob_write( sub_handle hndl, sub_int32_t set, sub_int32_t* get, sub_int32_t mask )
01238 {
01239 int rc;
01240 sub_pack outpk,inpk;
01241
01242 outpk.tag.code = SUB_GPIOB_WRITE;
01243 outpk.tag.size = sizeof(struct gpiob_req_st);
01244 outpk.tag.gpiob_req.val = set;
01245 outpk.tag.gpiob_req.mask = mask;
01246
01247 inpk.tag.size = sizeof(struct gpiob_resp_st);
01248 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01249 if( !rc )
01250 *get = inpk.tag.gpiob_resp.val;
01251 return rc;
01252 }
01253
01254
01255
01256
01257
01258
01259 int sub_fpwm_config( sub_handle hndl, double freq_hz, int flags )
01260 {
01261 int rc;
01262 sub_pack outpk,inpk;
01263 double ICR;
01264 int presc;
01265
01266 outpk.tag.code = SUB_FAST_PWM_CONFIG;
01267 outpk.tag.size = sizeof(struct fast_pwm_config_req_st);
01268
01269 if( flags & FPWM_ENABLE )
01270 {
01271 if( freq_hz > SUB_F_CPU/2 )
01272 return SE_PARAM;
01273 if( freq_hz > SUB_F_CPU/0xFFFF )
01274 {
01275 ICR = SUB_F_CPU/freq_hz;
01276 presc = 0x01;
01277 }
01278 else if( freq_hz > (double)SUB_F_CPU/8/0xFFFF )
01279 {
01280 ICR = SUB_F_CPU/8/freq_hz;
01281 presc = 0x02;
01282 }
01283 else if( freq_hz > (double)SUB_F_CPU/64/0xFFFF )
01284 {
01285 ICR = SUB_F_CPU/64/freq_hz;
01286 presc = 0x03;
01287 }
01288 else if( freq_hz > (double)SUB_F_CPU/256/0xFFFF )
01289 {
01290 ICR = SUB_F_CPU/256/freq_hz;
01291 presc = 0x04;
01292 }
01293 else if( freq_hz > (double)SUB_F_CPU/1024/0xFFFF )
01294 {
01295 ICR = SUB_F_CPU/1024/freq_hz;
01296 presc = 0x05;
01297 }
01298 else
01299 {
01300 sub_errno = SE_PARAM;
01301 return SE_PARAM;
01302 }
01303
01304 outpk.tag.fast_pwm_config_req.TCCRA = (flags>>8)|0x02;
01305 outpk.tag.fast_pwm_config_req.TCCRB = presc|0x18;
01306 outpk.tag.fast_pwm_config_req.TCCRC = 0;
01307 outpk.tag.fast_pwm_config_req.ICRL = (int)ICR;
01308 outpk.tag.fast_pwm_config_req.ICRH = ((int)ICR)>>8;
01309 }
01310 else
01311 outpk.tag.fast_pwm_config_req.TCCRB = 0;
01312
01313 inpk.tag.size = sizeof(struct fast_pwm_config_req_st);
01314 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01315
01316 return rc;
01317 }
01318
01319 int sub_fpwm_set( sub_handle hndl, int pwm_n, double duty )
01320 {
01321 int rc;
01322 sub_pack outpk,inpk;
01323 int duty16;
01324
01325 if( (pwm_n < 0) || (pwm_n > 2) )
01326 return SE_PARAM;
01327 if( (duty < 0) || (duty > 100) )
01328 return SE_PARAM;
01329
01330 outpk.tag.code = SUB_FAST_PWM_SET;
01331 outpk.tag.size = sizeof(struct fast_pwm_set_req_st);
01332 outpk.tag.fast_pwm_set_req.pwm_n = pwm_n;
01333
01334 duty16 = (int)((0xFFFF*duty)/100);
01335 outpk.tag.fast_pwm_set_req.duty_lo = duty16 & 0xFF;
01336 outpk.tag.fast_pwm_set_req.duty_hi = duty16 >> 8;
01337
01338 inpk.tag.size = sizeof(struct fast_pwm_set_req_st);
01339 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01340
01341 return rc;
01342 }
01343
01344
01345
01346
01347
01348
01349 int sub_pwm_config( sub_handle hndl, int res_us, int limit )
01350 {
01351 int rc;
01352 sub_pack outpk,inpk;
01353
01354 outpk.tag.code = SUB_PWM_CONFIG;
01355 outpk.tag.size = sizeof(struct pwm_config_req_st);
01356
01357 outpk.tag.pwm_config_req.TCCRA = 0x02;
01358 if( limit == 0 )
01359 outpk.tag.pwm_config_req.TCCRB = 0;
01360 else
01361 {
01362 int prescaller;
01363 if( (res_us < 20) || (limit > 0xFF) )
01364 {
01365 sub_errno = SE_PARAM;
01366 return SE_PARAM;
01367 }
01368
01369
01370 if( res_us <= (256L*1000000L/SUB_F_CPU) )
01371 {
01372 outpk.tag.pwm_config_req.TCCRB = 0x01;
01373 prescaller = 1;
01374 }
01375 else if( res_us <= (256L*1000000L/SUB_F_CPU*8) )
01376 {
01377 outpk.tag.pwm_config_req.TCCRB = 0x02;
01378 prescaller = 8;
01379 }
01380 else if( res_us <= (256L*1000000L/SUB_F_CPU*64) )
01381 {
01382 outpk.tag.pwm_config_req.TCCRB = 0x03;
01383 prescaller = 64;
01384 }
01385 else if( res_us <= (256L*1000000L/SUB_F_CPU*256) )
01386 {
01387 outpk.tag.pwm_config_req.TCCRB = 0x04;
01388 prescaller = 256;
01389 }
01390 else if( res_us <= (256L*1000000L/SUB_F_CPU*1024) )
01391 {
01392 outpk.tag.pwm_config_req.TCCRB = 0x05;
01393 prescaller = 1024;
01394 }
01395 else
01396 {
01397 sub_errno = SE_PARAM;
01398 return SE_PARAM;
01399 }
01400
01401 outpk.tag.pwm_config_req.OCRA = (uint8_t) (res_us*(SUB_F_CPU/1000000L)/prescaller);
01402 outpk.tag.pwm_config_req.limit = limit;
01403 }
01404
01405 inpk.tag.size = sizeof(struct pwm_config_req_st);
01406 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01407 return rc;
01408 }
01409
01410 int sub_pwm_set( sub_handle hndl, int pwm_n, int duty )
01411 {
01412 int rc;
01413 sub_pack outpk,inpk;
01414
01415 if( (pwm_n < 0) || (pwm_n > 7) )
01416 {
01417 sub_errno = SE_PARAM;
01418 return SE_PARAM;
01419 }
01420 if( (duty < 0) || (duty > 0xFF) )
01421 {
01422 sub_errno = SE_PARAM;
01423 return SE_PARAM;
01424 }
01425
01426 outpk.tag.code = SUB_PWM_SET;
01427 outpk.tag.size = sizeof(struct pwm_set_req_st);
01428 outpk.tag.pwm_set_req.pwm_n = pwm_n;
01429 outpk.tag.pwm_set_req.duty = duty;
01430
01431 inpk.tag.size = sizeof(struct pwm_set_req_st);
01432 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01433 return rc;
01434 }
01435
01436
01437
01438
01439
01440
01441
01442 int sub_adc_config( sub_handle hndl, int flags )
01443 {
01444 int rc;
01445 sub_pack outpk,inpk;
01446
01447 outpk.tag.code = SUB_ADC_CONFIG;
01448 outpk.tag.size = sizeof(struct adc_config_req_st);
01449 outpk.tag.adc_config_req.admux = flags;
01450 outpk.tag.adc_config_req.adcsra = flags>>8;
01451
01452 inpk.tag.size = sizeof(struct adc_config_req_st);
01453 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01454 return rc;
01455 }
01456
01457 int sub_adc_single( sub_handle hndl, int* data, int mux )
01458 {
01459 return sub_adc_read( hndl, data, &mux, 1 );
01460 }
01461 int sub_adc_read( sub_handle hndl, int* data, int* mux, int reads )
01462 {
01463 int rc,i;
01464 sub_pack outpk,inpk;
01465
01466 if( reads > MAX_ADC_READS )
01467 return SE_PARAM;
01468
01469 outpk.tag.code = SUB_ADC_READ;
01470 outpk.tag.size = (uint8_t)sizeof(struct adc_read_req_st) + reads;
01471 outpk.tag.adc_read_req.reads = reads;
01472 for( i=0; i<reads; i++ )
01473 outpk.tag.adc_read_req.mux[i] = mux[i];
01474
01475 inpk.tag.size = (uint8_t)sizeof(struct adc_read_resp_st) + reads*2;
01476 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01477
01478 if( !rc )
01479 {
01480 for( i=0; i<reads; i++ )
01481 {
01482 data[i] = inpk.tag.adc_read_resp.adc_lh[i*2] +
01483 (inpk.tag.adc_read_resp.adc_lh[i*2+1]<<8);
01484
01485 if( (mux[i]>ADC_S7) && (mux[i]<=ADC_D52) && (data[i]&0x200) )
01486 data[i] = data[i]|((-1)<<10);
01487 }
01488 }
01489 return rc;
01490 }
01491
01492
01493
01494
01495
01496
01497
01498 int sub_lcd_write( sub_handle hndl, char* str )
01499 {
01500 int rc;
01501 sub_pack outpk,inpk;
01502
01503 outpk.tag.code = SUB_LCD_WRITE;
01504 strncpy( outpk.tag.LCD_write_req.str, str, SUB_MAX_LCD_STR );
01505 outpk.tag.size = (uint8_t)strlen(outpk.tag.LCD_write_req.str)+1;
01506
01507 inpk.tag.size = 1;
01508 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01509
01510 switch( inpk.tag.LCD_write_resp.status )
01511 {
01512 case __LCD_NOT_SUPPORTED:
01513 rc = SE_NSUPPORTED;
01514 break;
01515 }
01516 return rc;
01517 }
01518
01519
01520
01521
01522
01523
01524 int sub_rs_set_config( sub_handle hndl, int config, sub_int32_t baud )
01525 {
01526 int rc;
01527 sub_pack outpk,inpk;
01528 int ubrr;
01529
01530 outpk.tag.code = SUB_RS_CONFIG;
01531 outpk.tag.size = sizeof(struct RS_config_req_st);
01532 outpk.tag.RS_config_req.UCSRC = config;
01533
01534
01535 if( baud <= 0 )
01536 return SE_PARAM;
01537
01538 ubrr = SUB_F_CPU/(8*baud)-1;
01539 ubrr |= 0x8000;
01540
01541 outpk.tag.RS_config_req.UBRRL = ubrr;
01542 outpk.tag.RS_config_req.UBRRH = ubrr>>8;
01543
01544 inpk.tag.size = 3;
01545 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01546
01547 return rc;
01548 }
01549
01550 int sub_rs_get_config( sub_handle hndl, int* config, sub_int32_t* baud )
01551 {
01552 int rc;
01553 sub_pack outpk,inpk;
01554 int ubrr;
01555
01556 outpk.tag.code = SUB_RS_CONFIG;
01557 outpk.tag.size = 0;
01558
01559 inpk.tag.size = 3;
01560 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01561 if( !rc )
01562 {
01563 *config = inpk.tag.RS_config_resp.UCSRC;
01564 ubrr = (inpk.tag.RS_config_resp.UBRRH<<8)+inpk.tag.RS_config_resp.UBRRL;
01565 if( ubrr & 0x8000 )
01566 *baud = SUB_F_CPU/(8*((ubrr&0x7FFF)+1));
01567 else
01568 *baud = SUB_F_CPU/(16*(ubrr+1));
01569 }
01570 return rc;
01571 }
01572
01573 int sub_rs_timing( sub_handle hndl,
01574 int flags, int tx_space_us, int rx_msg_us, int rx_byte_us )
01575 {
01576 int rc;
01577 sub_pack outpk,inpk;
01578
01579 outpk.tag.code = SUB_RS_TIMING;
01580 outpk.tag.size = sizeof(struct RS_timing_req_st);
01581
01582 outpk.tag.RS_timing_req.flags = flags;
01583 INT_2_LE16( tx_space_us/64 ,outpk.tag.RS_timing_req.tx_space );
01584 INT_2_LE16( rx_msg_us/64 ,outpk.tag.RS_timing_req.rx_msg_to );
01585 INT_2_LE16( rx_byte_us/64 ,outpk.tag.RS_timing_req.rx_byte_to );
01586
01587 inpk.tag.size = sizeof(struct RS_timing_req_st);
01588 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01589
01590 return rc;
01591 }
01592
01593
01594
01595
01596
01597 int sub_rs_xfer( sub_handle hndl,
01598 char* tx_buf, int tx_sz, char* rx_buf, int rx_sz )
01599 {
01600 int rc;
01601 sub_pack outpk,inpk;
01602
01603 outpk.tag.code = SUB_RS_XFER;
01604 outpk.tag.RS_xfer_req.rx_sz = rx_sz;
01605 memcpy( outpk.tag.RS_xfer_req.tx_buf, tx_buf, tx_sz );
01606 outpk.tag.size = tx_sz+1;
01607
01608 inpk.tag.size = 0;
01609 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01610 if( rc )
01611 return -1;
01612
01613 rc = inpk.tag.RS_xfer_resp.rx_sz;
01614 memcpy( rx_buf, inpk.tag.RS_xfer_resp.rx_buf, rc );
01615 return rc;
01616 }
01617
01618
01619
01620
01621
01622
01623
01624 int sub_bb_i2c_config( sub_handle hndl, int mode, int stretch_ms )
01625 {
01626 int rc;
01627 sub_pack outpk,inpk;
01628
01629 outpk.tag.code = SUB_BB_I2C_CONFIG;
01630 outpk.tag.size = sizeof(struct bb_i2c_config_req_st);
01631 outpk.tag.bb_i2c_config_req.mode = mode;
01632 if( (stretch_ms<=16) && (stretch_ms>0) )
01633 outpk.tag.bb_i2c_config_req.stretch = 1;
01634 else
01635 outpk.tag.bb_i2c_config_req.stretch = (stretch_ms*1000)/16384;
01636
01637 inpk.tag.size = sizeof(struct bb_i2c_config_req_st);
01638 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01639 return rc;
01640 }
01641
01642 int sub_bb_i2c_scan( sub_handle hndl, int channel,
01643 int* slave_cnt, char* slave_buf )
01644 {
01645 int rc;
01646 sub_pack outpk,inpk;
01647
01648 outpk.tag.code = SUB_BB_I2C_SCAN;
01649 outpk.tag.bb_i2c_scan_req.channel = channel;
01650 outpk.tag.size = sizeof(struct bb_i2c_scan_req_st);
01651
01652 inpk.tag.size = 0;
01653 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01654 if( !rc )
01655 {
01656 *slave_cnt = inpk.tag.i2c_scan_resp.slave_n;
01657 memcpy( slave_buf, inpk.tag.i2c_scan_resp.slave_buf, *slave_cnt );
01658 }
01659 return rc;
01660 }
01661
01662
01663
01664 int sub_bb_i2c_read( sub_handle hndl, int channel, int sa,
01665 sub_int32_t ma, int ma_sz, char* buf, int sz )
01666 {
01667 int rc=0;
01668 sub_pack outpk,inpk;
01669
01670 if( (sz<=0) || (sz>SUB_MAX_BB_I2C_READ) )
01671 return SE_PARAM;
01672
01673 outpk.tag.code = SUB_BB_I2C_RDWR;
01674 outpk.tag.size = sizeof(struct bb_i2c_rdwr_req_st) + ma_sz;
01675 outpk.tag.bb_i2c_rdwr_req.channel = channel;
01676 outpk.tag.bb_i2c_rdwr_req.sa = (sa<<1)|0x01;
01677 outpk.tag.bb_i2c_rdwr_req.flags = 0;
01678 outpk.tag.bb_i2c_rdwr_req.ma_sz = ma_sz;
01679 outpk.tag.bb_i2c_rdwr_req.sz = sz;
01680 ma_copy( outpk.tag.bb_i2c_rdwr_req.ma, ma, ma_sz );
01681
01682 inpk.tag.size = (uint8_t)sizeof(struct bb_i2c_rdwr_resp_st)+sz;
01683 inpk.tag.bb_i2c_rdwr_resp.status = 0;
01684
01685 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01686 sub_i2c_status = inpk.tag.i2c_rdwr_resp.status;
01687 if( !rc )
01688 {
01689 if( sub_i2c_status )
01690 {
01691 rc = SE_I2C;
01692 sub_errno = rc;
01693 }
01694 else
01695 {
01696 memcpy( buf, inpk.tag.bb_i2c_rdwr_resp.data, sz );
01697 }
01698 }
01699 else
01700 {
01701 if( (rc==SE_BULKIN_SZ) && sub_i2c_status )
01702 {
01703 rc = SE_I2C;
01704 sub_errno = rc;
01705 }
01706 }
01707 return rc;
01708 }
01709
01710 int sub_bb_i2c_write( sub_handle hndl, int channel, int sa,
01711 sub_int32_t ma, int ma_sz, char* buf, int sz )
01712 {
01713 int rc=0;
01714 sub_pack outpk,inpk;
01715
01716 if( (sz<=0) || (sz>SUB_MAX_BB_I2C_WRITE-ma_sz) )
01717 return SE_PARAM;
01718
01719 outpk.tag.code = SUB_BB_I2C_RDWR;
01720 outpk.tag.size = sizeof(struct bb_i2c_rdwr_req_st)+ma_sz+sz;
01721 outpk.tag.bb_i2c_rdwr_req.channel = channel;
01722 outpk.tag.bb_i2c_rdwr_req.sa = sa<<1;
01723 outpk.tag.bb_i2c_rdwr_req.flags = 0;
01724 outpk.tag.bb_i2c_rdwr_req.ma_sz = ma_sz;
01725 outpk.tag.bb_i2c_rdwr_req.sz = sz;
01726 ma_copy( outpk.tag.bb_i2c_rdwr_req.ma, ma, ma_sz );
01727 memcpy( outpk.tag.bb_i2c_rdwr_req.ma+ma_sz, buf, sz );
01728
01729 inpk.tag.size = sizeof(struct bb_i2c_rdwr_resp_st);
01730 inpk.tag.bb_i2c_rdwr_resp.status = 0;
01731
01732 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01733 sub_i2c_status = inpk.tag.bb_i2c_rdwr_resp.status;
01734 if( !rc )
01735 {
01736 if( sub_i2c_status )
01737 {
01738 rc = SE_I2C;
01739 sub_errno = rc;
01740 }
01741 }
01742 return rc;
01743 }
01744
01745
01746
01747
01748
01749
01750
01751 int sub_ir_config( sub_handle hndl, int carrier, int duty, int mode, ... )
01752 {
01753 int rc;
01754 sub_pack outpk,inpk;
01755 int icr;
01756 int ocr;
01757
01758 va_list args;
01759 va_start( args, mode );
01760
01761 outpk.tag.code = SUB_IR_CONFIG;
01762 outpk.tag.size = sizeof(struct ir_config_req_st);
01763
01764
01765 if( (carrier <=0) || (carrier >= SUB_F_CPU/4) )
01766 return SE_PARAM;
01767 icr = SUB_F_CPU/carrier-1;
01768 if( icr > 0xFFFF )
01769 return SE_PARAM;
01770 outpk.tag.ir_config_req.ICRL = icr & 0xFF;
01771 outpk.tag.ir_config_req.ICRH = icr >>8;
01772
01773
01774 if( (duty<0) || (duty>100) )
01775 return SE_PARAM;
01776 ocr = (icr*duty)/100;
01777 outpk.tag.ir_config_req.OCRL = ocr & 0xFF;
01778 outpk.tag.ir_config_req.OCRH = ocr >>8;
01779
01780 outpk.tag.ir_config_req.mode = mode;
01781 va_start( args, mode );
01782 switch( mode )
01783 {
01784 case IR_UART_MODE:
01785 outpk.tag.ir_config_req.ir_config_mode.uart_mode.pp_bit =
01786 va_arg( args, int );
01787 break;
01788 case IR_ROW_MODE:
01789 outpk.tag.ir_config_req.ir_config_mode.row_mode.pp_bit =
01790 va_arg( args, int );
01791 break;
01792 default:
01793 va_end( args );
01794 return SE_PARAM;
01795 }
01796
01797 inpk.tag.size = sizeof(struct ir_config_req_st);
01798 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01799
01800 va_end( args );
01801 return rc;
01802 }
01803
01804 int sub_ir_tx( sub_handle hndl, int sz, char* buf )
01805 {
01806 int rc=0;
01807 sub_pack outpk,inpk;
01808
01809 if( (sz<=0) || (sz>SUB_MAX_IR_TX) )
01810 return SE_PARAM;
01811
01812 outpk.tag.code = SUB_IR_TX;
01813 outpk.tag.size = sizeof(struct ir_tx_req_st)+sz;
01814 memcpy( outpk.tag.ir_tx_req.buf, buf, sz );
01815 outpk.tag.ir_tx_req.sz = sz;
01816
01817 inpk.tag.size = sizeof(struct ir_tx_resp_st);
01818 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01819 if( !rc )
01820 {
01821 if( inpk.tag.ir_tx_resp.status )
01822 {
01823 rc = SE_IR;
01824 sub_errno = SE_IR;
01825 }
01826 }
01827 return rc;
01828 }
01829
01830
01831
01832
01833
01834
01835
01836 int sub_fifo_write( sub_handle hndl, char* buf, int sz, int to_ms )
01837 {
01838 int rc;
01839
01840 sub_trace( 3, "FIFO WRITE %d bytes:\n", sz );
01841 hexdump_buf( 3, buf,sz );
01842
01843 #ifdef LIBUSB_1_0
01844 int transferred;
01845 rc = libusb_bulk_transfer( hndl, SUB_FIFO_OUT_EP, (unsigned char*)buf,
01846 sz, &transferred, to_ms );
01847 #else
01848 rc = usb_bulk_write( hndl, SUB_FIFO_OUT_EP, buf, sz, to_ms );
01849 #endif
01850
01851
01852 if( rc<0 )
01853 {
01854 switch( rc )
01855 {
01856 case -ETIMEDOUT:
01857 sub_errno = SE_TIMEOUT;
01858 break;
01859 default:
01860 sub_errno = SE_BULKOUT;
01861 }
01862
01863 sub_trace( 3, "ERROR %d\n", sub_errno );
01864 }
01865
01866 return rc;
01867 }
01868
01869 int sub_fifo_read( sub_handle hndl, char* buf, int sz, int to_ms )
01870 {
01871 int rc;
01872 int aligned_sz,use_tmp;
01873 char* tmp_buf;
01874
01875 if( sz%64 == 0 )
01876 {
01877
01878 tmp_buf = buf;
01879 aligned_sz = sz;
01880 use_tmp=0;
01881 }
01882 else
01883 {
01884
01885 aligned_sz = (sz/64)*64;
01886 if( sz % 64 )
01887 aligned_sz+=64;
01888 tmp_buf = malloc( aligned_sz );
01889 if( !tmp_buf )
01890 return -ENOMEM;
01891 use_tmp=1;
01892 }
01893
01894 sub_trace( 3, "FIFO READ %d bytes:\n", aligned_sz );
01895
01896 #ifdef LIBUSB_1_0
01897 int transferred;
01898 rc = libusb_bulk_transfer( hndl, SUB_FIFO_IN_EP, (unsigned char*)buf,
01899 aligned_sz, &transferred, to_ms );
01900 #else
01901 rc = usb_bulk_read( hndl, SUB_FIFO_IN_EP, tmp_buf, aligned_sz, to_ms );
01902 #endif
01903 if( rc<0 )
01904 {
01905 switch( rc )
01906 {
01907 case -ETIMEDOUT:
01908 sub_errno = SE_TIMEOUT;
01909 break;
01910 default:
01911 sub_errno = SE_BULKIN_RC;
01912 }
01913 sub_trace( 3, "ERROR %d\n", sub_errno );
01914 }
01915 else
01916 {
01917 if( rc > sz )
01918 {
01919 sub_errno = SE_OUT_OVF;
01920 rc = -EFBIG;
01921 sub_trace( 3, "ERROR %d\n", sub_errno );
01922 }
01923 else
01924 {
01925 hexdump_buf( 3, tmp_buf,rc);
01926 if( use_tmp )
01927 memcpy( buf, tmp_buf, rc );
01928 }
01929 }
01930
01931 if( use_tmp )
01932 free( tmp_buf );
01933 return rc;
01934 }
01935
01936 int sub_fifo_config( sub_handle hndl, int config )
01937 {
01938 int rc;
01939 sub_pack outpk,inpk;
01940
01941 outpk.tag.code = SUB_FIFO_CONFIG;
01942 outpk.tag.size = sizeof(struct FIFO_config_req_st);
01943 outpk.tag.FIFO_config_req.selector = config;
01944 outpk.tag.FIFO_config_req.flags = config>>8;
01945
01946 inpk.tag.size = sizeof(struct FIFO_config_req_st);
01947 rc = sub_transaction( hndl, &outpk, &inpk, 10000 );
01948
01949 return rc;
01950 }
01951
01952
01953
01954
01955
01956
01957
01958
01959
01960
01961
01962
01963
01964
01965
01966
01967 int sub_transaction( sub_handle hndl, sub_pack* outpk, sub_pack* inpk, int timeout )
01968 {
01969 int sz, in_sz, in_tag_sz, out_sz;
01970
01971 in_tag_sz = inpk->tag.size;
01972 in_sz = 64;
01973 if( in_sz < (in_tag_sz+3) )
01974 in_sz = in_tag_sz+3;
01975
01976 out_sz = outpk->tag.size+3;
01977 outpk->pack_sz = out_sz-1;
01978
01979 sz = usb_transaction( hndl,
01980 (char*)outpk, out_sz, (char*)inpk, in_sz, timeout);
01981 if( sz < 0 )
01982 return sub_errno;
01983
01984
01985 if( (sz == 3) && (inpk->tag.code == SUB_UNKNOWN) )
01986 {
01987 sub_errno = SE_NSUPPORTED;
01988 return sub_errno;
01989 }
01990 if( sz < (in_tag_sz+3) )
01991 {
01992 sub_errno = SE_BULKIN_SZ;
01993 return sub_errno;
01994 }
01995 if( outpk->tag.code != inpk->tag.code )
01996 {
01997 sub_errno = SE_TAG_CODE;
01998 return sub_errno;
01999 }
02000 if( in_tag_sz && (inpk->tag.size != in_tag_sz) )
02001 {
02002 sub_errno = SE_TAG_SIZE;
02003 return sub_errno;
02004 }
02005 return 0;
02006 }
02007
02008 #ifdef LIBUSB_1_0
02009
02010 void transfer_callback( struct libusb_transfer *transfer )
02011 {
02012 transfer->flags |= LIBUSB_TRANSFER_FREE_TRANSFER;
02013 *((int*)(transfer->user_data)) = transfer->status;
02014 if( transfer->status != LIBUSB_TRANSFER_COMPLETED )
02015 sub_trace( 1, "Transfer status: %d\n", transfer->status );
02016 else
02017 sub_trace( 8, "Transfer completed, transferred=%d\n",
02018 transfer->actual_length );
02019 }
02020 #endif
02021
02022 int usb_transaction( sub_handle hndl,
02023 char* out_buf, int out_sz,
02024 char* in_buf, int in_sz,
02025 int timeout )
02026 {
02027
02028 #ifndef LIBUSB_1_0
02029 void *context = NULL;
02030 int rc,sz=0;
02031 #endif
02032
02033 sub_trace( 3, "BULK_OUT %d bytes:\n", out_sz );
02034 hexdump_buf( 3, out_buf,out_sz );
02035
02036 #ifdef LIBUSB_1_0
02037 int rc;
02038 int transferred,status=-1;
02039
02040 #define ASYNC_OUT
02041 #ifdef ASYNC_OUT
02042
02043 struct libusb_transfer* transfer;
02044 transfer = libusb_alloc_transfer( 0 );
02045 if( !transfer )
02046 {
02047 sub_errno = SE_SETA;
02048 return -1;
02049 }
02050
02051
02052 libusb_fill_bulk_transfer( transfer, hndl,
02053 SUB_OUT_EP,
02054 (unsigned char*)out_buf, out_sz,
02055 transfer_callback,
02056 &status,
02057 timeout );
02058
02059
02060 if( libusb_submit_transfer( transfer ) )
02061 {
02062 libusb_free_transfer( transfer );
02063 sub_errno = SE_SUBMIT;
02064 return -1;
02065 }
02066 #else
02067
02068 rc = libusb_bulk_transfer( hndl,
02069 SUB_OUT_EP,
02070 (unsigned char*)out_buf, out_sz,
02071 &transferred,
02072 timeout );
02073 if( rc )
02074 {
02075 rc = -1;
02076 sub_errno = SE_BULKOUT;
02077 return rc;
02078 }
02079 status = LIBUSB_TRANSFER_COMPLETED;
02080 #endif
02081
02082
02083 rc = libusb_bulk_transfer( hndl,
02084 SUB_IN_EP,
02085 (unsigned char*)in_buf, in_sz,
02086 &transferred,
02087 timeout );
02088 if( rc )
02089 {
02090 rc = -1;
02091 sub_errno = SE_BULKIN_RC;
02092 }
02093 else
02094 {
02095 sub_trace( 3, "BULK_IN %d bytes:\n", transferred );
02096 hexdump_buf( 3, in_buf, transferred );
02097 }
02098
02099
02100 if( status == -1 )
02101 {
02102
02103 sub_trace(1, "Transfer incomplete\n");
02104
02105 }
02106 if( !rc )
02107 {
02108 if( status == LIBUSB_TRANSFER_COMPLETED )
02109 rc = transferred;
02110 else
02111 {
02112 rc = -1;
02113 sub_errno = SE_BULKOUT;
02114 }
02115 }
02116 return rc;
02117
02118 #else
02119
02120
02121 rc = usb_bulk_setup_async( hndl, &context, SUB_OUT_EP );
02122 if( rc )
02123 {
02124 rc = SE_SETA;
02125 goto fin;
02126 }
02127
02128 rc = usb_submit_async( context, out_buf, out_sz );
02129 if( rc )
02130 {
02131 rc = SE_SUBMIT;
02132 goto fin;
02133 }
02134
02135 sz = usb_bulk_read( hndl, SUB_IN_EP, in_buf, in_sz, timeout );
02136 if( sz < 0 )
02137 {
02138 rc = SE_BULKIN_RC;
02139 usb_clear_halt( hndl, SUB_IN_EP );
02140 }
02141 else
02142 {
02143 sub_trace( 3, "BULK_IN %d bytes:\n", sz );
02144 hexdump_buf( 3, in_buf, sz );
02145 }
02146
02147 if( usb_reap_async(context, timeout) != out_sz )
02148 rc = SE_BULKOUT;
02149
02150 fin:
02151 if( context )
02152 usb_free_async( &context );
02153 if( rc )
02154 {
02155 sub_errno = rc;
02156 return -1;
02157 }
02158 return sz;
02159 #endif
02160 }
02161
02162
02163
02164
02165
02166 #undef DEF_SUB_ERROR
02167 #define DEF_SUB_ERROR(NAME,VAL,DESCR) DESCR,
02168 char* sub_errlist[] =
02169 {
02170 SUB_ERRORS
02171 };
02172
02173 char* sub_strerror( int errnum )
02174 {
02175 static char buf[100];
02176
02177 if( (errnum < 0 ) || (errnum >= SUB_LASTERROR) )
02178 {
02179 sprintf( buf, "Unrecognized error %d", errnum );
02180 return buf;
02181 }
02182
02183 return sub_errlist[errnum];
02184 }
02185
02186
02187
02188
02189 int sub_control_request( sub_handle hndl,
02190 int type, int request, int value, int index,
02191 char* buf, int sz, int timeout
02192 )
02193 {
02194 #ifdef LIBUSB_1_0
02195 return libusb_control_transfer( hndl,
02196 type, request, value, index, (unsigned char*)buf, sz, timeout );
02197 #else
02198 return usb_control_msg( hndl,
02199 type, request, value, index, buf, sz, timeout );
02200 #endif
02201 }
02202
02203
02204
02205
02206 int sub_get_serial_number( sub_handle hndl, char *buf, int sz)
02207 {
02208 #ifdef LIBUSB_1_0
02209 return libusb_get_string_descriptor_ascii(hndl, 3, (unsigned char*)buf, sz);
02210 #else
02211 return usb_get_string_simple(hndl, 3, buf, sz);
02212 #endif
02213 }
02214
02215
02216
02217
02218 int sub_get_product_id( sub_handle hndl, char *buf, int sz)
02219 {
02220 #ifdef LIBUSB_1_0
02221 return libusb_get_string_descriptor_ascii(hndl, 2, (unsigned char*)buf, sz);
02222 #else
02223 return usb_get_string_simple(hndl, 2, buf, sz);
02224 #endif
02225 }
02226
02227
02228
02229
02230 void sub_trace( int level, char* format, ... )
02231 {
02232 va_list args;
02233 va_start( args, format );
02234 #if defined(_MSC_VER) && _MSC_VER > 800
02235 if( (shared_mem) && (level <= shared_mem->sub_debug_level) )
02236 {
02237 char str[256];
02238 vsnprintf_s(str, sizeof(str),
02239 _TRUNCATE, format, args );
02240 OutputDebugString(str);
02241 }
02242 #else
02243 if( level <= sub_debug_level )
02244 vprintf( format, args );
02245 #endif
02246 va_end( args );
02247 }
02248
02249
02250
02251
02252 void hexdump_buf( int level, char* buf, int sz )
02253 {
02254 int i;
02255 for( i=0; i<sz; i++ )
02256 {
02257 sub_trace( level, "%02x ", (unsigned int)(buf[i])&0x00FF );
02258 if( (i & 0x0F) == 0x0F )
02259 sub_trace( level, "\n" );
02260 }
02261 if( (i & 0x0F) != 0x0F )
02262 sub_trace( level, "\n" );
02263 }
02264
02265 #if defined(_MSC_VER) && _MSC_VER > 800
02266
02267
02268
02269
02270
02271
02272 int sub_set_debug_level( int level )
02273 {
02274 if(shared_mem)
02275 {
02276 int old_level=shared_mem->sub_debug_level;
02277 if( level!=-1)
02278 {
02279 shared_mem->sub_debug_level=level;
02280 }
02281 return old_level;
02282 }
02283 else
02284 {
02285 return -1;
02286 }
02287 }
02288
02289 BOOL sub_shared_mem_init()
02290 {
02291 hFileMapping = CreateFileMapping(
02292 INVALID_HANDLE_VALUE,
02293 NULL,
02294 PAGE_READWRITE,
02295 0,
02296 sizeof(shared_mem_t),
02297 SHARED_MEM_NAME);
02298
02299 if(!hFileMapping)
02300 {
02301 if(GetLastError() == ERROR_ALREADY_EXISTS)
02302 {
02303 hFileMapping = OpenFileMapping(
02304 FILE_MAP_WRITE,
02305 FALSE,
02306 SHARED_MEM_NAME);
02307 if(!hFileMapping)
02308 {
02309 return FALSE ;
02310 }
02311
02312 }
02313 else
02314 {
02315 return FALSE ;
02316 }
02317
02318 }
02319
02320 shared_mem = (shared_mem_t *)MapViewOfFile(
02321 hFileMapping,
02322 FILE_MAP_WRITE,
02323 0,
02324 0,
02325 sizeof(shared_mem_t));
02326
02327 if(!shared_mem)
02328 {
02329 CloseHandle(hFileMapping);
02330 hFileMapping=NULL;
02331 }
02332
02333 return (shared_mem!=NULL) ;
02334 }
02335
02336 BOOL sub_shared_mem_cleanup()
02337 {
02338 BOOL bSuccess;
02339 bSuccess=UnmapViewOfFile(shared_mem);
02340 if(!bSuccess)
02341 {
02342 return FALSE ;
02343 }
02344 bSuccess=CloseHandle(hFileMapping);
02345 return bSuccess;
02346 }
02347
02348 BOOL WINAPI libusbDllMain(HANDLE module, DWORD reason, LPVOID reserved);
02349
02350 BOOL WINAPI DllMain(HANDLE module, DWORD reason, LPVOID reserved)
02351 {
02352 switch(reason)
02353 {
02354 case DLL_PROCESS_ATTACH:
02355 sub_shared_mem_init();
02356 break;
02357 case DLL_PROCESS_DETACH:
02358 sub_shared_mem_cleanup();
02359 break;
02360 case DLL_THREAD_ATTACH:
02361 break;
02362 case DLL_THREAD_DETACH:
02363 break;
02364 default:
02365 break;
02366 }
02367 return libusbDllMain(module, reason, reserved);
02368 }
02369
02370 #endif
02371
02372
02373
02374
02375
02376
02377
02378 int sub_get_errno( void )
02379 {
02380 return sub_errno ;
02381 }
02382
02383 int sub_get_i2c_status( void )
02384 {
02385 return sub_i2c_status ;
02386 }