| Universelles CAN Interface | Allgemeines CAN Interface für AT90CAN32/64/128, MCP2515 und SJA1000 |
| Gruppe nützlicher Makros und Inline-Funktionen | Nützliche Makros und Funktionen |
| Libcanard CAN Interface for AVR microcontrollers | Interface for Libcanard CAN interaction with AVR microcontrollers |
| CHIP: LPC11xx A/D conversion driver | |
| CHIP: LPC11xx CCAN ROM Driver | |
| CHIP: LPC11xx Peripheral addresses and register set declarations | |
| CHIP: LPC11xx support functions | |
| CHIP: LPC11xx Clock Control block driver | |
| ▼CHIP: LPC11Cxx CMSIS include file | |
| CHIP_LPC11CXX: LPC11CXX/LPC111X peripheral interrupt numbers | |
| CHIP: LPC11Cxx Cortex CMSIS definitions | |
| CMSIS Global Defines | IO Type Qualifiers are used |
| ▼Defines and Type Definitions | Type definitions and defines for Cortex-M processor based devices |
| ▼Status and Control Registers | Core Register type definitions |
| ▼Nested Vectored Interrupt Controller (NVIC) | Type definitions for the NVIC Registers |
| ▼System Control Block (SCB) | Type definitions for the System Control Block Registers |
| ▼System Tick Timer (SysTick) | Type definitions for the System Timer Registers |
| ▼Core Debug Registers (CoreDebug) | Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0 header file |
| ▼Core Definitions | Definitions for base addresses, unions, and structures |
| ▼Functions and Instructions Reference | |
| ▼NVIC Functions | Functions that manage interrupts and exceptions via the NVIC |
| SysTick Functions | Functions that configure the System |
| CMSIS Core Register Access Functions | |
| ▼NVIC Functions | Functions that manage interrupts and exceptions via the NVIC |
| SysTick Functions | Functions that configure the System |
| CMSIS Core Instruction Interface | Access to dedicated instructions |
| CHIP: LPC11xx FLASH Memory Controller driver | |
| CHIP: LPC11xx GPIO driver for CHIP_LPC11CXX, CHIP_LPC110X, and CHIP_LPC11XXLV families | |
| CHIP: LPC11xx GPIO group driver for CHIP_LPC11(A/E/U)XX families | |
| CHIP: LPC11xx I2C driver | |
| CHIP: LPC11xx IO Control driver | |
| ▼CHIP: LPC Common Types | |
| LPC Public Types | |
| LPC Public Macros | |
| CHIP: LPC11xx Pin Interrupt and Pattern Match driver | |
| CHIP: LPC11xx Power Management Unit block driver | |
| CHIP: Simple ring buffer implementation | |
| CHIP: LPC11XX ROM API declarations and functions | |
| CHIP: LPC11xx SSP register block and driver | |
| CHIP: LPC11xx System Control block driver | |
| CHIP: LPC11xx 16/32-bit Timer driver | |
| CHIP: LPC11xx UART driver | |
| CHIP: LPC11xx Windowed Watchdog driver | |